Lines Matching +full:use +full:- +full:dma +full:- +full:rx
1 // SPDX-License-Identifier: GPL-2.0-or-later
21 #include <linux/dma-mapping.h>
23 #include <asm/mach-au1x00/au1000.h>
24 #include <asm/mach-au1x00/au1xxx_psc.h>
25 #include <asm/mach-au1x00/au1xxx_dbdma.h>
27 #include <asm/mach-au1x00/au1550_spi.h>
50 u8 *rx; member
76 /* we use an 8-bit memory device for dma transfers to/from spi fifo */
87 static int ddma_memid; /* id to above mem dma device */
103 u32 mainclk_hz = hw->pdata->mainclk_hz; in au1550_spi_baudcfg()
120 brg--; in au1550_spi_baudcfg()
126 hw->regs->psc_spimsk = in au1550_spi_mask_ack_all()
132 hw->regs->psc_spievent = in au1550_spi_mask_ack_all()
143 hw->regs->psc_spipcr = PSC_SPIPCR_RC | PSC_SPIPCR_TC; in au1550_spi_reset_fifos()
146 pcr = hw->regs->psc_spipcr; in au1550_spi_reset_fifos()
152 * dma transfers are used for the most common spi word size of 8-bits
153 * we cannot easily change already set up dma channels' width, so if we wanted
154 * dma support for more than 8-bit words (up to 24 bits), we would need to
155 * setup dma channels from scratch on each spi transfer, based on bits_per_word
156 * instead we have pre set up 8 bit dma channels supporting spi 4 to 8 bits
158 * callbacks to handle dma or pio are set up in au1550_spi_bits_handlers_set()
162 struct au1550_spi *hw = spi_controller_get_devdata(spi->controller); in au1550_spi_chipsel()
163 unsigned int cspol = spi->mode & SPI_CS_HIGH ? 1 : 0; in au1550_spi_chipsel()
168 if (hw->pdata->deactivate_cs) in au1550_spi_chipsel()
169 hw->pdata->deactivate_cs(hw->pdata, spi_get_chipselect(spi, 0), in au1550_spi_chipsel()
174 au1550_spi_bits_handlers_set(hw, spi->bits_per_word); in au1550_spi_chipsel()
176 cfg = hw->regs->psc_spicfg; in au1550_spi_chipsel()
178 hw->regs->psc_spicfg = cfg & ~PSC_SPICFG_DE_ENABLE; in au1550_spi_chipsel()
181 if (spi->mode & SPI_CPOL) in au1550_spi_chipsel()
185 if (spi->mode & SPI_CPHA) in au1550_spi_chipsel()
190 if (spi->mode & SPI_LSB_FIRST) in au1550_spi_chipsel()
195 if (hw->usedma && spi->bits_per_word <= 8) in au1550_spi_chipsel()
200 cfg |= PSC_SPICFG_SET_LEN(spi->bits_per_word); in au1550_spi_chipsel()
204 cfg |= au1550_spi_baudcfg(hw, spi->max_speed_hz); in au1550_spi_chipsel()
206 hw->regs->psc_spicfg = cfg | PSC_SPICFG_DE_ENABLE; in au1550_spi_chipsel()
209 stat = hw->regs->psc_spistat; in au1550_spi_chipsel()
213 if (hw->pdata->activate_cs) in au1550_spi_chipsel()
214 hw->pdata->activate_cs(hw->pdata, spi_get_chipselect(spi, 0), in au1550_spi_chipsel()
222 struct au1550_spi *hw = spi_controller_get_devdata(spi->controller); in au1550_spi_setupxfer()
227 bpw = t->bits_per_word; in au1550_spi_setupxfer()
228 hz = t->speed_hz; in au1550_spi_setupxfer()
230 bpw = spi->bits_per_word; in au1550_spi_setupxfer()
231 hz = spi->max_speed_hz; in au1550_spi_setupxfer()
235 return -EINVAL; in au1550_spi_setupxfer()
237 au1550_spi_bits_handlers_set(hw, spi->bits_per_word); in au1550_spi_setupxfer()
239 cfg = hw->regs->psc_spicfg; in au1550_spi_setupxfer()
241 hw->regs->psc_spicfg = cfg & ~PSC_SPICFG_DE_ENABLE; in au1550_spi_setupxfer()
244 if (hw->usedma && bpw <= 8) in au1550_spi_setupxfer()
255 hw->regs->psc_spicfg = cfg; in au1550_spi_setupxfer()
260 stat = hw->regs->psc_spistat; in au1550_spi_setupxfer()
271 * for dma spi transfers, we have to setup rx channel, otherwise there is
273 * dma complete callbacks are called before real spi transfer is finished
274 * and if only tx dma channel is set up (and rx fifo overflow event masked)
275 * spi host done event irq is not generated unless rx fifo is empty (emptied)
276 * so we need rx tmp buffer to use for rx dma if user does not provide one
280 hw->dma_rx_tmpbuf = kmalloc(size, GFP_KERNEL); in au1550_spi_dma_rxtmp_alloc()
281 if (!hw->dma_rx_tmpbuf) in au1550_spi_dma_rxtmp_alloc()
282 return -ENOMEM; in au1550_spi_dma_rxtmp_alloc()
283 hw->dma_rx_tmpbuf_size = size; in au1550_spi_dma_rxtmp_alloc()
284 hw->dma_rx_tmpbuf_addr = dma_map_single(hw->dev, hw->dma_rx_tmpbuf, in au1550_spi_dma_rxtmp_alloc()
286 if (dma_mapping_error(hw->dev, hw->dma_rx_tmpbuf_addr)) { in au1550_spi_dma_rxtmp_alloc()
287 kfree(hw->dma_rx_tmpbuf); in au1550_spi_dma_rxtmp_alloc()
288 hw->dma_rx_tmpbuf = 0; in au1550_spi_dma_rxtmp_alloc()
289 hw->dma_rx_tmpbuf_size = 0; in au1550_spi_dma_rxtmp_alloc()
290 return -EFAULT; in au1550_spi_dma_rxtmp_alloc()
297 dma_unmap_single(hw->dev, hw->dma_rx_tmpbuf_addr, in au1550_spi_dma_rxtmp_free()
298 hw->dma_rx_tmpbuf_size, DMA_FROM_DEVICE); in au1550_spi_dma_rxtmp_free()
299 kfree(hw->dma_rx_tmpbuf); in au1550_spi_dma_rxtmp_free()
300 hw->dma_rx_tmpbuf = 0; in au1550_spi_dma_rxtmp_free()
301 hw->dma_rx_tmpbuf_size = 0; in au1550_spi_dma_rxtmp_free()
306 struct au1550_spi *hw = spi_controller_get_devdata(spi->controller); in au1550_spi_dma_txrxb()
311 hw->len = t->len; in au1550_spi_dma_txrxb()
312 hw->tx_count = 0; in au1550_spi_dma_txrxb()
313 hw->rx_count = 0; in au1550_spi_dma_txrxb()
315 hw->tx = t->tx_buf; in au1550_spi_dma_txrxb()
316 hw->rx = t->rx_buf; in au1550_spi_dma_txrxb()
317 dma_tx_addr = t->tx_dma; in au1550_spi_dma_txrxb()
318 dma_rx_addr = t->rx_dma; in au1550_spi_dma_txrxb()
321 * check if buffers are already dma mapped, map them otherwise: in au1550_spi_dma_txrxb()
322 * - first map the TX buffer, so cache data gets written to memory in au1550_spi_dma_txrxb()
323 * - then map the RX buffer, so that cache entries (with in au1550_spi_dma_txrxb()
324 * soon-to-be-stale data) get removed in au1550_spi_dma_txrxb()
325 * use rx buffer in place of tx if tx buffer was not provided in au1550_spi_dma_txrxb()
326 * use temp rx buffer (preallocated or realloc to fit) for rx dma in au1550_spi_dma_txrxb()
328 if (t->tx_buf) { in au1550_spi_dma_txrxb()
329 if (t->tx_dma == 0) { /* if DMA_ADDR_INVALID, map it */ in au1550_spi_dma_txrxb()
330 dma_tx_addr = dma_map_single(hw->dev, in au1550_spi_dma_txrxb()
331 (void *)t->tx_buf, in au1550_spi_dma_txrxb()
332 t->len, DMA_TO_DEVICE); in au1550_spi_dma_txrxb()
333 if (dma_mapping_error(hw->dev, dma_tx_addr)) in au1550_spi_dma_txrxb()
334 dev_err(hw->dev, "tx dma map error\n"); in au1550_spi_dma_txrxb()
338 if (t->rx_buf) { in au1550_spi_dma_txrxb()
339 if (t->rx_dma == 0) { /* if DMA_ADDR_INVALID, map it */ in au1550_spi_dma_txrxb()
340 dma_rx_addr = dma_map_single(hw->dev, in au1550_spi_dma_txrxb()
341 (void *)t->rx_buf, in au1550_spi_dma_txrxb()
342 t->len, DMA_FROM_DEVICE); in au1550_spi_dma_txrxb()
343 if (dma_mapping_error(hw->dev, dma_rx_addr)) in au1550_spi_dma_txrxb()
344 dev_err(hw->dev, "rx dma map error\n"); in au1550_spi_dma_txrxb()
347 if (t->len > hw->dma_rx_tmpbuf_size) { in au1550_spi_dma_txrxb()
351 ret = au1550_spi_dma_rxtmp_alloc(hw, max(t->len, in au1550_spi_dma_txrxb()
356 hw->rx = hw->dma_rx_tmpbuf; in au1550_spi_dma_txrxb()
357 dma_rx_addr = hw->dma_rx_tmpbuf_addr; in au1550_spi_dma_txrxb()
358 dma_sync_single_for_device(hw->dev, dma_rx_addr, in au1550_spi_dma_txrxb()
359 t->len, DMA_FROM_DEVICE); in au1550_spi_dma_txrxb()
362 if (!t->tx_buf) { in au1550_spi_dma_txrxb()
363 dma_sync_single_for_device(hw->dev, dma_rx_addr, in au1550_spi_dma_txrxb()
364 t->len, DMA_BIDIRECTIONAL); in au1550_spi_dma_txrxb()
365 hw->tx = hw->rx; in au1550_spi_dma_txrxb()
369 res = au1xxx_dbdma_put_dest(hw->dma_rx_ch, virt_to_phys(hw->rx), in au1550_spi_dma_txrxb()
370 t->len, DDMA_FLAGS_IE); in au1550_spi_dma_txrxb()
372 dev_err(hw->dev, "rx dma put dest error\n"); in au1550_spi_dma_txrxb()
374 res = au1xxx_dbdma_put_source(hw->dma_tx_ch, virt_to_phys(hw->tx), in au1550_spi_dma_txrxb()
375 t->len, DDMA_FLAGS_IE); in au1550_spi_dma_txrxb()
377 dev_err(hw->dev, "tx dma put source error\n"); in au1550_spi_dma_txrxb()
379 au1xxx_dbdma_start(hw->dma_rx_ch); in au1550_spi_dma_txrxb()
380 au1xxx_dbdma_start(hw->dma_tx_ch); in au1550_spi_dma_txrxb()
383 hw->regs->psc_spimsk = PSC_SPIMSK_SD; in au1550_spi_dma_txrxb()
387 hw->regs->psc_spipcr = PSC_SPIPCR_MS; in au1550_spi_dma_txrxb()
390 wait_for_completion(&hw->host_done); in au1550_spi_dma_txrxb()
392 au1xxx_dbdma_stop(hw->dma_tx_ch); in au1550_spi_dma_txrxb()
393 au1xxx_dbdma_stop(hw->dma_rx_ch); in au1550_spi_dma_txrxb()
395 if (!t->rx_buf) { in au1550_spi_dma_txrxb()
397 dma_sync_single_for_cpu(hw->dev, dma_rx_addr, t->len, in au1550_spi_dma_txrxb()
401 if (t->rx_buf && t->rx_dma == 0) in au1550_spi_dma_txrxb()
402 dma_unmap_single(hw->dev, dma_rx_addr, t->len, in au1550_spi_dma_txrxb()
404 if (t->tx_buf && t->tx_dma == 0) in au1550_spi_dma_txrxb()
405 dma_unmap_single(hw->dev, dma_tx_addr, t->len, in au1550_spi_dma_txrxb()
408 return min(hw->rx_count, hw->tx_count); in au1550_spi_dma_txrxb()
415 stat = hw->regs->psc_spistat; in au1550_spi_dma_irq_callback()
416 evnt = hw->regs->psc_spievent; in au1550_spi_dma_irq_callback()
419 dev_err(hw->dev, "Unexpected IRQ!\n"); in au1550_spi_dma_irq_callback()
430 * and stop the possibly running dma immediately in au1550_spi_dma_irq_callback()
433 au1xxx_dbdma_stop(hw->dma_rx_ch); in au1550_spi_dma_irq_callback()
434 au1xxx_dbdma_stop(hw->dma_tx_ch); in au1550_spi_dma_irq_callback()
437 hw->rx_count = hw->len - au1xxx_get_dma_residue(hw->dma_rx_ch); in au1550_spi_dma_irq_callback()
438 hw->tx_count = hw->len - au1xxx_get_dma_residue(hw->dma_tx_ch); in au1550_spi_dma_irq_callback()
440 au1xxx_dbdma_reset(hw->dma_rx_ch); in au1550_spi_dma_irq_callback()
441 au1xxx_dbdma_reset(hw->dma_tx_ch); in au1550_spi_dma_irq_callback()
445 dev_err(hw->dev, in au1550_spi_dma_irq_callback()
446 "dma transfer: receive FIFO overflow!\n"); in au1550_spi_dma_irq_callback()
448 dev_err(hw->dev, in au1550_spi_dma_irq_callback()
449 "dma transfer: unexpected SPI error (event=0x%x stat=0x%x)!\n", in au1550_spi_dma_irq_callback()
452 complete(&hw->host_done); in au1550_spi_dma_irq_callback()
459 hw->rx_count = hw->len; in au1550_spi_dma_irq_callback()
460 hw->tx_count = hw->len; in au1550_spi_dma_irq_callback()
461 complete(&hw->host_done); in au1550_spi_dma_irq_callback()
471 u32 fifoword = hw->regs->psc_spitxrx & (u32)(mask); \
473 if (hw->rx) { \
474 *(u##size *)hw->rx = (u##size)fifoword; \
475 hw->rx += (size) / 8; \
477 hw->rx_count += (size) / 8; \
484 if (hw->tx) { \
485 fifoword = *(u##size *)hw->tx & (u32)(mask); \
486 hw->tx += (size) / 8; \
488 hw->tx_count += (size) / 8; \
489 if (hw->tx_count >= hw->len) \
491 hw->regs->psc_spitxrx = fifoword; \
505 struct au1550_spi *hw = spi_controller_get_devdata(spi->controller); in au1550_spi_pio_txrxb()
507 hw->tx = t->tx_buf; in au1550_spi_pio_txrxb()
508 hw->rx = t->rx_buf; in au1550_spi_pio_txrxb()
509 hw->len = t->len; in au1550_spi_pio_txrxb()
510 hw->tx_count = 0; in au1550_spi_pio_txrxb()
511 hw->rx_count = 0; in au1550_spi_pio_txrxb()
517 while (hw->tx_count < hw->len) { in au1550_spi_pio_txrxb()
519 hw->tx_word(hw); in au1550_spi_pio_txrxb()
521 if (hw->tx_count >= hw->len) { in au1550_spi_pio_txrxb()
526 stat = hw->regs->psc_spistat; in au1550_spi_pio_txrxb()
533 hw->regs->psc_spimsk = mask; in au1550_spi_pio_txrxb()
537 hw->regs->psc_spipcr = PSC_SPIPCR_MS; in au1550_spi_pio_txrxb()
540 wait_for_completion(&hw->host_done); in au1550_spi_pio_txrxb()
542 return min(hw->rx_count, hw->tx_count); in au1550_spi_pio_txrxb()
550 stat = hw->regs->psc_spistat; in au1550_spi_pio_irq_callback()
551 evnt = hw->regs->psc_spievent; in au1550_spi_pio_irq_callback()
554 dev_err(hw->dev, "Unexpected IRQ!\n"); in au1550_spi_pio_irq_callback()
568 dev_err(hw->dev, in au1550_spi_pio_irq_callback()
571 complete(&hw->host_done); in au1550_spi_pio_irq_callback()
576 * while there is something to read from rx fifo in au1550_spi_pio_irq_callback()
581 stat = hw->regs->psc_spistat; in au1550_spi_pio_irq_callback()
585 * Take care to not let the Rx FIFO overflow. in au1550_spi_pio_irq_callback()
593 if (!(stat & PSC_SPISTAT_RE) && hw->rx_count < hw->len) { in au1550_spi_pio_irq_callback()
594 hw->rx_word(hw); in au1550_spi_pio_irq_callback()
597 if (!(stat & PSC_SPISTAT_TF) && hw->tx_count < hw->len) in au1550_spi_pio_irq_callback()
598 hw->tx_word(hw); in au1550_spi_pio_irq_callback()
602 hw->regs->psc_spievent = PSC_SPIEVNT_RR | PSC_SPIEVNT_TR; in au1550_spi_pio_irq_callback()
608 * of Figure 8-4 with flowchart for SPI host operation: in au1550_spi_pio_irq_callback()
612 * Rx FIFO Overflow, or Multiple-host Error in au1550_spi_pio_irq_callback()
621 hw->regs->psc_spievent = PSC_SPIEVNT_TU | PSC_SPIEVNT_MD; in au1550_spi_pio_irq_callback()
623 hw->regs->psc_spipcr = PSC_SPIPCR_MS; in au1550_spi_pio_irq_callback()
627 if (hw->rx_count >= hw->len) { in au1550_spi_pio_irq_callback()
630 complete(&hw->host_done); in au1550_spi_pio_irq_callback()
637 struct au1550_spi *hw = spi_controller_get_devdata(spi->controller); in au1550_spi_txrx_bufs()
639 return hw->txrx_bufs(spi, t); in au1550_spi_txrx_bufs()
646 return hw->irq_callback(hw); in au1550_spi_irq()
652 if (hw->usedma) { in au1550_spi_bits_handlers_set()
653 hw->txrx_bufs = &au1550_spi_dma_txrxb; in au1550_spi_bits_handlers_set()
654 hw->irq_callback = &au1550_spi_dma_irq_callback; in au1550_spi_bits_handlers_set()
656 hw->rx_word = &au1550_spi_rx_word_8; in au1550_spi_bits_handlers_set()
657 hw->tx_word = &au1550_spi_tx_word_8; in au1550_spi_bits_handlers_set()
658 hw->txrx_bufs = &au1550_spi_pio_txrxb; in au1550_spi_bits_handlers_set()
659 hw->irq_callback = &au1550_spi_pio_irq_callback; in au1550_spi_bits_handlers_set()
662 hw->rx_word = &au1550_spi_rx_word_16; in au1550_spi_bits_handlers_set()
663 hw->tx_word = &au1550_spi_tx_word_16; in au1550_spi_bits_handlers_set()
664 hw->txrx_bufs = &au1550_spi_pio_txrxb; in au1550_spi_bits_handlers_set()
665 hw->irq_callback = &au1550_spi_pio_irq_callback; in au1550_spi_bits_handlers_set()
667 hw->rx_word = &au1550_spi_rx_word_32; in au1550_spi_bits_handlers_set()
668 hw->tx_word = &au1550_spi_tx_word_32; in au1550_spi_bits_handlers_set()
669 hw->txrx_bufs = &au1550_spi_pio_txrxb; in au1550_spi_bits_handlers_set()
670 hw->irq_callback = &au1550_spi_pio_irq_callback; in au1550_spi_bits_handlers_set()
679 hw->regs->psc_ctrl = PSC_CTRL_DISABLE; in au1550_spi_setup_psc_as_spi()
681 hw->regs->psc_sel = PSC_SEL_PS_SPIMODE; in au1550_spi_setup_psc_as_spi()
684 hw->regs->psc_spicfg = 0; in au1550_spi_setup_psc_as_spi()
687 hw->regs->psc_ctrl = PSC_CTRL_ENABLE; in au1550_spi_setup_psc_as_spi()
691 stat = hw->regs->psc_spistat; in au1550_spi_setup_psc_as_spi()
696 cfg = hw->usedma ? 0 : PSC_SPICFG_DD_DISABLE; in au1550_spi_setup_psc_as_spi()
699 /* use minimal allowed brg and div values as initial setting: */ in au1550_spi_setup_psc_as_spi()
706 hw->regs->psc_spicfg = cfg; in au1550_spi_setup_psc_as_spi()
711 hw->regs->psc_spicfg |= PSC_SPICFG_DE_ENABLE; in au1550_spi_setup_psc_as_spi()
715 stat = hw->regs->psc_spistat; in au1550_spi_setup_psc_as_spi()
730 host = spi_alloc_host(&pdev->dev, sizeof(struct au1550_spi)); in au1550_spi_probe()
732 dev_err(&pdev->dev, "No memory for spi_controller\n"); in au1550_spi_probe()
733 err = -ENOMEM; in au1550_spi_probe()
737 /* the spi->mode bits understood by this driver: */ in au1550_spi_probe()
738 host->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST; in au1550_spi_probe()
739 host->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 24); in au1550_spi_probe()
743 hw->host = host; in au1550_spi_probe()
744 hw->pdata = dev_get_platdata(&pdev->dev); in au1550_spi_probe()
745 hw->dev = &pdev->dev; in au1550_spi_probe()
747 if (hw->pdata == NULL) { in au1550_spi_probe()
748 dev_err(&pdev->dev, "No platform data supplied\n"); in au1550_spi_probe()
749 err = -ENOENT; in au1550_spi_probe()
755 dev_err(&pdev->dev, "no IRQ\n"); in au1550_spi_probe()
756 err = -ENODEV; in au1550_spi_probe()
759 hw->irq = r->start; in au1550_spi_probe()
761 hw->usedma = 0; in au1550_spi_probe()
764 hw->dma_tx_id = r->start; in au1550_spi_probe()
767 hw->dma_rx_id = r->start; in au1550_spi_probe()
769 if (pdev->dev.dma_mask == NULL) in au1550_spi_probe()
770 dev_warn(&pdev->dev, "no dma mask\n"); in au1550_spi_probe()
772 hw->usedma = 1; in au1550_spi_probe()
779 dev_err(&pdev->dev, "no mmio resource\n"); in au1550_spi_probe()
780 err = -ENODEV; in au1550_spi_probe()
784 hw->ioarea = request_mem_region(r->start, sizeof(psc_spi_t), in au1550_spi_probe()
785 pdev->name); in au1550_spi_probe()
786 if (!hw->ioarea) { in au1550_spi_probe()
787 dev_err(&pdev->dev, "Cannot reserve iomem region\n"); in au1550_spi_probe()
788 err = -ENXIO; in au1550_spi_probe()
792 hw->regs = (psc_spi_t __iomem *)ioremap(r->start, sizeof(psc_spi_t)); in au1550_spi_probe()
793 if (!hw->regs) { in au1550_spi_probe()
794 dev_err(&pdev->dev, "cannot ioremap\n"); in au1550_spi_probe()
795 err = -ENXIO; in au1550_spi_probe()
801 init_completion(&hw->host_done); in au1550_spi_probe()
803 hw->bitbang.master = hw->host; in au1550_spi_probe()
804 hw->bitbang.setup_transfer = au1550_spi_setupxfer; in au1550_spi_probe()
805 hw->bitbang.chipselect = au1550_spi_chipsel; in au1550_spi_probe()
806 hw->bitbang.txrx_bufs = au1550_spi_txrx_bufs; in au1550_spi_probe()
808 if (hw->usedma) { in au1550_spi_probe()
809 hw->dma_tx_ch = au1xxx_dbdma_chan_alloc(ddma_memid, in au1550_spi_probe()
810 hw->dma_tx_id, NULL, (void *)hw); in au1550_spi_probe()
811 if (hw->dma_tx_ch == 0) { in au1550_spi_probe()
812 dev_err(&pdev->dev, in au1550_spi_probe()
813 "Cannot allocate tx dma channel\n"); in au1550_spi_probe()
814 err = -ENXIO; in au1550_spi_probe()
817 au1xxx_dbdma_set_devwidth(hw->dma_tx_ch, 8); in au1550_spi_probe()
818 if (au1xxx_dbdma_ring_alloc(hw->dma_tx_ch, in au1550_spi_probe()
820 dev_err(&pdev->dev, in au1550_spi_probe()
821 "Cannot allocate tx dma descriptors\n"); in au1550_spi_probe()
822 err = -ENXIO; in au1550_spi_probe()
827 hw->dma_rx_ch = au1xxx_dbdma_chan_alloc(hw->dma_rx_id, in au1550_spi_probe()
829 if (hw->dma_rx_ch == 0) { in au1550_spi_probe()
830 dev_err(&pdev->dev, in au1550_spi_probe()
831 "Cannot allocate rx dma channel\n"); in au1550_spi_probe()
832 err = -ENXIO; in au1550_spi_probe()
835 au1xxx_dbdma_set_devwidth(hw->dma_rx_ch, 8); in au1550_spi_probe()
836 if (au1xxx_dbdma_ring_alloc(hw->dma_rx_ch, in au1550_spi_probe()
838 dev_err(&pdev->dev, in au1550_spi_probe()
839 "Cannot allocate rx dma descriptors\n"); in au1550_spi_probe()
840 err = -ENXIO; in au1550_spi_probe()
847 dev_err(&pdev->dev, in au1550_spi_probe()
848 "Cannot allocate initial rx dma tmp buffer\n"); in au1550_spi_probe()
855 err = request_irq(hw->irq, au1550_spi_irq, 0, pdev->name, hw); in au1550_spi_probe()
857 dev_err(&pdev->dev, "Cannot claim IRQ\n"); in au1550_spi_probe()
861 host->bus_num = pdev->id; in au1550_spi_probe()
862 host->num_chipselect = hw->pdata->num_chipselect; in au1550_spi_probe()
865 * precompute valid range for spi freq - from au1550 datasheet: in au1550_spi_probe()
877 host->max_speed_hz = hw->pdata->mainclk_hz / min_div; in au1550_spi_probe()
878 host->min_speed_hz = in au1550_spi_probe()
879 hw->pdata->mainclk_hz / (max_div + 1) + 1; in au1550_spi_probe()
884 err = spi_bitbang_start(&hw->bitbang); in au1550_spi_probe()
886 dev_err(&pdev->dev, "Failed to register SPI host\n"); in au1550_spi_probe()
890 dev_info(&pdev->dev, in au1550_spi_probe()
892 host->bus_num, host->num_chipselect); in au1550_spi_probe()
897 free_irq(hw->irq, hw); in au1550_spi_probe()
904 if (hw->usedma) in au1550_spi_probe()
905 au1xxx_dbdma_chan_free(hw->dma_rx_ch); in au1550_spi_probe()
909 if (hw->usedma) in au1550_spi_probe()
910 au1xxx_dbdma_chan_free(hw->dma_tx_ch); in au1550_spi_probe()
913 iounmap((void __iomem *)hw->regs); in au1550_spi_probe()
916 release_mem_region(r->start, sizeof(psc_spi_t)); in au1550_spi_probe()
920 spi_controller_put(hw->host); in au1550_spi_probe()
930 dev_info(&pdev->dev, "spi host remove: bus_num=%d\n", in au1550_spi_remove()
931 hw->host->bus_num); in au1550_spi_remove()
933 spi_bitbang_stop(&hw->bitbang); in au1550_spi_remove()
934 free_irq(hw->irq, hw); in au1550_spi_remove()
935 iounmap((void __iomem *)hw->regs); in au1550_spi_remove()
936 release_mem_region(hw->ioarea->start, sizeof(psc_spi_t)); in au1550_spi_remove()
938 if (hw->usedma) { in au1550_spi_remove()
940 au1xxx_dbdma_chan_free(hw->dma_rx_ch); in au1550_spi_remove()
941 au1xxx_dbdma_chan_free(hw->dma_tx_ch); in au1550_spi_remove()
944 spi_controller_put(hw->host); in au1550_spi_remove()
948 MODULE_ALIAS("platform:au1550-spi");
954 .name = "au1550-spi",
970 return -ENODEV; in au1550_spi_init()
976 printk(KERN_ERR "au1550-spi: cannot add memory dbdma device\n"); in au1550_spi_init()