116 static u32 spireg_read(struct a3700_spi *a3700_spi, u32 offset)  in spireg_read()  function
130 	val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG);  in a3700_spi_auto_cs_unset()
139 	val = spireg_read(a3700_spi, A3700_SPI_IF_CTRL_REG);  in a3700_spi_activate_cs()
149 	val = spireg_read(a3700_spi, A3700_SPI_IF_CTRL_REG);  in a3700_spi_deactivate_cs()
159 	val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG);  in a3700_spi_pin_mode_set()
189 	val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG);  in a3700_spi_fifo_mode_set()
202 	val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG);  in a3700_spi_mode_set()
232 	val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG);  in a3700_spi_clock_set()
239 		val = spireg_read(a3700_spi, A3700_SPI_IF_TIME_REG);  in a3700_spi_clock_set()
249 	val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG);  in a3700_spi_bytelen_set()
264 	val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG);  in a3700_spi_fifo_flush()
269 		val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG);  in a3700_spi_fifo_flush()
285 	val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG);  in a3700_spi_init()
291 	val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG);  in a3700_spi_init()
324 	cause = spireg_read(a3700_spi, A3700_SPI_INT_STAT_REG);  in a3700_spi_interrupt()
354 	ctrl_reg = spireg_read(a3700_spi, A3700_SPI_IF_CTRL_REG);  in a3700_spi_wait_completion()
380 	ctrl_reg = spireg_read(a3700_spi, A3700_SPI_IF_CTRL_REG);  in a3700_spi_wait_completion()
406 	val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG);  in a3700_spi_fifo_thres_set()
489 	val = spireg_read(a3700_spi, A3700_SPI_IF_CTRL_REG);  in a3700_is_wfifo_full()
509 	u32 val = spireg_read(a3700_spi, A3700_SPI_IF_CTRL_REG);  in a3700_is_rfifo_empty()
519 		val = spireg_read(a3700_spi, A3700_SPI_DATA_IN_REG);  in a3700_spi_fifo_read()
550 	val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG);  in a3700_spi_transfer_abort_fifo()
555 		val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG);  in a3700_spi_transfer_abort_fifo()
629 		val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG);  in a3700_spi_transfer_one_fifo()
635 		val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG);  in a3700_spi_transfer_one_fifo()
709 		val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG);  in a3700_spi_transfer_one_fifo()
715 		val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG);  in a3700_spi_transfer_one_fifo()
765 		while (!(spireg_read(a3700_spi, A3700_SPI_IF_CTRL_REG) &  in a3700_spi_transfer_one_full_duplex()
769 		val = spireg_read(a3700_spi, A3700_SPI_DATA_IN_REG);  in a3700_spi_transfer_one_full_duplex()