Lines Matching refs:core_min_uV

31 	int core_min_uV, cpu_min_uV;  member
47 int core_min_uV = 0; in tegra20_core_limit() local
67 if (tegra->core_min_uV > 0) in tegra20_core_limit()
68 return tegra->core_min_uV; in tegra20_core_limit()
76 err = regulator_check_voltage(core_rdev, &core_min_uV, &core_max_uV); in tegra20_core_limit()
85 tegra->core_min_uV = core_max_uV; in tegra20_core_limit()
87 pr_info("core voltage initialized to %duV\n", tegra->core_min_uV); in tegra20_core_limit()
89 return tegra->core_min_uV; in tegra20_core_limit()
140 int core_min_uV, core_max_uV = INT_MAX; in tegra20_core_rtc_update() local
161 core_min_uV = tegra20_core_limit(tegra, core_rdev); in tegra20_core_rtc_update()
162 if (core_min_uV < 0) in tegra20_core_rtc_update()
163 return core_min_uV; in tegra20_core_rtc_update()
165 err = regulator_check_voltage(core_rdev, &core_min_uV, &core_max_uV); in tegra20_core_rtc_update()
169 err = regulator_check_consumers(core_rdev, &core_min_uV, &core_max_uV, in tegra20_core_rtc_update()
176 core_min_uV = clamp(tegra20_core_nominal_uV(), in tegra20_core_rtc_update()
177 core_min_uV, core_max_uV); in tegra20_core_rtc_update()
183 core_min_uV = max(cpu_min_uV + 125000, core_min_uV); in tegra20_core_rtc_update()
184 if (core_min_uV > core_max_uV) in tegra20_core_rtc_update()
203 rtc_min_uV = max(cpu_min_uV + 125000, core_min_uV - max_spread); in tegra20_core_rtc_update()
209 while (core_uV != core_min_uV || rtc_uV != rtc_min_uV) { in tegra20_core_rtc_update()
210 if (core_uV < core_min_uV) { in tegra20_core_rtc_update()
211 core_target_uV = min(core_uV + max_spread, core_min_uV); in tegra20_core_rtc_update()
214 core_target_uV = max(core_uV - max_spread, core_min_uV); in tegra20_core_rtc_update()