Lines Matching defs:qla_hw_data
4068 struct qla_hw_data { struct
4069 struct pci_dev *pdev;
4072 mempool_t *srb_mempool;
4073 u8 port_name[WWN_SIZE];
4075 volatile struct {
4142 } flags;
4144 uint16_t max_exchg;
4145 uint16_t lr_distance; /* 32G & above */
4156 spinlock_t hardware_lock ____cacheline_aligned;
4157 int bars;
4158 int mem_only;
4159 device_reg_t *iobase; /* Base I/O address */
4160 resource_size_t pio_address;
4163 dma_addr_t bar0_hdl;
4165 void __iomem *cregbase;
4166 dma_addr_t bar2_hdl;
4170 uint32_t rqstq_intr_code;
4171 uint32_t mbx_intr_code;
4172 uint32_t req_que_len;
4173 uint32_t rsp_que_len;
4174 uint32_t req_que_off;
4175 uint32_t rsp_que_off;
4176 unsigned long eeh_jif;
4179 device_reg_t *mqiobase;
4180 device_reg_t *msixbase;
4181 uint16_t msix_count;
4182 uint8_t mqenable;
4183 struct req_que **req_q_map;
4184 struct rsp_que **rsp_q_map;
4185 struct qla_qpair **queue_pair_map;
4186 struct qla_qpair **qp_cpu_map;
4187 unsigned long req_qid_map[(QLA_MAX_QUEUES / 8) / sizeof(unsigned long)];
4188 unsigned long rsp_qid_map[(QLA_MAX_QUEUES / 8) / sizeof(unsigned long)];
4189 unsigned long qpair_qid_map[(QLA_MAX_QUEUES / 8)
4191 uint8_t max_req_queues;
4192 uint8_t max_rsp_queues;
4193 uint8_t max_qpairs;
4194 uint8_t num_qpairs;
4195 struct qla_qpair *base_qpair;
4196 struct qla_npiv_entry *npiv_info;
4197 uint16_t nvram_npiv_size;
4199 uint16_t switch_cap;
4205 uint8_t port_no; /* Physical port of adapter */
4206 uint8_t exch_starvation;
4209 uint8_t loop_down_abort_time; /* port down timer */
4210 atomic_t loop_down_timer; /* loop down timer */
4211 uint8_t link_down_timeout; /* link down timeout */
4212 uint16_t max_loop_id;
4213 uint16_t max_fibre_devices; /* Maximum number of targets */
4215 uint16_t fb_rev;
4216 uint16_t min_external_loopid; /* First external loop Id */
4228 uint16_t link_data_rate; /* F/W operating speed */
4229 uint16_t set_data_rate; /* Set by user */
4231 uint8_t current_topology;
4232 uint8_t prev_topology;
4238 uint8_t operating_mode; /* F/W operating mode */
4243 uint8_t interrupts_on;
4244 uint32_t isp_abort_cnt;
4259 uint32_t isp_type;
4289 uint32_t device_type;
4408 uint8_t serial0;
4409 uint8_t serial1;
4410 uint8_t serial2;
4415 uint16_t nvram_size;
4416 uint16_t nvram_base;
4417 void *nvram;
4418 uint16_t vpd_size;
4419 uint16_t vpd_base;
4420 void *vpd;
4422 uint16_t loop_reset_delay;
4423 uint8_t retry_count;
4424 uint8_t login_timeout;
4425 uint16_t r_a_tov;
4426 int port_down_retry_count;
4427 uint8_t mbx_count;
4428 uint8_t aen_mbx_count;
4429 atomic_t num_pend_mbx_stage1;
4430 atomic_t num_pend_mbx_stage2;
4431 uint16_t frame_payload_size;
4433 uint32_t login_retry_count;
4435 ms_iocb_entry_t *ms_iocb;
4436 dma_addr_t ms_iocb_dma;
4437 struct ct_sns_pkt *ct_sns;
4438 dma_addr_t ct_sns_dma;
4440 struct sns_cmd_pkt *sns_cmd;
4441 dma_addr_t sns_cmd_dma;
4447 void *sfp_data;
4448 dma_addr_t sfp_data_dma;
4450 struct qla_flt_header *flt;
4451 dma_addr_t flt_dma;
4454 void *xgmac_data;
4455 dma_addr_t xgmac_data_dma;
4458 void *dcbx_tlv;
4459 dma_addr_t dcbx_tlv_dma;
4461 struct task_struct *dpc_thread;
4462 uint8_t dpc_active; /* DPC routine is active */
4464 dma_addr_t gid_list_dma;
4465 struct gid_list_info *gid_list;
4466 int gid_list_info_size;
4470 struct dma_pool *s_dma_pool;
4472 dma_addr_t init_cb_dma;
4473 init_cb_t *init_cb;
4474 int init_cb_size;
4475 dma_addr_t ex_init_cb_dma;
4476 struct ex_init_cb_81xx *ex_init_cb;
4477 dma_addr_t sf_init_cb_dma;
4478 struct init_sf_cb *sf_init_cb;
4480 void *scm_fpin_els_buff;
4481 uint64_t scm_fpin_els_buff_size;
4482 bool scm_fpin_valid;
4483 bool scm_fpin_payload_size;
4485 void *async_pd;
4486 dma_addr_t async_pd_dma;
4491 void *exlogin_buf;
4492 dma_addr_t exlogin_buf_dma;
4493 uint32_t exlogin_size;
4498 void *exchoffld_buf;
4499 dma_addr_t exchoffld_buf_dma;
4500 int exchoffld_size;
4501 int exchoffld_count;
4504 struct fc_els_flogi plogi_els_payld;
4506 void *swl;
4509 uint16_t mailbox_out[MAILBOX_REGISTER_COUNT];
4510 uint32_t mailbox_out32[MAILBOX_REGISTER_COUNT];
4511 uint32_t aenmb[AEN_MAILBOX_REGISTER_COUNT_FX00];
4513 mbx_cmd_t *mcp;
4514 struct mbx_cmd_32 *mcp32;
4516 unsigned long mbx_cmd_flags;
4521 struct mutex vport_lock; /* Virtual port synchronization */
4522 spinlock_t vport_slock; /* order is hardware_lock, then vport_slock */
4523 struct mutex mq_lock; /* multi-queue synchronization */
4524 struct completion mbx_cmd_comp; /* Serialize mbx access */
4525 struct completion mbx_intr_comp; /* Used for completion notification */
4526 struct completion dcbx_comp; /* For set port config notification */
4527 struct completion lb_portup_comp; /* Used to wait for link up during
4532 int notify_dcbx_comp;
4533 int notify_lb_portup_comp;
4534 struct mutex selflogin_lock;
4537 uint16_t fw_major_version;
4538 uint16_t fw_minor_version;
4539 uint16_t fw_subminor_version;
4540 uint16_t fw_attributes;
4541 uint16_t fw_attributes_h;
4554 uint16_t fw_attributes_ext[2];
4555 uint32_t fw_memory_size;
4556 uint32_t fw_transfer_size;
4557 uint32_t fw_srisc_address;
4562 uint16_t orig_fw_tgt_xcb_count;
4563 uint16_t cur_fw_tgt_xcb_count;
4564 uint16_t orig_fw_xcb_count;
4565 uint16_t cur_fw_xcb_count;
4566 uint16_t orig_fw_iocb_count;
4567 uint16_t cur_fw_iocb_count;
4568 uint16_t fw_max_fcf_count;
4570 uint32_t fw_shared_ram_start;
4571 uint32_t fw_shared_ram_end;
4572 uint32_t fw_ddr_ram_start;
4573 uint32_t fw_ddr_ram_end;
4575 uint16_t fw_options[16]; /* slots: 1,2,3,10,11 */
4576 uint8_t fw_seriallink_options[4];
4577 __le16 fw_seriallink_options24[4];
4579 uint8_t serdes_version[3];
4580 uint8_t mpi_version[3];
4581 uint32_t mpi_capabilities;
4582 uint8_t phy_version[3];
4583 uint8_t pep_version[3];
4586 struct fwdt {
4590 } fwdt[2];
4591 struct qla2xxx_fw_dump *fw_dump;
4592 uint32_t fw_dump_len;
4593 u32 fw_dump_alloc_len;
4594 bool fw_dumped;
4595 unsigned long fw_dump_cap_flags;
4604 int fw_dump_reading;
4605 void *mpi_fw_dump;
4606 u32 mpi_fw_dump_len;
4607 unsigned int mpi_fw_dump_reading:1;
4608 unsigned int mpi_fw_dumped:1;
4609 int prev_minidump_failed;
4610 dma_addr_t eft_dma;
4611 void *eft;
4614 dma_addr_t mctp_dump_dma;
4615 void *mctp_dump;
4616 int mctp_dumped;
4617 int mctp_dump_reading;
4618 uint32_t chain_offset;
4619 struct dentry *dfs_dir;
4620 struct dentry *dfs_fce;
4621 struct dentry *dfs_tgt_counters;
4622 struct dentry *dfs_fw_resource_cnt;
4624 dma_addr_t fce_dma;
4625 void *fce;
4626 uint32_t fce_bufs;
4627 uint16_t fce_mb[8];
4628 uint64_t fce_wr, fce_rd;
4629 struct mutex fce_mutex;
4631 uint32_t pci_attr;
4632 uint16_t chip_revision;
4634 uint16_t product_id[4];
4636 uint8_t model_number[16+1];
4637 char model_desc[80];
4638 uint8_t adapter_id[16+1];
4641 char *optrom_buffer;
4642 uint32_t optrom_size;
4643 int optrom_state;
4647 uint32_t optrom_region_start;
4648 uint32_t optrom_region_size;
4649 struct mutex optrom_mutex;
4655 uint8_t bios_revision[2];
4656 uint8_t efi_revision[2];
4657 uint8_t fcode_revision[16];
4658 uint32_t fw_revision[4];
4660 uint32_t gold_fw_version[4];
4663 uint32_t flash_conf_off;
4664 uint32_t flash_data_off;
4665 uint32_t nvram_conf_off;
4666 uint32_t nvram_data_off;
4668 uint32_t fdt_wrt_disable;
4669 uint32_t fdt_wrt_enable;
4670 uint32_t fdt_erase_cmd;
4671 uint32_t fdt_block_size;
4672 uint32_t fdt_unprotect_sec_cmd;
4673 uint32_t fdt_protect_sec_cmd;
4674 uint32_t fdt_wrt_sts_reg_cmd;
4676 struct {
4698 uint8_t active_image;
4699 uint8_t active_tmf;
4703 uint16_t beacon_blink_led;
4704 uint8_t beacon_color_state;
4710 uint16_t zio_mode;
4711 uint16_t zio_timer;
4713 struct qla_msix_entry *msix_entries;
4715 struct list_head tmf_pending;
4716 struct list_head tmf_active;
4717 struct list_head vp_list; /* list of VP */
4718 unsigned long vp_idx_map[(MAX_MULTI_ID_FABRIC / 8) /
4720 uint16_t num_vhosts; /* number of vports created */
4721 uint16_t num_vsans; /* number of vsan created */
4722 uint16_t max_npiv_vports; /* 63 or 125 per topoloty */
4723 int cur_vport_count;
4725 struct qla_chip_state_84xx *cs84xx;
4726 struct isp_operations *isp_ops;
4727 struct workqueue_struct *wq;
4728 struct work_struct heartbeat_work;
4729 struct qlfc_fw fw_buf;
4730 unsigned long last_heartbeat_run_jiffies;
4733 struct qla_fcp_prio_cfg *fcp_prio_cfg;
4735 struct dma_pool *dl_dma_pool;
4738 struct dma_pool *fcp_cmnd_dma_pool;
4739 mempool_t *ctx_mempool;
4742 void __iomem *nx_pcibase; /* Base I/O address */
4743 void __iomem *nxdb_rd_ptr; /* Doorbell read pointer */
4744 void __iomem *nxdb_wr_ptr; /* Door bell write pointer */
4746 uint32_t crb_win;
4747 uint32_t curr_window;
4748 uint32_t ddr_mn_window;
4749 unsigned long mn_win_crb;
4750 unsigned long ms_win_crb;
4751 int qdr_sn_window;
4752 uint32_t fcoe_dev_init_timeout;
4753 uint32_t fcoe_reset_timeout;
4754 rwlock_t hw_lock;
4755 uint16_t portnum; /* port number */
4756 int link_width;
4757 struct fw_blob *hablob;
4758 struct qla82xx_legacy_intr_set nx_legacy_intr;
4760 uint8_t fw_type;
4761 uint32_t file_prd_off; /* File firmware product offset */
4763 uint32_t md_template_size;
4764 void *md_tmplt_hdr;
4765 dma_addr_t md_tmplt_hdr_dma;
4766 void *md_dump;
4767 uint32_t md_dump_size;
4769 void *loop_id_map;
4772 uint32_t idc_audit_ts;
4773 uint32_t idc_extend_tmo;
4776 struct workqueue_struct *dpc_lp_wq;
4777 struct work_struct idc_aen;
4779 struct workqueue_struct *dpc_hp_wq;
4780 struct work_struct nic_core_reset;
4781 struct work_struct idc_state_handler;
4782 struct work_struct nic_core_unrecoverable;
4783 struct work_struct board_disable;
4785 struct mr_data_fx00 mr;
4786 uint32_t chip_reset;
4788 struct qlt_hw_data tgt;
4789 int allow_cna_fw_dump;
4790 uint32_t fw_ability_mask;
4791 uint16_t min_supported_speed;
4792 uint16_t max_supported_speed;
4795 struct dma_pool *dif_bundl_pool;
4797 struct {
4824 struct qla_hw_data_stat stat; argument
4825 pci_error_state_t pci_error_state;
4826 struct dma_pool *purex_dma_pool;
4827 struct btree_head32 host_map;
4831 void *edif_rx_sa_id_map;
4832 void *edif_tx_sa_id_map;
4833 spinlock_t sadb_fp_lock;
4835 struct list_head sadb_tx_index_list;
4836 struct list_head sadb_rx_index_list;
4837 spinlock_t sadb_lock; /* protects list */
4838 struct els_reject elsrej;
4839 u8 edif_post_stop_cnt_down;
4840 struct qla_vp_map *vp_map;
4841 struct qla_nvme_fc_rjt lsrjt;
4842 struct qla_fw_res fwres ____cacheline_aligned;