scsi/pm8001/pm80xx_hwi.h

64 #define OPC_INB_SMP_ABORT			20	/* 0x014 */
118 #define OPC_OUB_FW_FLASH_UPDATE				20	/* 0x014 */
279 	/* Byte 20 */
326 	/* Byte 20 */
348  * brief the data structure of PHY Start Command
360  * brief the data structure of PHY Start Command
410  * brief the data structure of SATA Completion Response
421  * brief the data structure of SAS HW Event Notification
435  * brief the data structure for thermal event notification
444  * brief the data structure of REGISTER DEVICE Command
459  * brief the data structure of DEREGISTER DEVICE Command
471  * brief the data structure of DEVICE_REGISTRATION Response
482  * brief the data structure of Local PHY Control Command
492  * brief the data structure of Local Phy Control Response
506  * brief the data structure of PORT Control Command
519  * brief the data structure of HW Event Ack Command
531  * brief the data structure of PHY_START Response Command
542  * brief the data structure of PHY_STOP Response Command
553  * brief the data structure of SSP Completion Response
568  * brief the data structure of SATA EVNET response
591  * brief the data structure of SSP EVNET esponse
614  * brief the data structure of General Event Notification Response
626  * brief the data structure of SMP Request Command
653  * brief the data structure of SMP Completion Response
664  *brief the data structure of SSP SMP SATA Abort Command
676  * brief the data structure of SSP SATA SMP Abort Response
687  * brief the data structure of SAS Diagnostic Start/End Command
697  * brief the data structure of SAS Diagnostic Execute Command
714  * brief the data structure of Set Device State Command
725  * brief the data structure of SATA Start Command
746 	__le32	key_index_mode;	/* dword 20 */
761  * brief the data structure of SSP INI TM Start Command
789  * brief the data structure of SSP INI IO Start Command
810 	__le32	key_cmode;	/* dword 20 */
825  * brief the data structure for SSP_INI_DIF_ENC_IO COMMAND
861  * brief the data structure of Firmware download
879  * brief the data structure of FW_FLASH_UPDATE Response
890  * brief the data structure of Get NVM Data Command
916  * brief the data structure for SET CONTROLLER CONFIG COMMAND
926  * brief the data structure for GET CONTROLLER CONFIG COMMAND
937  * brief the data structure for KEK_MANAGEMENT COMMAND
949  * brief the data structure for DEK_MANAGEMENT COMMAND
964  * brief the data structure for SET PHY PROFILE COMMAND
974  * brief the data structure for GET PHY PROFILE COMMAND
984  * brief the data structure for EXT FLASH PARTITION
1012  * brief the data structure of Get NVMD Data Response
1023  * brief the data structure of SAS Diagnostic Start/End Response
1034  * brief the data structure of SAS Diagnostic Execute Response
1047  * brief the data structure of Set Device State Response
1061  * brief the data structure for SET CONTROLLER CONFIG COMMAND
1129 /* brief data structure for SAS protocol timer configuration page.
1526 #define PSPA_PHYSTATE10_OFFSET		0x50 /* DWORD V+20 */
1662  * As we know sleep (1~20) ms may result in sleep longer than ~20 ms, hence we
1663  * choose 20 ms interval.
1665 #define FW_READY_INTERVAL	20