Lines Matching refs:pm8001_mr32
143 accum_len = pm8001_mr32(fatal_table_address, in pm80xx_get_fatal_dump()
291 pm8001_mr32(fatal_table_address, in pm80xx_get_fatal_dump()
295 if (pm8001_mr32(fatal_table_address, in pm80xx_get_fatal_dump()
314 reg_val = pm8001_mr32(fatal_table_address, in pm80xx_get_fatal_dump()
337 reg_val = pm8001_mr32(fatal_table_address, in pm80xx_get_fatal_dump()
361 length_to_read = pm8001_mr32(fatal_table_address, in pm80xx_get_fatal_dump()
447 total_len = pm8001_mr32(nonfatal_table_address, in pm80xx_get_non_fatal_dump()
475 reg_val = pm8001_mr32(nonfatal_table_address, in pm80xx_get_non_fatal_dump()
495 accum_len = pm8001_mr32(nonfatal_table_address, in pm80xx_get_non_fatal_dump()
522 pm8001_mr32(address, MAIN_SIGNATURE_OFFSET); in read_main_config_table()
524 pm8001_mr32(address, MAIN_INTERFACE_REVISION); in read_main_config_table()
526 pm8001_mr32(address, MAIN_FW_REVISION); in read_main_config_table()
528 pm8001_mr32(address, MAIN_MAX_OUTSTANDING_IO_OFFSET); in read_main_config_table()
530 pm8001_mr32(address, MAIN_MAX_SGL_OFFSET); in read_main_config_table()
532 pm8001_mr32(address, MAIN_CNTRL_CAP_OFFSET); in read_main_config_table()
534 pm8001_mr32(address, MAIN_GST_OFFSET); in read_main_config_table()
536 pm8001_mr32(address, MAIN_IBQ_OFFSET); in read_main_config_table()
538 pm8001_mr32(address, MAIN_OBQ_OFFSET); in read_main_config_table()
542 pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP0_OFFSET); in read_main_config_table()
544 pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP0_LENGTH); in read_main_config_table()
546 pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP1_OFFSET); in read_main_config_table()
548 pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP1_LENGTH); in read_main_config_table()
552 pm8001_mr32(address, MAIN_GPIO_LED_FLAGS_OFFSET); in read_main_config_table()
556 pm8001_mr32(address, MAIN_ANALOG_SETUP_OFFSET); in read_main_config_table()
559 pm8001_mr32(address, MAIN_INT_VECTOR_TABLE_OFFSET); in read_main_config_table()
561 pm8001_mr32(address, MAIN_SAS_PHY_ATTR_TABLE_OFFSET); in read_main_config_table()
564 pm8001_mr32(address, MAIN_PORT_RECOVERY_TIMER); in read_main_config_table()
567 pm8001_mr32(address, MAIN_MPI_ILA_RELEASE_TYPE); in read_main_config_table()
569 pm8001_mr32(address, MAIN_MPI_INACTIVE_FW_VERSION); in read_main_config_table()
599 pm8001_mr32(address, GST_GSTLEN_MPIS_OFFSET); in read_general_status_table()
601 pm8001_mr32(address, GST_IQ_FREEZE_STATE0_OFFSET); in read_general_status_table()
603 pm8001_mr32(address, GST_IQ_FREEZE_STATE1_OFFSET); in read_general_status_table()
605 pm8001_mr32(address, GST_MSGUTCNT_OFFSET); in read_general_status_table()
607 pm8001_mr32(address, GST_IOPTCNT_OFFSET); in read_general_status_table()
609 pm8001_mr32(address, GST_GPIO_INPUT_VAL); in read_general_status_table()
611 pm8001_mr32(address, GST_RERRINFO_OFFSET0); in read_general_status_table()
613 pm8001_mr32(address, GST_RERRINFO_OFFSET1); in read_general_status_table()
615 pm8001_mr32(address, GST_RERRINFO_OFFSET2); in read_general_status_table()
617 pm8001_mr32(address, GST_RERRINFO_OFFSET3); in read_general_status_table()
619 pm8001_mr32(address, GST_RERRINFO_OFFSET4); in read_general_status_table()
621 pm8001_mr32(address, GST_RERRINFO_OFFSET5); in read_general_status_table()
623 pm8001_mr32(address, GST_RERRINFO_OFFSET6); in read_general_status_table()
625 pm8001_mr32(address, GST_RERRINFO_OFFSET7); in read_general_status_table()
635 pm8001_mr32(address, PSPA_PHYSTATE0_OFFSET); in read_phy_attr_table()
637 pm8001_mr32(address, PSPA_PHYSTATE1_OFFSET); in read_phy_attr_table()
639 pm8001_mr32(address, PSPA_PHYSTATE2_OFFSET); in read_phy_attr_table()
641 pm8001_mr32(address, PSPA_PHYSTATE3_OFFSET); in read_phy_attr_table()
643 pm8001_mr32(address, PSPA_PHYSTATE4_OFFSET); in read_phy_attr_table()
645 pm8001_mr32(address, PSPA_PHYSTATE5_OFFSET); in read_phy_attr_table()
647 pm8001_mr32(address, PSPA_PHYSTATE6_OFFSET); in read_phy_attr_table()
649 pm8001_mr32(address, PSPA_PHYSTATE7_OFFSET); in read_phy_attr_table()
651 pm8001_mr32(address, PSPA_PHYSTATE8_OFFSET); in read_phy_attr_table()
653 pm8001_mr32(address, PSPA_PHYSTATE9_OFFSET); in read_phy_attr_table()
655 pm8001_mr32(address, PSPA_PHYSTATE10_OFFSET); in read_phy_attr_table()
657 pm8001_mr32(address, PSPA_PHYSTATE11_OFFSET); in read_phy_attr_table()
659 pm8001_mr32(address, PSPA_PHYSTATE12_OFFSET); in read_phy_attr_table()
661 pm8001_mr32(address, PSPA_PHYSTATE13_OFFSET); in read_phy_attr_table()
663 pm8001_mr32(address, PSPA_PHYSTATE14_OFFSET); in read_phy_attr_table()
665 pm8001_mr32(address, PSPA_PHYSTATE15_OFFSET); in read_phy_attr_table()
668 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID0_OFFSET); in read_phy_attr_table()
670 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID1_OFFSET); in read_phy_attr_table()
672 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID2_OFFSET); in read_phy_attr_table()
674 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID3_OFFSET); in read_phy_attr_table()
676 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID4_OFFSET); in read_phy_attr_table()
678 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID5_OFFSET); in read_phy_attr_table()
680 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID6_OFFSET); in read_phy_attr_table()
682 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID7_OFFSET); in read_phy_attr_table()
684 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID8_OFFSET); in read_phy_attr_table()
686 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID9_OFFSET); in read_phy_attr_table()
688 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID10_OFFSET); in read_phy_attr_table()
690 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID11_OFFSET); in read_phy_attr_table()
692 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID12_OFFSET); in read_phy_attr_table()
694 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID13_OFFSET); in read_phy_attr_table()
696 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID14_OFFSET); in read_phy_attr_table()
698 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID15_OFFSET); in read_phy_attr_table()
713 get_pci_bar_index(pm8001_mr32(address, in read_inbnd_queue_table()
716 pm8001_mr32(address, (offset + IB_PIPCI_BAR_OFFSET)); in read_inbnd_queue_table()
731 get_pci_bar_index(pm8001_mr32(address, in read_outbnd_queue_table()
734 pm8001_mr32(address, (offset + OB_CIPCI_BAR_OFFSET)); in read_outbnd_queue_table()
796 get_pci_bar_index(pm8001_mr32(addressib, in init_default_table_values()
799 pm8001_mr32(addressib, (offsetib + 0x18)); in init_default_table_values()
830 get_pci_bar_index(pm8001_mr32(addressob, in init_default_table_values()
833 pm8001_mr32(addressob, (offsetob + 0x18)); in init_default_table_values()
876 pm8001_mr32(address, MAIN_FATAL_ERROR_INTERRUPT)); in update_main_config_table()
889 pm8001_mr32(address, MAIN_GPIO_LED_FLAGS_OFFSET)); in update_main_config_table()
1022 pm8001_mr32(pm8001_ha->general_stat_tbl_addr, in mpi_init_check()
1138 value = pm8001_mr32(pm8001_ha->main_cfg_tbl_addr, 0); in init_pci_device_addresses()
1538 pm8001_mr32(pm8001_ha->general_stat_tbl_addr, in mpi_uninit_check()