Lines Matching full:byte
109 } __packed mem_type:5; /* Byte 0 Bits 0-4 */
110 unsigned rsvd:1; /* Byte 0 Bit 5 */
111 unsigned mem_parity:1; /* Byte 0 Bit 6 */
112 unsigned mem_ecc:1; /* Byte 0 Bit 7 */
132 unsigned char rsvd1; /* Byte 0 */
137 } __packed bus; /* Byte 1 */
170 } __packed ctlr_type; /* Byte 2 */
171 unsigned char rsvd2; /* Byte 3 */
173 unsigned char bus_width; /* Byte 6 */
174 unsigned char flash_code; /* Byte 7 */
175 unsigned char ports_present; /* Byte 8 */
181 unsigned char fw_major_version; /* Byte 64 */
182 unsigned char fw_minor_version; /* Byte 65 */
183 unsigned char fw_turn_number; /* Byte 66 */
184 unsigned char fw_build_number; /* Byte 67 */
185 unsigned char fw_release_day; /* Byte 68 */
186 unsigned char fw_release_month; /* Byte 69 */
187 unsigned char fw_release_year_hi; /* Byte 70 */
188 unsigned char fw_release_year_lo; /* Byte 71 */
190 unsigned char hw_rev; /* Byte 72 */
192 unsigned char hw_release_day; /* Byte 76 */
193 unsigned char hw_release_month; /* Byte 77 */
194 unsigned char hw_release_year_hi; /* Byte 78 */
195 unsigned char hw_release_year_lo; /* Byte 79 */
197 unsigned char manuf_batch_num; /* Byte 80 */
198 unsigned char rsvd6; /* Byte 81 */
199 unsigned char manuf_plant_num; /* Byte 82 */
200 unsigned char rsvd7; /* Byte 83 */
201 unsigned char hw_manuf_day; /* Byte 84 */
202 unsigned char hw_manuf_month; /* Byte 85 */
203 unsigned char hw_manuf_year_hi; /* Byte 86 */
204 unsigned char hw_manuf_year_lo; /* Byte 87 */
205 unsigned char max_pd_per_xld; /* Byte 88 */
206 unsigned char max_ild_per_xld; /* Byte 89 */
208 unsigned char max_xld; /* Byte 92 */
215 unsigned char oem_code; /* Byte 131 */
218 unsigned char bbu_present:1; /* Byte 148 Bit 0 */
219 unsigned char cluster_mode:1; /* Byte 148 Bit 1 */
220 unsigned char rsvd11:6; /* Byte 148 Bits 2-7 */
223 unsigned char pscan_active:1; /* Byte 152 Bit 0 */
224 unsigned char rsvd13:7; /* Byte 152 Bits 1-7 */
225 unsigned char pscan_chan; /* Byte 153 */
226 unsigned char pscan_target; /* Byte 154 */
227 unsigned char pscan_lun; /* Byte 155 */
241 unsigned char physchan_present; /* Byte 176 */
242 unsigned char virtchan_present; /* Byte 177 */
243 unsigned char physchan_max; /* Byte 178 */
244 unsigned char virtchan_max; /* Byte 179 */
253 unsigned char mem_data_width; /* Byte 222 */
254 struct myrs_mem_type mem_type; /* Byte 223 */
261 unsigned char exec_mem_data_width; /* Byte 254 */
262 struct myrs_mem_type exec_mem_type; /* Byte 255 */
312 unsigned char flash_type; /* Byte 416 */
313 unsigned char rsvd23; /* Byte 417 */
320 unsigned char rbld_rate; /* Byte 448 */
321 unsigned char bg_init_rate; /* Byte 449 */
322 unsigned char fg_init_rate; /* Byte 450 */
323 unsigned char cc_rate; /* Byte 451 */
331 unsigned installation_abort_status:1; /* Byte 476 Bit 0 */
332 unsigned maint_mode_status:1; /* Byte 476 Bit 1 */
333 unsigned rsvd26:6; /* Byte 476 Bits 2-7 */
406 unsigned char ctlr; /* Byte 0 */
407 unsigned char channel; /* Byte 1 */
408 unsigned char target; /* Byte 2 */
409 unsigned char lun; /* Byte 3 */
410 enum myrs_devstate dev_state; /* Byte 4 */
411 unsigned char raid_level; /* Byte 5 */
412 enum myrs_stripe_size stripe_size; /* Byte 6 */
413 enum myrs_cacheline_size cacheline_size; /* Byte 7 */
421 } __packed rce:3; /* Byte 8 Bits 0-2 */
428 } __packed wce:3; /* Byte 8 Bits 3-5 */
429 unsigned rsvd1:1; /* Byte 8 Bit 6 */
430 unsigned ldev_init_done:1; /* Byte 8 Bit 7 */
431 } ldev_control; /* Byte 8 */
433 unsigned char cc_active:1; /* Byte 9 Bit 0 */
434 unsigned char rbld_active:1; /* Byte 9 Bit 1 */
435 unsigned char bg_init_active:1; /* Byte 9 Bit 2 */
436 unsigned char fg_init_active:1; /* Byte 9 Bit 3 */
437 unsigned char migration_active:1; /* Byte 9 Bit 4 */
438 unsigned char patrol_active:1; /* Byte 9 Bit 5 */
439 unsigned char rsvd2:2; /* Byte 9 Bits 6-7 */
440 unsigned char raid5_writeupdate; /* Byte 10 */
441 unsigned char raid5_algo; /* Byte 11 */
444 unsigned char bios_disabled:1; /* Byte 14 Bit 0 */
445 unsigned char cdrom_boot:1; /* Byte 14 Bit 1 */
446 unsigned char drv_coercion:1; /* Byte 14 Bit 2 */
447 unsigned char write_same_disabled:1; /* Byte 14 Bit 3 */
448 unsigned char hba_mode:1; /* Byte 14 Bit 4 */
454 } __packed drv_geom:2; /* Byte 14 Bits 5-6 */
455 unsigned char super_ra_enabled:1; /* Byte 14 Bit 7 */
456 unsigned char rsvd3; /* Byte 15 */
488 unsigned char rsvd1; /* Byte 0 */
489 unsigned char channel; /* Byte 1 */
490 unsigned char target; /* Byte 2 */
491 unsigned char lun; /* Byte 3 */
493 unsigned char pdev_fault_tolerant:1; /* Byte 4 Bit 0 */
494 unsigned char pdev_connected:1; /* Byte 4 Bit 1 */
495 unsigned char pdev_local_to_ctlr:1; /* Byte 4 Bit 2 */
496 unsigned char rsvd2:5; /* Byte 4 Bits 3-7 */
498 unsigned char remote_host_dead:1; /* Byte 5 Bit 0 */
499 unsigned char remove_ctlr_dead:1; /* Byte 5 Bit 1 */
500 unsigned char rsvd3:6; /* Byte 5 Bits 2-7 */
501 enum myrs_devstate dev_state; /* Byte 6 */
502 unsigned char nego_data_width; /* Byte 7 */
505 unsigned char num_ports; /* Byte 10 */
506 unsigned char drv_access_bitmap; /* Byte 11 */
511 unsigned char cc_in_progress:1; /* Byte 34 Bit 0 */
512 unsigned char rbld_in_progress:1; /* Byte 34 Bit 1 */
513 unsigned char makecc_in_progress:1; /* Byte 34 Bit 2 */
514 unsigned char pdevinit_in_progress:1; /* Byte 34 Bit 3 */
515 unsigned char migration_in_progress:1; /* Byte 34 Bit 4 */
516 unsigned char patrol_in_progress:1; /* Byte 34 Bit 5 */
517 unsigned char rsvd5:2; /* Byte 34 Bits 6-7 */
518 unsigned char long_op_status; /* Byte 35 */
519 unsigned char parity_errs; /* Byte 36 */
520 unsigned char soft_errs; /* Byte 37 */
521 unsigned char hard_errs; /* Byte 38 */
522 unsigned char misc_errs; /* Byte 39 */
523 unsigned char cmd_timeouts; /* Byte 40 */
524 unsigned char retries; /* Byte 41 */
525 unsigned char aborts; /* Byte 42 */
526 unsigned char pred_failures; /* Byte 43 */
577 unsigned char rsvd1; /* Byte 12 */
578 unsigned char channel; /* Byte 13 */
579 unsigned char target; /* Byte 14 */
580 unsigned char lun; /* Byte 15 */
590 unsigned char fua:1; /* Byte 0 Bit 0 */
591 unsigned char disable_pgout:1; /* Byte 0 Bit 1 */
592 unsigned char rsvd1:1; /* Byte 0 Bit 2 */
593 unsigned char add_sge_mem:1; /* Byte 0 Bit 3 */
594 unsigned char dma_ctrl_to_host:1; /* Byte 0 Bit 4 */
595 unsigned char rsvd2:1; /* Byte 0 Bit 5 */
596 unsigned char no_autosense:1; /* Byte 0 Bit 6 */
597 unsigned char disc_prohibited:1; /* Byte 0 Bit 7 */
604 unsigned char tmo_val:6; /* Byte 0 Bits 0-5 */
610 } __packed tmo_scale:2; /* Byte 0 Bits 6-7 */
617 unsigned char lun; /* Byte 0 */
618 unsigned char target; /* Byte 1 */
619 unsigned char channel:3; /* Byte 2 Bits 0-2 */
620 unsigned char ctlr:5; /* Byte 2 Bits 3-7 */
628 unsigned char rsvd:3; /* Byte 2 Bits 0-2 */
629 unsigned char ctlr:5; /* Byte 2 Bits 3-7 */
652 unsigned char prev_boot_ctlr; /* Byte 4 */
653 unsigned char prev_boot_channel; /* Byte 5 */
654 unsigned char prev_boot_target; /* Byte 6 */
655 unsigned char prev_boot_lun; /* Byte 7 */
683 * 64 Byte DAC960 V2 Firmware Command Mailbox structure.
689 enum myrs_cmd_opcode opcode; /* Byte 2 */
690 struct myrs_cmd_ctrl control; /* Byte 3 */
692 unsigned char dma_num; /* Byte 7 */
695 struct myrs_cmd_tmo tmo; /* Byte 19 */
696 unsigned char sense_len; /* Byte 20 */
697 enum myrs_ioctl_opcode ioctl_opcode; /* Byte 21 */
703 enum myrs_cmd_opcode opcode; /* Byte 2 */
704 struct myrs_cmd_ctrl control; /* Byte 3 */
708 struct myrs_cmd_tmo tmo; /* Byte 19 */
709 unsigned char sense_len; /* Byte 20 */
710 unsigned char cdb_len; /* Byte 21 */
716 enum myrs_cmd_opcode opcode; /* Byte 2 */
717 struct myrs_cmd_ctrl control; /* Byte 3 */
721 struct myrs_cmd_tmo tmo; /* Byte 19 */
722 unsigned char sense_len; /* Byte 20 */
723 unsigned char cdb_len; /* Byte 21 */
730 enum myrs_cmd_opcode opcode; /* Byte 2 */
731 struct myrs_cmd_ctrl control; /* Byte 3 */
733 unsigned char dma_num; /* Byte 7 */
736 unsigned char ctlr_num; /* Byte 18 */
737 struct myrs_cmd_tmo tmo; /* Byte 19 */
738 unsigned char sense_len; /* Byte 20 */
739 enum myrs_ioctl_opcode ioctl_opcode; /* Byte 21 */
745 enum myrs_cmd_opcode opcode; /* Byte 2 */
746 struct myrs_cmd_ctrl control; /* Byte 3 */
748 unsigned char dma_num; /* Byte 7 */
751 struct myrs_cmd_tmo tmo; /* Byte 19 */
752 unsigned char sense_len; /* Byte 20 */
753 enum myrs_ioctl_opcode ioctl_opcode; /* Byte 21 */
759 enum myrs_cmd_opcode opcode; /* Byte 2 */
760 struct myrs_cmd_ctrl control; /* Byte 3 */
762 unsigned char dma_num; /* Byte 7 */
765 struct myrs_cmd_tmo tmo; /* Byte 19 */
766 unsigned char sense_len; /* Byte 20 */
767 enum myrs_ioctl_opcode ioctl_opcode; /* Byte 21 */
773 enum myrs_cmd_opcode opcode; /* Byte 2 */
774 struct myrs_cmd_ctrl control; /* Byte 3 */
776 unsigned char dma_num; /* Byte 7 */
779 unsigned char ctlr_num; /* Byte 18 */
780 struct myrs_cmd_tmo tmo; /* Byte 19 */
781 unsigned char sense_len; /* Byte 20 */
782 enum myrs_ioctl_opcode ioctl_opcode; /* Byte 21 */
789 enum myrs_cmd_opcode opcode; /* Byte 2 */
790 struct myrs_cmd_ctrl control; /* Byte 3 */
792 unsigned char dma_num; /* Byte 7 */
798 struct myrs_cmd_tmo tmo; /* Byte 19 */
799 unsigned char sense_len; /* Byte 20 */
800 enum myrs_ioctl_opcode ioctl_opcode; /* Byte 21 */
801 enum myrs_devstate state; /* Byte 22 */
807 enum myrs_cmd_opcode opcode; /* Byte 2 */
808 struct myrs_cmd_ctrl control; /* Byte 3 */
810 unsigned char dma_num; /* Byte 7 */
813 struct myrs_cmd_tmo tmo; /* Byte 19 */
814 unsigned char sense_len; /* Byte 20 */
815 enum myrs_ioctl_opcode ioctl_opcode; /* Byte 21 */
816 unsigned char restore_consistency:1; /* Byte 22 Bit 0 */
817 unsigned char initialized_area_only:1; /* Byte 22 Bit 1 */
818 unsigned char rsvd1:6; /* Byte 22 Bits 2-7 */
824 enum myrs_cmd_opcode opcode; /* Byte 2 */
825 struct myrs_cmd_ctrl control; /* Byte 3 */
826 unsigned char first_cmd_mbox_size_kb; /* Byte 4 */
827 unsigned char first_stat_mbox_size_kb; /* Byte 5 */
828 unsigned char second_cmd_mbox_size_kb; /* Byte 6 */
829 unsigned char second_stat_mbox_size_kb; /* Byte 7 */
832 struct myrs_cmd_tmo tmo; /* Byte 19 */
833 unsigned char sense_len; /* Byte 20 */
834 enum myrs_ioctl_opcode ioctl_opcode; /* Byte 21 */
835 unsigned char fwstat_buf_size_kb; /* Byte 22 */
836 unsigned char rsvd2; /* Byte 23 */
845 enum myrs_cmd_opcode opcode; /* Byte 2 */
846 struct myrs_cmd_ctrl control; /* Byte 3 */
848 unsigned char dma_num; /* Byte 7 */
851 struct myrs_cmd_tmo tmo; /* Byte 19 */
852 unsigned char sense_len; /* Byte 20 */
853 enum myrs_ioctl_opcode ioctl_opcode; /* Byte 21 */
854 enum myrs_opdev opdev; /* Byte 22 */
865 unsigned char status; /* Byte 2 */
866 unsigned char sense_len; /* Byte 3 */