Lines Matching refs:dw0

352 /* dw0 */
407 /* dw0 */
469 	u32 dw0;
479 	__le32 dw0;
486 	/* dw0 */
1212 		prot->dw0 |= T10_INSRT_EN_MSK;
1216 		prot->dw0 |= (T10_RMV_EN_MSK | T10_CHK_EN_MSK);
1221 		prot->dw0 |= T10_CHK_EN_MSK;
1226 		prot->dw0 |= T10_INSRT_EN_MSK;
1230 		prot->dw0 |= (T10_RMV_EN_MSK | T10_CHK_EN_MSK);
1234 		prot->dw0 |= T10_CHK_EN_MSK;
1247 		prot->dw0 |= (0x1 << USR_DATA_BLOCK_SZ_OFF);
1250 		prot->dw0 |= (0x2 << USR_DATA_BLOCK_SZ_OFF);
1258 	prot->dw0 |= INCR_LBRT_MSK;
1277 	hdr->dw0 = cpu_to_le32((1 << CMD_HDR_RESP_REPORT_OFF) |
1401 	/* dw0 */
1402 	hdr->dw0 = cpu_to_le32((port->id << CMD_HDR_PORT_OFF) |
1437 	hdr->dw0 = cpu_to_le32(port->id << CMD_HDR_PORT_OFF);
1439 		hdr->dw0 |= cpu_to_le32(3 << CMD_HDR_CMD_OFF);
1442 		hdr->dw0 |= cpu_to_le32((1U << phy_id)
1444 		hdr->dw0 |= CMD_HDR_FORCE_PHY_MSK;
1445 		hdr->dw0 |= cpu_to_le32(4U << CMD_HDR_CMD_OFF);
1518 	/* dw0 */
1519 	hdr->dw0 = cpu_to_le32((5U << CMD_HDR_CMD_OFF) | /* abort */
2203 	u32 dw0, dw3;
2205 	dw0 = le32_to_cpu(complete_hdr->dw0);
2208 	return (dw0 & ERR_PHASE_RESPONSE_FRAME_REV_STAGE_MSK) &&
2228 	u32 dw0 = le32_to_cpu(complete_hdr->dw0);
2238 			if (!(dw0 & CMPLT_HDR_RSPNS_GOOD_MSK) &&
2239 			    (dw0 & CMPLT_HDR_RSPNS_XFRD_MSK))
2255 		if ((dw0 & CMPLT_HDR_RSPNS_XFRD_MSK) &&
2277 		if (dw0 & CMPLT_HDR_RSPNS_XFRD_MSK)
2304 	u32 dw0, dw1, dw3;
2327 	dw0 = le32_to_cpu(complete_hdr->dw0);
2334 	switch ((dw0 & CMPLT_HDR_ABORT_STAT_MSK) >> CMPLT_HDR_ABORT_STAT_OFF) {
2357 	if ((dw0 & CMPLT_HDR_CMPLT_MSK) == 0x3) {
2365 					dw0, dw1, complete_hdr->act, dw3,
2405 		if (dw0 & CMPLT_HDR_RSPNS_XFRD_MSK)
2464 		u32 dw0, dw1, dw3;
2468 		dw0 = le32_to_cpu(complete_hdr->dw0);
2473 		if (unlikely((dw0 & CMPLT_HDR_CMPLT_MSK) == 0x3) &&
2484 				device_id, itct->sas_addr, dw0, dw1,