721 #define ERR_ON_TX_PHASE(err_phase) (err_phase == 0x2 || \  argument
722 		err_phase == 0x4 || err_phase == 0x8 ||\
723 		err_phase == 0x6 || err_phase == 0xa)
724 #define ERR_ON_RX_PHASE(err_phase) (err_phase == 0x10 || \  argument
725 		err_phase == 0x20 || err_phase == 0x40)
2018 			   int err_phase)  in slot_err_v2_hw()  argument
2035 	if (err_phase == 1) {  in slot_err_v2_hw()
2041 	} else if (err_phase == 2) {  in slot_err_v2_hw()
2393 		u32 err_phase = (dw0 & CMPLT_HDR_ERR_PHASE_MSK)  in slot_complete_v2_hw()  local
2398 		if (ERR_ON_TX_PHASE(err_phase))  in slot_complete_v2_hw()
2400 		else if (ERR_ON_RX_PHASE(err_phase))  in slot_complete_v2_hw()