Lines Matching +full:a +full:- +full:hlm
1 // SPDX-License-Identifier: GPL-2.0
8 * All common (i.e. transport-independent) SLI-4 functions are implemented
24 /* Convert queue type enum (SLI_QTYPE_*) into a string */
35 * sli_config_cmd_init() - Write a SLI_CONFIG command to the provided buffer.
40 * @dma: DMA buffer for non-embedded commands.
50 if (length > sizeof(config->payload.embed) && !dma) { in sli_config_cmd_init()
60 config->hdr.command = SLI4_MBX_CMD_SLI_CONFIG; in sli_config_cmd_init()
63 config->dw1_flags = cpu_to_le32(flags); in sli_config_cmd_init()
64 config->payload_len = cpu_to_le32(length); in sli_config_cmd_init()
65 return config->payload.embed; in sli_config_cmd_init()
70 config->dw1_flags = cpu_to_le32(flags); in sli_config_cmd_init()
72 config->payload.mem.addr.low = cpu_to_le32(lower_32_bits(dma->phys)); in sli_config_cmd_init()
73 config->payload.mem.addr.high = cpu_to_le32(upper_32_bits(dma->phys)); in sli_config_cmd_init()
74 config->payload.mem.length = in sli_config_cmd_init()
75 cpu_to_le32(dma->size & SLI4_SLICONF_PMD_LEN); in sli_config_cmd_init()
76 config->payload_len = cpu_to_le32(dma->size); in sli_config_cmd_init()
78 sli4->bmbx_non_emb_pmd = dma; in sli_config_cmd_init()
79 return dma->virt; in sli_config_cmd_init()
83 * sli_cmd_common_create_cq() - Write a COMMON_CREATE_CQ V2 command.
89 * Return: status -EIO/0.
107 n_cqe = qmem->size / SLI4_CQE_BYTES; in sli_cmd_common_create_cq()
119 return -EIO; in sli_cmd_common_create_cq()
121 num_pages = sli_page_count(qmem->size, page_size); in sli_cmd_common_create_cq()
128 return -EIO; in sli_cmd_common_create_cq()
131 sli_cmd_fill_hdr(&cqv2->hdr, SLI4_CMN_CREATE_CQ, SLI4_SUBSYSTEM_COMMON, in sli_cmd_common_create_cq()
133 cqv2->page_size = page_size / SLI_PAGE_SIZE; in sli_cmd_common_create_cq()
136 cqv2->num_pages = cpu_to_le16(num_pages); in sli_cmd_common_create_cq()
138 return -EIO; in sli_cmd_common_create_cq()
152 cqv2->cqe_count = cpu_to_le16(n_cqe); in sli_cmd_common_create_cq()
156 return -EIO; in sli_cmd_common_create_cq()
159 if (sli4->if_type == SLI4_INTF_IF_TYPE_6) in sli_cmd_common_create_cq()
165 cqv2->dw5_flags = cpu_to_le32(dw5_flags); in sli_cmd_common_create_cq()
166 cqv2->dw6w1_arm = cpu_to_le16(dw6w1_arm); in sli_cmd_common_create_cq()
167 cqv2->eq_id = cpu_to_le16(eq_id); in sli_cmd_common_create_cq()
169 for (p = 0, addr = qmem->phys; p < num_pages; p++, addr += page_size) { in sli_cmd_common_create_cq()
170 cqv2->page_phys_addr[p].low = cpu_to_le32(lower_32_bits(addr)); in sli_cmd_common_create_cq()
171 cqv2->page_phys_addr[p].high = cpu_to_le32(upper_32_bits(addr)); in sli_cmd_common_create_cq()
190 return -EIO; in sli_cmd_common_create_eq()
192 if (sli4->if_type == SLI4_INTF_IF_TYPE_6) in sli_cmd_common_create_eq()
197 sli_cmd_fill_hdr(&eq->hdr, SLI4_CMN_CREATE_EQ, SLI4_SUBSYSTEM_COMMON, in sli_cmd_common_create_eq()
201 num_pages = qmem->size / SLI_PAGE_SIZE; in sli_cmd_common_create_eq()
202 eq->num_pages = cpu_to_le16(num_pages); in sli_cmd_common_create_eq()
219 return -EIO; in sli_cmd_common_create_eq()
222 if (sli4->if_type == SLI4_INTF_IF_TYPE_6) in sli_cmd_common_create_eq()
227 eq->dw5_flags = cpu_to_le32(dw5_flags); in sli_cmd_common_create_eq()
228 eq->dw6_flags = cpu_to_le32(dw6_flags); in sli_cmd_common_create_eq()
229 eq->dw7_delaymulti = cpu_to_le32(SLI4_CREATE_EQ_DELAYMULTI); in sli_cmd_common_create_eq()
231 for (p = 0, addr = qmem->phys; p < num_pages; in sli_cmd_common_create_eq()
233 eq->page_address[p].low = cpu_to_le32(lower_32_bits(addr)); in sli_cmd_common_create_eq()
234 eq->page_address[p].high = cpu_to_le32(upper_32_bits(addr)); in sli_cmd_common_create_eq()
253 return -EIO; in sli_cmd_common_create_mq_ext()
255 sli_cmd_fill_hdr(&mq->hdr, SLI4_CMN_CREATE_MQ_EXT, in sli_cmd_common_create_mq_ext()
260 num_pages = qmem->size / SLI_PAGE_SIZE; in sli_cmd_common_create_mq_ext()
261 mq->num_pages = cpu_to_le16(num_pages); in sli_cmd_common_create_mq_ext()
277 return -EIO; in sli_cmd_common_create_mq_ext()
280 mq->async_event_bitmap = cpu_to_le32(SLI4_ASYNC_EVT_FC_ALL); in sli_cmd_common_create_mq_ext()
282 if (sli4->params.mq_create_version) { in sli_cmd_common_create_mq_ext()
283 mq->cq_id_v1 = cpu_to_le16(cq_id); in sli_cmd_common_create_mq_ext()
284 mq->hdr.dw3_version = cpu_to_le32(CMD_V1); in sli_cmd_common_create_mq_ext()
288 mq->dw7_val = cpu_to_le32(SLI4_CREATE_MQEXT_VAL); in sli_cmd_common_create_mq_ext()
290 mq->dw6w1_flags = cpu_to_le16(dw6w1_flags); in sli_cmd_common_create_mq_ext()
291 for (p = 0, addr = qmem->phys; p < num_pages; in sli_cmd_common_create_mq_ext()
293 mq->page_phys_addr[p].low = cpu_to_le32(lower_32_bits(addr)); in sli_cmd_common_create_mq_ext()
294 mq->page_phys_addr[p].high = cpu_to_le32(upper_32_bits(addr)); in sli_cmd_common_create_mq_ext()
313 return -EIO; in sli_cmd_wq_create()
315 sli_cmd_fill_hdr(&wq->hdr, SLI4_OPC_WQ_CREATE, SLI4_SUBSYSTEM_FC, in sli_cmd_wq_create()
317 n_wqe = qmem->size / sli4->wqe_size; in sli_cmd_wq_create()
319 switch (qmem->size) { in sli_cmd_wq_create()
339 return -EIO; in sli_cmd_wq_create()
342 /* valid values for number of pages(num_pages): 1-8 */ in sli_cmd_wq_create()
343 num_pages = sli_page_count(qmem->size, page_size); in sli_cmd_wq_create()
344 wq->num_pages = cpu_to_le16(num_pages); in sli_cmd_wq_create()
346 return -EIO; in sli_cmd_wq_create()
348 wq->cq_id = cpu_to_le16(cq_id); in sli_cmd_wq_create()
350 wq->page_size = page_size / SLI_PAGE_SIZE; in sli_cmd_wq_create()
352 if (sli4->wqe_size == SLI4_WQE_EXT_BYTES) in sli_cmd_wq_create()
353 wq->wqe_size_byte |= SLI4_WQE_EXT_SIZE; in sli_cmd_wq_create()
355 wq->wqe_size_byte |= SLI4_WQE_SIZE; in sli_cmd_wq_create()
357 wq->wqe_count = cpu_to_le16(n_wqe); in sli_cmd_wq_create()
359 for (p = 0, addr = qmem->phys; p < num_pages; p++, addr += page_size) { in sli_cmd_wq_create()
360 wq->page_phys_addr[p].low = cpu_to_le32(lower_32_bits(addr)); in sli_cmd_wq_create()
361 wq->page_phys_addr[p].high = cpu_to_le32(upper_32_bits(addr)); in sli_cmd_wq_create()
379 return -EIO; in sli_cmd_rq_create_v1()
381 sli_cmd_fill_hdr(&rq->hdr, SLI4_OPC_RQ_CREATE, SLI4_SUBSYSTEM_FC, in sli_cmd_rq_create_v1()
384 rq->dim_dfd_dnb |= SLI4_RQ_CREATE_V1_DNB; in sli_cmd_rq_create_v1()
386 /* valid values for number of pages: 1-8 (sec 4.5.6) */ in sli_cmd_rq_create_v1()
387 num_pages = sli_page_count(qmem->size, SLI_PAGE_SIZE); in sli_cmd_rq_create_v1()
388 rq->num_pages = cpu_to_le16(num_pages); in sli_cmd_rq_create_v1()
393 return -EIO; in sli_cmd_rq_create_v1()
399 rq->rqe_count = cpu_to_le16(qmem->size / SLI4_RQE_SIZE); in sli_cmd_rq_create_v1()
401 rq->rqe_size_byte |= SLI4_RQE_SIZE_8; in sli_cmd_rq_create_v1()
403 rq->page_size = SLI4_RQ_PAGE_SIZE_4096; in sli_cmd_rq_create_v1()
405 if (buffer_size < sli4->rq_min_buf_size || in sli_cmd_rq_create_v1()
406 buffer_size > sli4->rq_max_buf_size) { in sli_cmd_rq_create_v1()
407 efc_log_err(sli4, "buffer_size %d out of range (%d-%d)\n", in sli_cmd_rq_create_v1()
408 buffer_size, sli4->rq_min_buf_size, in sli_cmd_rq_create_v1()
409 sli4->rq_max_buf_size); in sli_cmd_rq_create_v1()
410 return -EIO; in sli_cmd_rq_create_v1()
412 rq->buffer_size = cpu_to_le32(buffer_size); in sli_cmd_rq_create_v1()
414 rq->cq_id = cpu_to_le16(cq_id); in sli_cmd_rq_create_v1()
416 for (p = 0, addr = qmem->phys; in sli_cmd_rq_create_v1()
419 rq->page_phys_addr[p].low = cpu_to_le32(lower_32_bits(addr)); in sli_cmd_rq_create_v1()
420 rq->page_phys_addr[p].high = cpu_to_le32(upper_32_bits(addr)); in sli_cmd_rq_create_v1()
439 page_count = sli_page_count(qs[0]->dma.size, SLI_PAGE_SIZE) * num_rqs; in sli_cmd_rq_create_v2()
446 dma->size = payload_size; in sli_cmd_rq_create_v2()
447 dma->virt = dma_alloc_coherent(&sli4->pci->dev, dma->size, in sli_cmd_rq_create_v2()
448 &dma->phys, GFP_KERNEL); in sli_cmd_rq_create_v2()
449 if (!dma->virt) in sli_cmd_rq_create_v2()
450 return -EIO; in sli_cmd_rq_create_v2()
452 memset(dma->virt, 0, payload_size); in sli_cmd_rq_create_v2()
454 req = sli_config_cmd_init(sli4, sli4->bmbx.virt, payload_size, dma); in sli_cmd_rq_create_v2()
456 return -EIO; in sli_cmd_rq_create_v2()
459 sli_cmd_fill_hdr(&req->hdr, SLI4_OPC_RQ_CREATE, SLI4_SUBSYSTEM_FC, in sli_cmd_rq_create_v2()
462 req->dim_dfd_dnb |= SLI4_RQCREATEV2_DNB; in sli_cmd_rq_create_v2()
463 num_pages = sli_page_count(qs[0]->dma.size, SLI_PAGE_SIZE); in sli_cmd_rq_create_v2()
464 req->num_pages = cpu_to_le16(num_pages); in sli_cmd_rq_create_v2()
465 req->rqe_count = cpu_to_le16(qs[0]->dma.size / SLI4_RQE_SIZE); in sli_cmd_rq_create_v2()
466 req->rqe_size_byte |= SLI4_RQE_SIZE_8; in sli_cmd_rq_create_v2()
467 req->page_size = SLI4_RQ_PAGE_SIZE_4096; in sli_cmd_rq_create_v2()
468 req->rq_count = num_rqs; in sli_cmd_rq_create_v2()
469 req->base_cq_id = cpu_to_le16(base_cq_id); in sli_cmd_rq_create_v2()
470 req->hdr_buffer_size = cpu_to_le16(header_buffer_size); in sli_cmd_rq_create_v2()
471 req->payload_buffer_size = cpu_to_le16(payload_buffer_size); in sli_cmd_rq_create_v2()
474 for (p = 0, addr = qs[i]->dma.phys; p < num_pages; in sli_cmd_rq_create_v2()
476 req->page_phys_addr[offset].low = in sli_cmd_rq_create_v2()
478 req->page_phys_addr[offset].high = in sli_cmd_rq_create_v2()
490 if (!q->dma.size) in __sli_queue_destroy()
493 dma_free_coherent(&sli4->pci->dev, q->dma.size, in __sli_queue_destroy()
494 q->dma.virt, q->dma.phys); in __sli_queue_destroy()
495 memset(&q->dma, 0, sizeof(struct efc_dma)); in __sli_queue_destroy()
502 if (q->dma.virt) { in __sli_queue_init()
504 return -EIO; in __sli_queue_init()
509 q->dma.size = size * n_entries; in __sli_queue_init()
510 q->dma.virt = dma_alloc_coherent(&sli4->pci->dev, q->dma.size, in __sli_queue_init()
511 &q->dma.phys, GFP_KERNEL); in __sli_queue_init()
512 if (!q->dma.virt) { in __sli_queue_init()
513 memset(&q->dma, 0, sizeof(struct efc_dma)); in __sli_queue_init()
515 return -EIO; in __sli_queue_init()
518 memset(q->dma.virt, 0, size * n_entries); in __sli_queue_init()
520 spin_lock_init(&q->lock); in __sli_queue_init()
522 q->type = qtype; in __sli_queue_init()
523 q->size = size; in __sli_queue_init()
524 q->length = n_entries; in __sli_queue_init()
526 if (q->type == SLI4_QTYPE_EQ || q->type == SLI4_QTYPE_CQ) { in __sli_queue_init()
528 * a sweep through eq and cq in __sli_queue_init()
530 q->phase = 1; in __sli_queue_init()
534 q->proc_limit = n_entries / 2; in __sli_queue_init()
536 if (q->type == SLI4_QTYPE_EQ) in __sli_queue_init()
537 q->posted_limit = q->length / 2; in __sli_queue_init()
539 q->posted_limit = 64; in __sli_queue_init()
551 return -EIO; in sli_fc_rq_alloc()
553 if (sli_cmd_rq_create_v1(sli4, sli4->bmbx.virt, &q->dma, cq->id, in sli_fc_rq_alloc()
560 if (is_hdr && q->id & 1) { in sli_fc_rq_alloc()
561 efc_log_info(sli4, "bad header RQ_ID %d\n", q->id); in sli_fc_rq_alloc()
563 } else if (!is_hdr && (q->id & 1) == 0) { in sli_fc_rq_alloc()
564 efc_log_info(sli4, "bad data RQ_ID %d\n", q->id); in sli_fc_rq_alloc()
569 q->u.flag |= SLI4_QUEUE_FLAG_HDR; in sli_fc_rq_alloc()
571 q->u.flag &= ~SLI4_QUEUE_FLAG_HDR; in sli_fc_rq_alloc()
577 return -EIO; in sli_fc_rq_alloc()
611 if (sli4->if_type == SLI4_INTF_IF_TYPE_6) in sli_fc_rq_set_alloc()
612 db_regaddr = sli4->reg[1] + SLI4_IF6_RQ_DB_REG; in sli_fc_rq_set_alloc()
614 db_regaddr = sli4->reg[0] + SLI4_RQ_DB_REG; in sli_fc_rq_set_alloc()
617 if (rsp->hdr.status) { in sli_fc_rq_set_alloc()
619 rsp->hdr.status, rsp->hdr.additional_status); in sli_fc_rq_set_alloc()
624 qs[i]->id = i + le16_to_cpu(rsp->q_id); in sli_fc_rq_set_alloc()
625 if ((qs[i]->id & 1) == 0) in sli_fc_rq_set_alloc()
626 qs[i]->u.flag |= SLI4_QUEUE_FLAG_HDR; in sli_fc_rq_set_alloc()
628 qs[i]->u.flag &= ~SLI4_QUEUE_FLAG_HDR; in sli_fc_rq_set_alloc()
630 qs[i]->db_regaddr = db_regaddr; in sli_fc_rq_set_alloc()
633 dma_free_coherent(&sli4->pci->dev, dma.size, dma.virt, dma.phys); in sli_fc_rq_set_alloc()
642 dma_free_coherent(&sli4->pci->dev, dma.size, dma.virt, in sli_fc_rq_set_alloc()
645 return -EIO; in sli_fc_rq_set_alloc()
654 if (!buf || sli_config->hdr.command != in sli_res_sli_config()
657 buf ? sli_config->hdr.command : -1); in sli_res_sli_config()
658 return -EIO; in sli_res_sli_config()
661 if (le16_to_cpu(sli_config->hdr.status)) in sli_res_sli_config()
662 return le16_to_cpu(sli_config->hdr.status); in sli_res_sli_config()
664 if (le32_to_cpu(sli_config->dw1_flags) & SLI4_SLICONF_EMB) in sli_res_sli_config()
665 return sli_config->payload.embed[4]; in sli_res_sli_config()
668 return -EIO; in sli_res_sli_config()
678 SLI4_QNAME[q->type]); in __sli_create_queue()
679 return -EIO; in __sli_create_queue()
681 if (sli_res_sli_config(sli4, sli4->bmbx.virt)) { in __sli_create_queue()
683 SLI4_QNAME[q->type]); in __sli_create_queue()
684 return -EIO; in __sli_create_queue()
686 res_q = (void *)((u8 *)sli4->bmbx.virt + in __sli_create_queue()
689 if (res_q->hdr.status) { in __sli_create_queue()
691 SLI4_QNAME[q->type], res_q->hdr.status, in __sli_create_queue()
692 res_q->hdr.additional_status); in __sli_create_queue()
693 return -EIO; in __sli_create_queue()
695 q->id = le16_to_cpu(res_q->q_id); in __sli_create_queue()
696 switch (q->type) { in __sli_create_queue()
698 if (sli4->if_type == SLI4_INTF_IF_TYPE_6) in __sli_create_queue()
699 q->db_regaddr = sli4->reg[1] + SLI4_IF6_EQ_DB_REG; in __sli_create_queue()
701 q->db_regaddr = sli4->reg[0] + SLI4_EQCQ_DB_REG; in __sli_create_queue()
704 if (sli4->if_type == SLI4_INTF_IF_TYPE_6) in __sli_create_queue()
705 q->db_regaddr = sli4->reg[1] + SLI4_IF6_CQ_DB_REG; in __sli_create_queue()
707 q->db_regaddr = sli4->reg[0] + SLI4_EQCQ_DB_REG; in __sli_create_queue()
710 if (sli4->if_type == SLI4_INTF_IF_TYPE_6) in __sli_create_queue()
711 q->db_regaddr = sli4->reg[1] + SLI4_IF6_MQ_DB_REG; in __sli_create_queue()
713 q->db_regaddr = sli4->reg[0] + SLI4_MQ_DB_REG; in __sli_create_queue()
716 if (sli4->if_type == SLI4_INTF_IF_TYPE_6) in __sli_create_queue()
717 q->db_regaddr = sli4->reg[1] + SLI4_IF6_RQ_DB_REG; in __sli_create_queue()
719 q->db_regaddr = sli4->reg[0] + SLI4_RQ_DB_REG; in __sli_create_queue()
722 if (sli4->if_type == SLI4_INTF_IF_TYPE_6) in __sli_create_queue()
723 q->db_regaddr = sli4->reg[1] + SLI4_IF6_WQ_DB_REG; in __sli_create_queue()
725 q->db_regaddr = sli4->reg[0] + SLI4_IO_WQ_DB_REG; in __sli_create_queue()
750 size = sli4->wqe_size; in sli_get_queue_entry_size()
757 return -1; in sli_get_queue_entry_size()
773 return -EIO; in sli_queue_alloc()
777 return -EIO; in sli_queue_alloc()
781 if (!sli_cmd_common_create_eq(sli4, sli4->bmbx.virt, &q->dma) && in sli_queue_alloc()
787 if (!sli_cmd_common_create_cq(sli4, sli4->bmbx.virt, &q->dma, in sli_queue_alloc()
788 assoc ? assoc->id : 0) && in sli_queue_alloc()
794 assoc->u.flag |= SLI4_QUEUE_FLAG_MQ; in sli_queue_alloc()
795 if (!sli_cmd_common_create_mq_ext(sli4, sli4->bmbx.virt, in sli_queue_alloc()
796 &q->dma, assoc->id) && in sli_queue_alloc()
802 if (!sli_cmd_wq_create(sli4, sli4->bmbx.virt, &q->dma, in sli_queue_alloc()
803 assoc ? assoc->id : 0) && in sli_queue_alloc()
813 return -EIO; in sli_queue_alloc()
829 n_cqe = qs[0]->dma.size / SLI4_CQE_BYTES; in sli_cmd_cq_set_create()
841 return -EIO; in sli_cmd_cq_set_create()
845 num_pages_cq = sli_page_count(qs[0]->dma.size, page_bytes); in sli_cmd_cq_set_create()
850 dma->size = payload_size; in sli_cmd_cq_set_create()
851 dma->virt = dma_alloc_coherent(&sli4->pci->dev, dma->size, in sli_cmd_cq_set_create()
852 &dma->phys, GFP_KERNEL); in sli_cmd_cq_set_create()
853 if (!dma->virt) in sli_cmd_cq_set_create()
854 return -EIO; in sli_cmd_cq_set_create()
856 memset(dma->virt, 0, payload_size); in sli_cmd_cq_set_create()
858 req = sli_config_cmd_init(sli4, sli4->bmbx.virt, payload_size, dma); in sli_cmd_cq_set_create()
860 return -EIO; in sli_cmd_cq_set_create()
864 sli_cmd_fill_hdr(&req->hdr, SLI4_CMN_CREATE_CQ_SET, SLI4_SUBSYSTEM_FC, in sli_cmd_cq_set_create()
866 req->page_size = page_size; in sli_cmd_cq_set_create()
868 req->num_pages = cpu_to_le16(num_pages_cq); in sli_cmd_cq_set_create()
885 return -EIO; in sli_cmd_cq_set_create()
890 if (sli4->if_type == SLI4_INTF_IF_TYPE_6) in sli_cmd_cq_set_create()
895 req->dw5_flags = cpu_to_le32(dw5_flags); in sli_cmd_cq_set_create()
896 req->dw6w1_flags = cpu_to_le16(dw6w1_flags); in sli_cmd_cq_set_create()
898 req->num_cq_req = cpu_to_le16(num_cqs); in sli_cmd_cq_set_create()
902 req->eq_id[i] = cpu_to_le16(eqs[i]->id); in sli_cmd_cq_set_create()
903 for (p = 0, addr = qs[i]->dma.phys; p < num_pages_cq; in sli_cmd_cq_set_create()
905 req->page_phys_addr[offset].low = in sli_cmd_cq_set_create()
907 req->page_phys_addr[offset].high = in sli_cmd_cq_set_create()
938 if (sli4->if_type == SLI4_INTF_IF_TYPE_6) in sli_cq_alloc_set()
939 db_regaddr = sli4->reg[1] + SLI4_IF6_CQ_DB_REG; in sli_cq_alloc_set()
941 db_regaddr = sli4->reg[0] + SLI4_EQCQ_DB_REG; in sli_cq_alloc_set()
944 if (res->hdr.status) { in sli_cq_alloc_set()
946 res->hdr.status, res->hdr.additional_status); in sli_cq_alloc_set()
951 if (le16_to_cpu(res->num_q_allocated) != num_cqs) { in sli_cq_alloc_set()
957 qs[i]->id = le16_to_cpu(res->q_id) + i; in sli_cq_alloc_set()
958 qs[i]->db_regaddr = db_regaddr; in sli_cq_alloc_set()
961 dma_free_coherent(&sli4->pci->dev, dma.size, dma.virt, dma.phys); in sli_cq_alloc_set()
970 dma_free_coherent(&sli4->pci->dev, dma.size, dma.virt, in sli_cq_alloc_set()
973 return -EIO; in sli_cq_alloc_set()
982 req = sli_config_cmd_init(sli4, sli4->bmbx.virt, in sli_cmd_common_destroy_q()
985 return -EIO; in sli_cmd_common_destroy_q()
987 sli_cmd_fill_hdr(&req->hdr, opc, subsystem, in sli_cmd_common_destroy_q()
989 req->q_id = cpu_to_le16(q_id); in sli_cmd_common_destroy_q()
1004 return -EIO; in sli_queue_free()
1010 switch (q->type) { in sli_queue_free()
1032 efc_log_info(sli4, "bad queue type %d\n", q->type); in sli_queue_free()
1033 rc = -EIO; in sli_queue_free()
1037 rc = sli_cmd_common_destroy_q(sli4, opcode, subsystem, q->id); in sli_queue_free()
1045 rc = sli_res_sli_config(sli4, sli4->bmbx.virt); in sli_queue_free()
1049 res = (void *)((u8 *)sli4->bmbx.virt + in sli_queue_free()
1051 if (res->status) { in sli_queue_free()
1053 SLI4_QNAME[q->type], res->status, in sli_queue_free()
1054 res->additional_status); in sli_queue_free()
1055 rc = -EIO; in sli_queue_free()
1071 u32 a = arm ? SLI4_EQCQ_ARM : SLI4_EQCQ_UNARM; in sli_queue_eq_arm() local
1073 spin_lock_irqsave(&q->lock, flags); in sli_queue_eq_arm()
1074 if (sli4->if_type == SLI4_INTF_IF_TYPE_6) in sli_queue_eq_arm()
1075 val = sli_format_if6_eq_db_data(q->n_posted, q->id, a); in sli_queue_eq_arm()
1077 val = sli_format_eq_db_data(q->n_posted, q->id, a); in sli_queue_eq_arm()
1079 writel(val, q->db_regaddr); in sli_queue_eq_arm()
1080 q->n_posted = 0; in sli_queue_eq_arm()
1081 spin_unlock_irqrestore(&q->lock, flags); in sli_queue_eq_arm()
1091 u32 a = arm ? SLI4_EQCQ_ARM : SLI4_EQCQ_UNARM; in sli_queue_arm() local
1093 spin_lock_irqsave(&q->lock, flags); in sli_queue_arm()
1095 switch (q->type) { in sli_queue_arm()
1097 if (sli4->if_type == SLI4_INTF_IF_TYPE_6) in sli_queue_arm()
1098 val = sli_format_if6_eq_db_data(q->n_posted, q->id, a); in sli_queue_arm()
1100 val = sli_format_eq_db_data(q->n_posted, q->id, a); in sli_queue_arm()
1102 writel(val, q->db_regaddr); in sli_queue_arm()
1103 q->n_posted = 0; in sli_queue_arm()
1106 if (sli4->if_type == SLI4_INTF_IF_TYPE_6) in sli_queue_arm()
1107 val = sli_format_if6_cq_db_data(q->n_posted, q->id, a); in sli_queue_arm()
1109 val = sli_format_cq_db_data(q->n_posted, q->id, a); in sli_queue_arm()
1111 writel(val, q->db_regaddr); in sli_queue_arm()
1112 q->n_posted = 0; in sli_queue_arm()
1116 SLI4_QNAME[q->type]); in sli_queue_arm()
1119 spin_unlock_irqrestore(&q->lock, flags); in sli_queue_arm()
1127 u8 *qe = q->dma.virt; in sli_wq_write()
1131 qindex = q->index; in sli_wq_write()
1132 qe += q->index * q->size; in sli_wq_write()
1134 if (sli4->params.perf_wq_id_association) in sli_wq_write()
1135 sli_set_wq_id_association(entry, q->id); in sli_wq_write()
1137 memcpy(qe, entry, q->size); in sli_wq_write()
1138 val = sli_format_wq_db_data(q->id); in sli_wq_write()
1140 writel(val, q->db_regaddr); in sli_wq_write()
1141 q->index = (q->index + 1) & (q->length - 1); in sli_wq_write()
1149 u8 *qe = q->dma.virt; in sli_mq_write()
1154 spin_lock_irqsave(&q->lock, flags); in sli_mq_write()
1155 qindex = q->index; in sli_mq_write()
1156 qe += q->index * q->size; in sli_mq_write()
1158 memcpy(qe, entry, q->size); in sli_mq_write()
1159 val = sli_format_mq_db_data(q->id); in sli_mq_write()
1160 writel(val, q->db_regaddr); in sli_mq_write()
1161 q->index = (q->index + 1) & (q->length - 1); in sli_mq_write()
1162 spin_unlock_irqrestore(&q->lock, flags); in sli_mq_write()
1170 u8 *qe = q->dma.virt; in sli_rq_write()
1174 qindex = q->index; in sli_rq_write()
1175 qe += q->index * q->size; in sli_rq_write()
1177 memcpy(qe, entry, q->size); in sli_rq_write()
1180 * In RQ-pair, an RQ either contains the FC header in sli_rq_write()
1185 if (!(q->u.flag & SLI4_QUEUE_FLAG_HDR)) in sli_rq_write()
1188 val = sli_format_rq_db_data(q->id); in sli_rq_write()
1189 writel(val, q->db_regaddr); in sli_rq_write()
1191 q->index = (q->index + 1) & (q->length - 1); in sli_rq_write()
1199 u8 *qe = q->dma.virt; in sli_eq_read()
1203 spin_lock_irqsave(&q->lock, flags); in sli_eq_read()
1205 qe += q->index * q->size; in sli_eq_read()
1208 wflags = le16_to_cpu(((struct sli4_eqe *)qe)->dw0w0_flags); in sli_eq_read()
1210 if ((wflags & SLI4_EQE_VALID) != q->phase) { in sli_eq_read()
1211 spin_unlock_irqrestore(&q->lock, flags); in sli_eq_read()
1212 return -EIO; in sli_eq_read()
1215 if (sli4->if_type != SLI4_INTF_IF_TYPE_6) { in sli_eq_read()
1217 ((struct sli4_eqe *)qe)->dw0w0_flags = cpu_to_le16(wflags); in sli_eq_read()
1220 memcpy(entry, qe, q->size); in sli_eq_read()
1221 q->index = (q->index + 1) & (q->length - 1); in sli_eq_read()
1222 q->n_posted++; in sli_eq_read()
1226 * The value toggles after a complete sweep in sli_eq_read()
1230 if (sli4->if_type == SLI4_INTF_IF_TYPE_6 && q->index == 0) in sli_eq_read()
1231 q->phase ^= (u16)0x1; in sli_eq_read()
1233 spin_unlock_irqrestore(&q->lock, flags); in sli_eq_read()
1241 u8 *qe = q->dma.virt; in sli_cq_read()
1246 spin_lock_irqsave(&q->lock, flags); in sli_cq_read()
1248 qe += q->index * q->size; in sli_cq_read()
1251 dwflags = le32_to_cpu(((struct sli4_mcqe *)qe)->dw3_flags); in sli_cq_read()
1254 if (valid_bit_set != q->phase) { in sli_cq_read()
1255 spin_unlock_irqrestore(&q->lock, flags); in sli_cq_read()
1256 return -EIO; in sli_cq_read()
1259 if (sli4->if_type != SLI4_INTF_IF_TYPE_6) { in sli_cq_read()
1261 ((struct sli4_mcqe *)qe)->dw3_flags = cpu_to_le32(dwflags); in sli_cq_read()
1264 memcpy(entry, qe, q->size); in sli_cq_read()
1265 q->index = (q->index + 1) & (q->length - 1); in sli_cq_read()
1266 q->n_posted++; in sli_cq_read()
1270 * The value toggles after a complete sweep in sli_cq_read()
1274 if (sli4->if_type == SLI4_INTF_IF_TYPE_6 && q->index == 0) in sli_cq_read()
1275 q->phase ^= (u16)0x1; in sli_cq_read()
1277 spin_unlock_irqrestore(&q->lock, flags); in sli_cq_read()
1285 u8 *qe = q->dma.virt; in sli_mq_read()
1288 spin_lock_irqsave(&q->lock, flags); in sli_mq_read()
1290 qe += q->u.r_idx * q->size; in sli_mq_read()
1293 if (q->index == q->u.r_idx) { in sli_mq_read()
1294 spin_unlock_irqrestore(&q->lock, flags); in sli_mq_read()
1295 return -EIO; in sli_mq_read()
1298 memcpy(entry, qe, q->size); in sli_mq_read()
1299 q->u.r_idx = (q->u.r_idx + 1) & (q->length - 1); in sli_mq_read()
1301 spin_unlock_irqrestore(&q->lock, flags); in sli_mq_read()
1318 return -EIO; in sli_eq_parse()
1321 flags = le16_to_cpu(eqe->dw0w0_flags); in sli_eq_parse()
1326 *cq_id = le16_to_cpu(eqe->resource_id); in sli_eq_parse()
1335 rc = -EIO; in sli_eq_parse()
1350 return -EINVAL; in sli_cq_parse()
1353 /* Parse a CQ entry to retrieve the event type and the queue id */ in sli_cq_parse()
1354 if (cq->u.flag & SLI4_QUEUE_FLAG_MQ) { in sli_cq_parse()
1357 if (le32_to_cpu(mcqe->dw3_flags) & SLI4_MCQE_AE) { in sli_cq_parse()
1363 *q_id = -1; in sli_cq_parse()
1377 memset(buf, 0, sli->wqe_size); in sli_abort_wqe()
1381 abort->criteria = SLI4_ABORT_CRITERIA_XRI_TAG; in sli_abort_wqe()
1383 efc_log_warn(sli, "%#x aborting XRI %#x warning non-zero mask", in sli_abort_wqe()
1389 abort->criteria = SLI4_ABORT_CRITERIA_ABORT_TAG; in sli_abort_wqe()
1392 abort->criteria = SLI4_ABORT_CRITERIA_REQUEST_TAG; in sli_abort_wqe()
1396 return -EIO; in sli_abort_wqe()
1399 abort->ia_ir_byte |= send_abts ? 0 : 1; in sli_abort_wqe()
1402 abort->ia_ir_byte |= SLI4_ABRT_WQE_IR; in sli_abort_wqe()
1404 abort->t_mask = cpu_to_le32(mask); in sli_abort_wqe()
1405 abort->t_tag = cpu_to_le32(ids); in sli_abort_wqe()
1406 abort->command = SLI4_WQE_ABORT; in sli_abort_wqe()
1407 abort->request_tag = cpu_to_le16(tag); in sli_abort_wqe()
1409 abort->dw10w0_flags = cpu_to_le16(SLI4_ABRT_WQE_QOSD); in sli_abort_wqe()
1411 abort->cq_id = cpu_to_le16(cq_id); in sli_abort_wqe()
1412 abort->cmdtype_wqec_byte |= SLI4_CMD_ABORT_WQE; in sli_abort_wqe()
1422 struct sli4_sge *sge = sgl->virt; in sli_els_request64_wqe()
1426 memset(buf, 0, sli->wqe_size); in sli_els_request64_wqe()
1428 bptr = &els->els_request_payload; in sli_els_request64_wqe()
1429 if (sli->params.sgl_pre_registered) { in sli_els_request64_wqe()
1430 els->qosd_xbl_hlm_iod_dbde_wqes &= ~SLI4_REQ_WQE_XBL; in sli_els_request64_wqe()
1432 els->qosd_xbl_hlm_iod_dbde_wqes |= SLI4_REQ_WQE_DBDE; in sli_els_request64_wqe()
1433 bptr->bde_type_buflen = in sli_els_request64_wqe()
1435 (params->xmit_len & SLI4_BDE_LEN_MASK)); in sli_els_request64_wqe()
1437 bptr->u.data.low = sge[0].buffer_address_low; in sli_els_request64_wqe()
1438 bptr->u.data.high = sge[0].buffer_address_high; in sli_els_request64_wqe()
1440 els->qosd_xbl_hlm_iod_dbde_wqes |= SLI4_REQ_WQE_XBL; in sli_els_request64_wqe()
1442 bptr->bde_type_buflen = in sli_els_request64_wqe()
1446 bptr->u.blp.low = cpu_to_le32(lower_32_bits(sgl->phys)); in sli_els_request64_wqe()
1447 bptr->u.blp.high = cpu_to_le32(upper_32_bits(sgl->phys)); in sli_els_request64_wqe()
1450 els->els_request_payload_length = cpu_to_le32(params->xmit_len); in sli_els_request64_wqe()
1451 els->max_response_payload_length = cpu_to_le32(params->rsp_len); in sli_els_request64_wqe()
1453 els->xri_tag = cpu_to_le16(params->xri); in sli_els_request64_wqe()
1454 els->timer = params->timeout; in sli_els_request64_wqe()
1455 els->class_byte |= SLI4_GENERIC_CLASS_CLASS_3; in sli_els_request64_wqe()
1457 els->command = SLI4_WQE_ELS_REQUEST64; in sli_els_request64_wqe()
1459 els->request_tag = cpu_to_le16(params->tag); in sli_els_request64_wqe()
1461 els->qosd_xbl_hlm_iod_dbde_wqes |= SLI4_REQ_WQE_IOD; in sli_els_request64_wqe()
1463 els->qosd_xbl_hlm_iod_dbde_wqes |= SLI4_REQ_WQE_QOSD; in sli_els_request64_wqe()
1467 switch (params->cmd) { in sli_els_request64_wqe()
1469 els->cmdtype_elsid_byte |= in sli_els_request64_wqe()
1471 if (params->rpi_registered) { in sli_els_request64_wqe()
1472 els->ct_byte |= in sli_els_request64_wqe()
1474 els->context_tag = cpu_to_le16(params->rpi); in sli_els_request64_wqe()
1476 els->ct_byte |= in sli_els_request64_wqe()
1478 els->context_tag = cpu_to_le16(params->vpi); in sli_els_request64_wqe()
1480 if (params->d_id == FC_FID_FLOGI) in sli_els_request64_wqe()
1484 if (params->d_id == FC_FID_FLOGI) in sli_els_request64_wqe()
1486 if (params->s_id == 0) { in sli_els_request64_wqe()
1487 els->cmdtype_elsid_byte |= in sli_els_request64_wqe()
1491 els->cmdtype_elsid_byte |= in sli_els_request64_wqe()
1494 els->ct_byte |= in sli_els_request64_wqe()
1496 els->context_tag = cpu_to_le16(params->vpi); in sli_els_request64_wqe()
1497 els->sid_sp_dword |= cpu_to_le32(1 << SLI4_REQ_WQE_SP_SHFT); in sli_els_request64_wqe()
1500 els->ct_byte |= in sli_els_request64_wqe()
1502 els->context_tag = cpu_to_le16(params->vpi); in sli_els_request64_wqe()
1504 * Set SP here ... we haven't done a REG_VPI yet in sli_els_request64_wqe()
1511 els->sid_sp_dword |= cpu_to_le32(1 << SLI4_REQ_WQE_SP_SHFT); in sli_els_request64_wqe()
1512 if (params->s_id != U32_MAX) in sli_els_request64_wqe()
1513 els->sid_sp_dword |= cpu_to_le32(params->s_id); in sli_els_request64_wqe()
1516 els->cmdtype_elsid_byte |= in sli_els_request64_wqe()
1518 els->ct_byte |= in sli_els_request64_wqe()
1520 els->context_tag = cpu_to_le16(params->vpi); in sli_els_request64_wqe()
1523 els->cmdtype_elsid_byte |= in sli_els_request64_wqe()
1525 els->ct_byte |= in sli_els_request64_wqe()
1527 els->context_tag = cpu_to_le16(params->vpi); in sli_els_request64_wqe()
1530 els->cmdtype_elsid_byte |= in sli_els_request64_wqe()
1532 if (params->rpi_registered) { in sli_els_request64_wqe()
1533 els->ct_byte |= (SLI4_GENERIC_CONTEXT_RPI << in sli_els_request64_wqe()
1535 els->context_tag = cpu_to_le16(params->vpi); in sli_els_request64_wqe()
1537 els->ct_byte |= in sli_els_request64_wqe()
1539 els->context_tag = cpu_to_le16(params->vpi); in sli_els_request64_wqe()
1545 els->cmdtype_elsid_byte |= SLI4_ELS_REQUEST64_CMD_FABRIC; in sli_els_request64_wqe()
1547 els->cmdtype_elsid_byte |= SLI4_ELS_REQUEST64_CMD_NON_FABRIC; in sli_els_request64_wqe()
1549 els->cq_id = cpu_to_le16(SLI4_CQ_DEFAULT); in sli_els_request64_wqe()
1551 if (((els->ct_byte & SLI4_REQ_WQE_CT) >> SLI4_REQ_WQE_CT_SHFT) != in sli_els_request64_wqe()
1553 els->remote_id_dword = cpu_to_le32(params->d_id); in sli_els_request64_wqe()
1555 if (((els->ct_byte & SLI4_REQ_WQE_CT) >> SLI4_REQ_WQE_CT_SHFT) == in sli_els_request64_wqe()
1557 els->temporary_rpi = cpu_to_le16(params->rpi); in sli_els_request64_wqe()
1571 memset(buf, 0, sli->wqe_size); in sli_fcp_icmnd64_wqe()
1573 if (!sgl || !sgl->virt) { in sli_fcp_icmnd64_wqe()
1575 sgl, sgl ? sgl->virt : NULL); in sli_fcp_icmnd64_wqe()
1576 return -EIO; in sli_fcp_icmnd64_wqe()
1578 sge = sgl->virt; in sli_fcp_icmnd64_wqe()
1579 bptr = &icmnd->bde; in sli_fcp_icmnd64_wqe()
1580 if (sli->params.sgl_pre_registered) { in sli_fcp_icmnd64_wqe()
1581 icmnd->qosd_xbl_hlm_iod_dbde_wqes &= ~SLI4_ICMD_WQE_XBL; in sli_fcp_icmnd64_wqe()
1583 icmnd->qosd_xbl_hlm_iod_dbde_wqes |= SLI4_ICMD_WQE_DBDE; in sli_fcp_icmnd64_wqe()
1584 bptr->bde_type_buflen = in sli_fcp_icmnd64_wqe()
1589 bptr->u.data.low = sge[0].buffer_address_low; in sli_fcp_icmnd64_wqe()
1590 bptr->u.data.high = sge[0].buffer_address_high; in sli_fcp_icmnd64_wqe()
1592 icmnd->qosd_xbl_hlm_iod_dbde_wqes |= SLI4_ICMD_WQE_XBL; in sli_fcp_icmnd64_wqe()
1594 bptr->bde_type_buflen = in sli_fcp_icmnd64_wqe()
1596 (sgl->size & SLI4_BDE_LEN_MASK)); in sli_fcp_icmnd64_wqe()
1598 bptr->u.blp.low = cpu_to_le32(lower_32_bits(sgl->phys)); in sli_fcp_icmnd64_wqe()
1599 bptr->u.blp.high = cpu_to_le32(upper_32_bits(sgl->phys)); in sli_fcp_icmnd64_wqe()
1604 icmnd->payload_offset_length = cpu_to_le16(len); in sli_fcp_icmnd64_wqe()
1605 icmnd->xri_tag = cpu_to_le16(xri); in sli_fcp_icmnd64_wqe()
1606 icmnd->context_tag = cpu_to_le16(rpi); in sli_fcp_icmnd64_wqe()
1607 icmnd->timer = timeout; in sli_fcp_icmnd64_wqe()
1610 icmnd->class_pu_byte |= 2 << SLI4_ICMD_WQE_PU_SHFT; in sli_fcp_icmnd64_wqe()
1611 icmnd->class_pu_byte |= SLI4_GENERIC_CLASS_CLASS_3; in sli_fcp_icmnd64_wqe()
1612 icmnd->command = SLI4_WQE_FCP_ICMND64; in sli_fcp_icmnd64_wqe()
1613 icmnd->dif_ct_bs_byte |= in sli_fcp_icmnd64_wqe()
1616 icmnd->abort_tag = cpu_to_le32(xri); in sli_fcp_icmnd64_wqe()
1618 icmnd->request_tag = cpu_to_le16(tag); in sli_fcp_icmnd64_wqe()
1619 icmnd->len_loc1_byte |= SLI4_ICMD_WQE_LEN_LOC_BIT1; in sli_fcp_icmnd64_wqe()
1620 icmnd->qosd_xbl_hlm_iod_dbde_wqes |= SLI4_ICMD_WQE_LEN_LOC_BIT2; in sli_fcp_icmnd64_wqe()
1621 icmnd->cmd_type_byte |= SLI4_CMD_FCP_ICMND64_WQE; in sli_fcp_icmnd64_wqe()
1622 icmnd->cq_id = cpu_to_le16(cq_id); in sli_fcp_icmnd64_wqe()
1638 memset(buf, 0, sli->wqe_size); in sli_fcp_iread64_wqe()
1640 if (!sgl || !sgl->virt) { in sli_fcp_iread64_wqe()
1642 sgl, sgl ? sgl->virt : NULL); in sli_fcp_iread64_wqe()
1643 return -EIO; in sli_fcp_iread64_wqe()
1646 sge = sgl->virt; in sli_fcp_iread64_wqe()
1647 bptr = &iread->bde; in sli_fcp_iread64_wqe()
1648 if (sli->params.sgl_pre_registered) { in sli_fcp_iread64_wqe()
1649 iread->qosd_xbl_hlm_iod_dbde_wqes &= ~SLI4_IR_WQE_XBL; in sli_fcp_iread64_wqe()
1651 iread->qosd_xbl_hlm_iod_dbde_wqes |= SLI4_IR_WQE_DBDE; in sli_fcp_iread64_wqe()
1653 bptr->bde_type_buflen = in sli_fcp_iread64_wqe()
1658 bptr->u.blp.low = sge[0].buffer_address_low; in sli_fcp_iread64_wqe()
1659 bptr->u.blp.high = sge[0].buffer_address_high; in sli_fcp_iread64_wqe()
1661 iread->qosd_xbl_hlm_iod_dbde_wqes |= SLI4_IR_WQE_XBL; in sli_fcp_iread64_wqe()
1663 bptr->bde_type_buflen = in sli_fcp_iread64_wqe()
1665 (sgl->size & SLI4_BDE_LEN_MASK)); in sli_fcp_iread64_wqe()
1667 bptr->u.blp.low = in sli_fcp_iread64_wqe()
1668 cpu_to_le32(lower_32_bits(sgl->phys)); in sli_fcp_iread64_wqe()
1669 bptr->u.blp.high = in sli_fcp_iread64_wqe()
1670 cpu_to_le32(upper_32_bits(sgl->phys)); in sli_fcp_iread64_wqe()
1678 iread->fcp_cmd_buffer_length = cpu_to_le16(len); in sli_fcp_iread64_wqe()
1688 iread->payload_offset_length = cpu_to_le16(len); in sli_fcp_iread64_wqe()
1689 iread->total_transfer_length = cpu_to_le32(xfer_len); in sli_fcp_iread64_wqe()
1691 iread->xri_tag = cpu_to_le16(xri); in sli_fcp_iread64_wqe()
1692 iread->context_tag = cpu_to_le16(rpi); in sli_fcp_iread64_wqe()
1694 iread->timer = timeout; in sli_fcp_iread64_wqe()
1697 iread->class_pu_byte |= 2 << SLI4_IR_WQE_PU_SHFT; in sli_fcp_iread64_wqe()
1698 iread->class_pu_byte |= SLI4_GENERIC_CLASS_CLASS_3; in sli_fcp_iread64_wqe()
1699 iread->command = SLI4_WQE_FCP_IREAD64; in sli_fcp_iread64_wqe()
1700 iread->dif_ct_bs_byte |= in sli_fcp_iread64_wqe()
1702 iread->dif_ct_bs_byte |= dif; in sli_fcp_iread64_wqe()
1703 iread->dif_ct_bs_byte |= bs << SLI4_IR_WQE_BS_SHFT; in sli_fcp_iread64_wqe()
1705 iread->abort_tag = cpu_to_le32(xri); in sli_fcp_iread64_wqe()
1707 iread->request_tag = cpu_to_le16(tag); in sli_fcp_iread64_wqe()
1708 iread->len_loc1_byte |= SLI4_IR_WQE_LEN_LOC_BIT1; in sli_fcp_iread64_wqe()
1709 iread->qosd_xbl_hlm_iod_dbde_wqes |= SLI4_IR_WQE_LEN_LOC_BIT2; in sli_fcp_iread64_wqe()
1710 iread->qosd_xbl_hlm_iod_dbde_wqes |= SLI4_IR_WQE_IOD; in sli_fcp_iread64_wqe()
1711 iread->cmd_type_byte |= SLI4_CMD_FCP_IREAD64_WQE; in sli_fcp_iread64_wqe()
1712 iread->cq_id = cpu_to_le16(cq_id); in sli_fcp_iread64_wqe()
1714 if (sli->params.perf_hint) { in sli_fcp_iread64_wqe()
1715 bptr = &iread->first_data_bde; in sli_fcp_iread64_wqe()
1716 bptr->bde_type_buflen = cpu_to_le32((SLI4_BDE_TYPE_VAL(64)) | in sli_fcp_iread64_wqe()
1719 bptr->u.data.low = in sli_fcp_iread64_wqe()
1721 bptr->u.data.high = in sli_fcp_iread64_wqe()
1741 memset(buf, 0, sli->wqe_size); in sli_fcp_iwrite64_wqe()
1743 if (!sgl || !sgl->virt) { in sli_fcp_iwrite64_wqe()
1745 sgl, sgl ? sgl->virt : NULL); in sli_fcp_iwrite64_wqe()
1746 return -EIO; in sli_fcp_iwrite64_wqe()
1748 sge = sgl->virt; in sli_fcp_iwrite64_wqe()
1749 bptr = &iwrite->bde; in sli_fcp_iwrite64_wqe()
1750 if (sli->params.sgl_pre_registered) { in sli_fcp_iwrite64_wqe()
1751 iwrite->qosd_xbl_hlm_iod_dbde_wqes &= ~SLI4_IWR_WQE_XBL; in sli_fcp_iwrite64_wqe()
1753 iwrite->qosd_xbl_hlm_iod_dbde_wqes |= SLI4_IWR_WQE_DBDE; in sli_fcp_iwrite64_wqe()
1754 bptr->bde_type_buflen = cpu_to_le32((SLI4_BDE_TYPE_VAL(64)) | in sli_fcp_iwrite64_wqe()
1756 bptr->u.data.low = sge[0].buffer_address_low; in sli_fcp_iwrite64_wqe()
1757 bptr->u.data.high = sge[0].buffer_address_high; in sli_fcp_iwrite64_wqe()
1759 iwrite->qosd_xbl_hlm_iod_dbde_wqes |= SLI4_IWR_WQE_XBL; in sli_fcp_iwrite64_wqe()
1761 bptr->bde_type_buflen = cpu_to_le32((SLI4_BDE_TYPE_VAL(64)) | in sli_fcp_iwrite64_wqe()
1762 (sgl->size & SLI4_BDE_LEN_MASK)); in sli_fcp_iwrite64_wqe()
1764 bptr->u.blp.low = cpu_to_le32(lower_32_bits(sgl->phys)); in sli_fcp_iwrite64_wqe()
1765 bptr->u.blp.high = cpu_to_le32(upper_32_bits(sgl->phys)); in sli_fcp_iwrite64_wqe()
1773 iwrite->fcp_cmd_buffer_length = cpu_to_le16(len); in sli_fcp_iwrite64_wqe()
1782 iwrite->payload_offset_length = cpu_to_le16(len); in sli_fcp_iwrite64_wqe()
1783 iwrite->total_transfer_length = cpu_to_le16(xfer_len); in sli_fcp_iwrite64_wqe()
1785 iwrite->initial_transfer_length = cpu_to_le16(min); in sli_fcp_iwrite64_wqe()
1787 iwrite->xri_tag = cpu_to_le16(xri); in sli_fcp_iwrite64_wqe()
1788 iwrite->context_tag = cpu_to_le16(rpi); in sli_fcp_iwrite64_wqe()
1790 iwrite->timer = timeout; in sli_fcp_iwrite64_wqe()
1792 iwrite->class_pu_byte |= 2 << SLI4_IWR_WQE_PU_SHFT; in sli_fcp_iwrite64_wqe()
1793 iwrite->class_pu_byte |= SLI4_GENERIC_CLASS_CLASS_3; in sli_fcp_iwrite64_wqe()
1794 iwrite->command = SLI4_WQE_FCP_IWRITE64; in sli_fcp_iwrite64_wqe()
1795 iwrite->dif_ct_bs_byte |= in sli_fcp_iwrite64_wqe()
1797 iwrite->dif_ct_bs_byte |= dif; in sli_fcp_iwrite64_wqe()
1798 iwrite->dif_ct_bs_byte |= bs << SLI4_IWR_WQE_BS_SHFT; in sli_fcp_iwrite64_wqe()
1800 iwrite->abort_tag = cpu_to_le32(xri); in sli_fcp_iwrite64_wqe()
1802 iwrite->request_tag = cpu_to_le16(tag); in sli_fcp_iwrite64_wqe()
1803 iwrite->len_loc1_byte |= SLI4_IWR_WQE_LEN_LOC_BIT1; in sli_fcp_iwrite64_wqe()
1804 iwrite->qosd_xbl_hlm_iod_dbde_wqes |= SLI4_IWR_WQE_LEN_LOC_BIT2; in sli_fcp_iwrite64_wqe()
1805 iwrite->cmd_type_byte |= SLI4_CMD_FCP_IWRITE64_WQE; in sli_fcp_iwrite64_wqe()
1806 iwrite->cq_id = cpu_to_le16(cq_id); in sli_fcp_iwrite64_wqe()
1808 if (sli->params.perf_hint) { in sli_fcp_iwrite64_wqe()
1809 bptr = &iwrite->first_data_bde; in sli_fcp_iwrite64_wqe()
1811 bptr->bde_type_buflen = cpu_to_le32((SLI4_BDE_TYPE_VAL(64)) | in sli_fcp_iwrite64_wqe()
1815 bptr->u.data.low = sge[first_data_sge].buffer_address_low; in sli_fcp_iwrite64_wqe()
1816 bptr->u.data.high = sge[first_data_sge].buffer_address_high; in sli_fcp_iwrite64_wqe()
1832 memset(buf, 0, sli->wqe_size); in sli_fcp_treceive64_wqe()
1834 if (!sgl || !sgl->virt) { in sli_fcp_treceive64_wqe()
1836 sgl, sgl ? sgl->virt : NULL); in sli_fcp_treceive64_wqe()
1837 return -EIO; in sli_fcp_treceive64_wqe()
1839 sge = sgl->virt; in sli_fcp_treceive64_wqe()
1840 bptr = &trecv->bde; in sli_fcp_treceive64_wqe()
1841 if (sli->params.sgl_pre_registered) { in sli_fcp_treceive64_wqe()
1842 trecv->qosd_xbl_hlm_iod_dbde_wqes &= ~SLI4_TRCV_WQE_XBL; in sli_fcp_treceive64_wqe()
1844 trecv->qosd_xbl_hlm_iod_dbde_wqes |= SLI4_TRCV_WQE_DBDE; in sli_fcp_treceive64_wqe()
1846 bptr->bde_type_buflen = in sli_fcp_treceive64_wqe()
1851 bptr->u.data.low = sge[0].buffer_address_low; in sli_fcp_treceive64_wqe()
1852 bptr->u.data.high = sge[0].buffer_address_high; in sli_fcp_treceive64_wqe()
1854 trecv->payload_offset_length = sge[0].buffer_length; in sli_fcp_treceive64_wqe()
1856 trecv->qosd_xbl_hlm_iod_dbde_wqes |= SLI4_TRCV_WQE_XBL; in sli_fcp_treceive64_wqe()
1858 /* if data is a single physical address, use a BDE */ in sli_fcp_treceive64_wqe()
1860 params->xmit_len <= le32_to_cpu(sge[2].buffer_length)) { in sli_fcp_treceive64_wqe()
1861 trecv->qosd_xbl_hlm_iod_dbde_wqes |= SLI4_TRCV_WQE_DBDE; in sli_fcp_treceive64_wqe()
1862 bptr->bde_type_buflen = in sli_fcp_treceive64_wqe()
1867 bptr->u.data.low = sge[2].buffer_address_low; in sli_fcp_treceive64_wqe()
1868 bptr->u.data.high = sge[2].buffer_address_high; in sli_fcp_treceive64_wqe()
1870 bptr->bde_type_buflen = in sli_fcp_treceive64_wqe()
1872 (sgl->size & SLI4_BDE_LEN_MASK)); in sli_fcp_treceive64_wqe()
1873 bptr->u.blp.low = cpu_to_le32(lower_32_bits(sgl->phys)); in sli_fcp_treceive64_wqe()
1874 bptr->u.blp.high = in sli_fcp_treceive64_wqe()
1875 cpu_to_le32(upper_32_bits(sgl->phys)); in sli_fcp_treceive64_wqe()
1879 trecv->relative_offset = cpu_to_le32(params->offset); in sli_fcp_treceive64_wqe()
1881 if (params->flags & SLI4_IO_CONTINUATION) in sli_fcp_treceive64_wqe()
1882 trecv->eat_xc_ccpe |= SLI4_TRCV_WQE_XC; in sli_fcp_treceive64_wqe()
1884 trecv->xri_tag = cpu_to_le16(params->xri); in sli_fcp_treceive64_wqe()
1886 trecv->context_tag = cpu_to_le16(params->rpi); in sli_fcp_treceive64_wqe()
1889 trecv->class_ar_pu_byte |= 1 << SLI4_TRCV_WQE_PU_SHFT; in sli_fcp_treceive64_wqe()
1891 if (params->flags & SLI4_IO_AUTO_GOOD_RESPONSE) in sli_fcp_treceive64_wqe()
1892 trecv->class_ar_pu_byte |= SLI4_TRCV_WQE_AR; in sli_fcp_treceive64_wqe()
1894 trecv->command = SLI4_WQE_FCP_TRECEIVE64; in sli_fcp_treceive64_wqe()
1895 trecv->class_ar_pu_byte |= SLI4_GENERIC_CLASS_CLASS_3; in sli_fcp_treceive64_wqe()
1896 trecv->dif_ct_bs_byte |= in sli_fcp_treceive64_wqe()
1898 trecv->dif_ct_bs_byte |= bs << SLI4_TRCV_WQE_BS_SHFT; in sli_fcp_treceive64_wqe()
1900 trecv->remote_xid = cpu_to_le16(params->ox_id); in sli_fcp_treceive64_wqe()
1902 trecv->request_tag = cpu_to_le16(params->tag); in sli_fcp_treceive64_wqe()
1904 trecv->qosd_xbl_hlm_iod_dbde_wqes |= SLI4_TRCV_WQE_IOD; in sli_fcp_treceive64_wqe()
1906 trecv->qosd_xbl_hlm_iod_dbde_wqes |= SLI4_TRCV_WQE_LEN_LOC_BIT2; in sli_fcp_treceive64_wqe()
1908 trecv->cmd_type_byte |= SLI4_CMD_FCP_TRECEIVE64_WQE; in sli_fcp_treceive64_wqe()
1910 trecv->cq_id = cpu_to_le16(cq_id); in sli_fcp_treceive64_wqe()
1912 trecv->fcp_data_receive_length = cpu_to_le32(params->xmit_len); in sli_fcp_treceive64_wqe()
1914 if (sli->params.perf_hint) { in sli_fcp_treceive64_wqe()
1915 bptr = &trecv->first_data_bde; in sli_fcp_treceive64_wqe()
1917 bptr->bde_type_buflen = in sli_fcp_treceive64_wqe()
1921 bptr->u.data.low = sge[first_data_sge].buffer_address_low; in sli_fcp_treceive64_wqe()
1922 bptr->u.data.high = sge[first_data_sge].buffer_address_high; in sli_fcp_treceive64_wqe()
1926 if (params->cs_ctl & SLI4_MASK_CCP) { in sli_fcp_treceive64_wqe()
1927 trecv->eat_xc_ccpe |= SLI4_TRCV_WQE_CCPE; in sli_fcp_treceive64_wqe()
1928 trecv->ccp = (params->cs_ctl & SLI4_MASK_CCP); in sli_fcp_treceive64_wqe()
1931 if (params->app_id && sli->wqe_size == SLI4_WQE_EXT_BYTES && in sli_fcp_treceive64_wqe()
1932 !(trecv->eat_xc_ccpe & SLI4_TRSP_WQE_EAT)) { in sli_fcp_treceive64_wqe()
1933 trecv->lloc1_appid |= SLI4_TRCV_WQE_APPID; in sli_fcp_treceive64_wqe()
1934 trecv->qosd_xbl_hlm_iod_dbde_wqes |= SLI4_TRCV_WQE_WQES; in sli_fcp_treceive64_wqe()
1935 trecv_128->dw[31] = params->app_id; in sli_fcp_treceive64_wqe()
1953 trecv->command = SLI4_WQE_FCP_CONT_TRECEIVE64; in sli_fcp_cont_treceive64_wqe()
1954 trecv->dword5.sec_xri_tag = cpu_to_le16(sec_xri); in sli_fcp_cont_treceive64_wqe()
1966 memset(buf, 0, sli4->wqe_size); in sli_fcp_trsp64_wqe()
1968 if (params->flags & SLI4_IO_AUTO_GOOD_RESPONSE) { in sli_fcp_trsp64_wqe()
1969 trsp->class_ag_byte |= SLI4_TRSP_WQE_AG; in sli_fcp_trsp64_wqe()
1971 struct sli4_sge *sge = sgl->virt; in sli_fcp_trsp64_wqe()
1974 if (sli4->params.sgl_pre_registered || port_owned) in sli_fcp_trsp64_wqe()
1975 trsp->qosd_xbl_hlm_dbde_wqes |= SLI4_TRSP_WQE_DBDE; in sli_fcp_trsp64_wqe()
1977 trsp->qosd_xbl_hlm_dbde_wqes |= SLI4_TRSP_WQE_XBL; in sli_fcp_trsp64_wqe()
1978 bptr = &trsp->bde; in sli_fcp_trsp64_wqe()
1980 bptr->bde_type_buflen = in sli_fcp_trsp64_wqe()
1984 bptr->u.data.low = sge[0].buffer_address_low; in sli_fcp_trsp64_wqe()
1985 bptr->u.data.high = sge[0].buffer_address_high; in sli_fcp_trsp64_wqe()
1987 trsp->fcp_response_length = cpu_to_le32(params->xmit_len); in sli_fcp_trsp64_wqe()
1990 if (params->flags & SLI4_IO_CONTINUATION) in sli_fcp_trsp64_wqe()
1991 trsp->eat_xc_ccpe |= SLI4_TRSP_WQE_XC; in sli_fcp_trsp64_wqe()
1993 trsp->xri_tag = cpu_to_le16(params->xri); in sli_fcp_trsp64_wqe()
1994 trsp->rpi = cpu_to_le16(params->rpi); in sli_fcp_trsp64_wqe()
1996 trsp->command = SLI4_WQE_FCP_TRSP64; in sli_fcp_trsp64_wqe()
1997 trsp->class_ag_byte |= SLI4_GENERIC_CLASS_CLASS_3; in sli_fcp_trsp64_wqe()
1999 trsp->remote_xid = cpu_to_le16(params->ox_id); in sli_fcp_trsp64_wqe()
2000 trsp->request_tag = cpu_to_le16(params->tag); in sli_fcp_trsp64_wqe()
2001 if (params->flags & SLI4_IO_DNRX) in sli_fcp_trsp64_wqe()
2002 trsp->ct_dnrx_byte |= SLI4_TRSP_WQE_DNRX; in sli_fcp_trsp64_wqe()
2004 trsp->ct_dnrx_byte &= ~SLI4_TRSP_WQE_DNRX; in sli_fcp_trsp64_wqe()
2006 trsp->lloc1_appid |= 0x1; in sli_fcp_trsp64_wqe()
2007 trsp->cq_id = cpu_to_le16(cq_id); in sli_fcp_trsp64_wqe()
2008 trsp->cmd_type_byte = SLI4_CMD_FCP_TRSP64_WQE; in sli_fcp_trsp64_wqe()
2011 if (params->cs_ctl & SLI4_MASK_CCP) { in sli_fcp_trsp64_wqe()
2012 trsp->eat_xc_ccpe |= SLI4_TRSP_WQE_CCPE; in sli_fcp_trsp64_wqe()
2013 trsp->ccp = (params->cs_ctl & SLI4_MASK_CCP); in sli_fcp_trsp64_wqe()
2016 if (params->app_id && sli4->wqe_size == SLI4_WQE_EXT_BYTES && in sli_fcp_trsp64_wqe()
2017 !(trsp->eat_xc_ccpe & SLI4_TRSP_WQE_EAT)) { in sli_fcp_trsp64_wqe()
2018 trsp->lloc1_appid |= SLI4_TRSP_WQE_APPID; in sli_fcp_trsp64_wqe()
2019 trsp->qosd_xbl_hlm_dbde_wqes |= SLI4_TRSP_WQE_WQES; in sli_fcp_trsp64_wqe()
2020 trsp_128->dw[31] = params->app_id; in sli_fcp_trsp64_wqe()
2035 memset(buf, 0, sli4->wqe_size); in sli_fcp_tsend64_wqe()
2037 if (!sgl || !sgl->virt) { in sli_fcp_tsend64_wqe()
2039 sgl, sgl ? sgl->virt : NULL); in sli_fcp_tsend64_wqe()
2040 return -EIO; in sli_fcp_tsend64_wqe()
2042 sge = sgl->virt; in sli_fcp_tsend64_wqe()
2044 bptr = &tsend->bde; in sli_fcp_tsend64_wqe()
2045 if (sli4->params.sgl_pre_registered) { in sli_fcp_tsend64_wqe()
2046 tsend->ll_qd_xbl_hlm_iod_dbde &= ~SLI4_TSEND_WQE_XBL; in sli_fcp_tsend64_wqe()
2048 tsend->ll_qd_xbl_hlm_iod_dbde |= SLI4_TSEND_WQE_DBDE; in sli_fcp_tsend64_wqe()
2050 bptr->bde_type_buflen = in sli_fcp_tsend64_wqe()
2058 bptr->u.data.low = sge[2].buffer_address_low; in sli_fcp_tsend64_wqe()
2059 bptr->u.data.high = sge[2].buffer_address_high; in sli_fcp_tsend64_wqe()
2061 tsend->ll_qd_xbl_hlm_iod_dbde |= SLI4_TSEND_WQE_XBL; in sli_fcp_tsend64_wqe()
2063 /* if data is a single physical address, use a BDE */ in sli_fcp_tsend64_wqe()
2065 params->xmit_len <= le32_to_cpu(sge[2].buffer_length)) { in sli_fcp_tsend64_wqe()
2066 tsend->ll_qd_xbl_hlm_iod_dbde |= SLI4_TSEND_WQE_DBDE; in sli_fcp_tsend64_wqe()
2068 bptr->bde_type_buflen = in sli_fcp_tsend64_wqe()
2076 bptr->u.data.low = in sli_fcp_tsend64_wqe()
2078 bptr->u.data.high = in sli_fcp_tsend64_wqe()
2081 bptr->bde_type_buflen = in sli_fcp_tsend64_wqe()
2083 (sgl->size & in sli_fcp_tsend64_wqe()
2085 bptr->u.blp.low = in sli_fcp_tsend64_wqe()
2086 cpu_to_le32(lower_32_bits(sgl->phys)); in sli_fcp_tsend64_wqe()
2087 bptr->u.blp.high = in sli_fcp_tsend64_wqe()
2088 cpu_to_le32(upper_32_bits(sgl->phys)); in sli_fcp_tsend64_wqe()
2092 tsend->relative_offset = cpu_to_le32(params->offset); in sli_fcp_tsend64_wqe()
2094 if (params->flags & SLI4_IO_CONTINUATION) in sli_fcp_tsend64_wqe()
2095 tsend->dw10byte2 |= SLI4_TSEND_XC; in sli_fcp_tsend64_wqe()
2097 tsend->xri_tag = cpu_to_le16(params->xri); in sli_fcp_tsend64_wqe()
2099 tsend->rpi = cpu_to_le16(params->rpi); in sli_fcp_tsend64_wqe()
2101 tsend->class_pu_ar_byte |= 1 << SLI4_TSEND_WQE_PU_SHFT; in sli_fcp_tsend64_wqe()
2103 if (params->flags & SLI4_IO_AUTO_GOOD_RESPONSE) in sli_fcp_tsend64_wqe()
2104 tsend->class_pu_ar_byte |= SLI4_TSEND_WQE_AR; in sli_fcp_tsend64_wqe()
2106 tsend->command = SLI4_WQE_FCP_TSEND64; in sli_fcp_tsend64_wqe()
2107 tsend->class_pu_ar_byte |= SLI4_GENERIC_CLASS_CLASS_3; in sli_fcp_tsend64_wqe()
2108 tsend->ct_byte |= SLI4_GENERIC_CONTEXT_RPI << SLI4_TSEND_CT_SHFT; in sli_fcp_tsend64_wqe()
2109 tsend->ct_byte |= dif; in sli_fcp_tsend64_wqe()
2110 tsend->ct_byte |= bs << SLI4_TSEND_BS_SHFT; in sli_fcp_tsend64_wqe()
2112 tsend->remote_xid = cpu_to_le16(params->ox_id); in sli_fcp_tsend64_wqe()
2114 tsend->request_tag = cpu_to_le16(params->tag); in sli_fcp_tsend64_wqe()
2116 tsend->ll_qd_xbl_hlm_iod_dbde |= SLI4_TSEND_LEN_LOC_BIT2; in sli_fcp_tsend64_wqe()
2118 tsend->cq_id = cpu_to_le16(cq_id); in sli_fcp_tsend64_wqe()
2120 tsend->cmd_type_byte |= SLI4_CMD_FCP_TSEND64_WQE; in sli_fcp_tsend64_wqe()
2122 tsend->fcp_data_transmit_length = cpu_to_le32(params->xmit_len); in sli_fcp_tsend64_wqe()
2124 if (sli4->params.perf_hint) { in sli_fcp_tsend64_wqe()
2125 bptr = &tsend->first_data_bde; in sli_fcp_tsend64_wqe()
2126 bptr->bde_type_buflen = in sli_fcp_tsend64_wqe()
2130 bptr->u.data.low = in sli_fcp_tsend64_wqe()
2132 bptr->u.data.high = in sli_fcp_tsend64_wqe()
2137 if (params->cs_ctl & SLI4_MASK_CCP) { in sli_fcp_tsend64_wqe()
2138 tsend->dw10byte2 |= SLI4_TSEND_CCPE; in sli_fcp_tsend64_wqe()
2139 tsend->ccp = (params->cs_ctl & SLI4_MASK_CCP); in sli_fcp_tsend64_wqe()
2142 if (params->app_id && sli4->wqe_size == SLI4_WQE_EXT_BYTES && in sli_fcp_tsend64_wqe()
2143 !(tsend->dw10byte2 & SLI4_TSEND_EAT)) { in sli_fcp_tsend64_wqe()
2144 tsend->dw10byte0 |= SLI4_TSEND_APPID_VALID; in sli_fcp_tsend64_wqe()
2145 tsend->ll_qd_xbl_hlm_iod_dbde |= SLI4_TSEND_WQES; in sli_fcp_tsend64_wqe()
2146 tsend_128->dw[31] = params->app_id; in sli_fcp_tsend64_wqe()
2159 memset(buf, 0, sli4->wqe_size); in sli_gen_request64_wqe()
2161 if (!sgl || !sgl->virt) { in sli_gen_request64_wqe()
2163 sgl, sgl ? sgl->virt : NULL); in sli_gen_request64_wqe()
2164 return -EIO; in sli_gen_request64_wqe()
2166 sge = sgl->virt; in sli_gen_request64_wqe()
2167 bptr = &gen->bde; in sli_gen_request64_wqe()
2169 if (sli4->params.sgl_pre_registered) { in sli_gen_request64_wqe()
2170 gen->dw10flags1 &= ~SLI4_GEN_REQ64_WQE_XBL; in sli_gen_request64_wqe()
2172 gen->dw10flags1 |= SLI4_GEN_REQ64_WQE_DBDE; in sli_gen_request64_wqe()
2173 bptr->bde_type_buflen = in sli_gen_request64_wqe()
2175 (params->xmit_len & SLI4_BDE_LEN_MASK)); in sli_gen_request64_wqe()
2177 bptr->u.data.low = sge[0].buffer_address_low; in sli_gen_request64_wqe()
2178 bptr->u.data.high = sge[0].buffer_address_high; in sli_gen_request64_wqe()
2180 gen->dw10flags1 |= SLI4_GEN_REQ64_WQE_XBL; in sli_gen_request64_wqe()
2182 bptr->bde_type_buflen = in sli_gen_request64_wqe()
2187 bptr->u.blp.low = in sli_gen_request64_wqe()
2188 cpu_to_le32(lower_32_bits(sgl->phys)); in sli_gen_request64_wqe()
2189 bptr->u.blp.high = in sli_gen_request64_wqe()
2190 cpu_to_le32(upper_32_bits(sgl->phys)); in sli_gen_request64_wqe()
2193 gen->request_payload_length = cpu_to_le32(params->xmit_len); in sli_gen_request64_wqe()
2194 gen->max_response_payload_length = cpu_to_le32(params->rsp_len); in sli_gen_request64_wqe()
2196 gen->df_ctl = params->df_ctl; in sli_gen_request64_wqe()
2197 gen->type = params->type; in sli_gen_request64_wqe()
2198 gen->r_ctl = params->r_ctl; in sli_gen_request64_wqe()
2200 gen->xri_tag = cpu_to_le16(params->xri); in sli_gen_request64_wqe()
2202 gen->ct_byte = SLI4_GENERIC_CONTEXT_RPI << SLI4_GEN_REQ64_CT_SHFT; in sli_gen_request64_wqe()
2203 gen->context_tag = cpu_to_le16(params->rpi); in sli_gen_request64_wqe()
2205 gen->class_byte = SLI4_GENERIC_CLASS_CLASS_3; in sli_gen_request64_wqe()
2207 gen->command = SLI4_WQE_GEN_REQUEST64; in sli_gen_request64_wqe()
2209 gen->timer = params->timeout; in sli_gen_request64_wqe()
2211 gen->request_tag = cpu_to_le16(params->tag); in sli_gen_request64_wqe()
2213 gen->dw10flags1 |= SLI4_GEN_REQ64_WQE_IOD; in sli_gen_request64_wqe()
2215 gen->dw10flags0 |= SLI4_GEN_REQ64_WQE_QOSD; in sli_gen_request64_wqe()
2217 gen->cmd_type_byte = SLI4_CMD_GEN_REQUEST64_WQE; in sli_gen_request64_wqe()
2219 gen->cq_id = cpu_to_le16(SLI4_CQ_DEFAULT); in sli_gen_request64_wqe()
2231 memset(buf, 0, sli->wqe_size); in sli_send_frame_wqe()
2233 sf->dw10flags1 |= SLI4_SF_WQE_DBDE; in sli_send_frame_wqe()
2234 sf->bde.bde_type_buflen = cpu_to_le32(req_len & in sli_send_frame_wqe()
2236 sf->bde.u.data.low = cpu_to_le32(lower_32_bits(payload->phys)); in sli_send_frame_wqe()
2237 sf->bde.u.data.high = cpu_to_le32(upper_32_bits(payload->phys)); in sli_send_frame_wqe()
2240 sf->fc_header_0_1[0] = cpu_to_le32(hdr[0]); in sli_send_frame_wqe()
2241 sf->fc_header_0_1[1] = cpu_to_le32(hdr[1]); in sli_send_frame_wqe()
2242 sf->fc_header_2_5[0] = cpu_to_le32(hdr[2]); in sli_send_frame_wqe()
2243 sf->fc_header_2_5[1] = cpu_to_le32(hdr[3]); in sli_send_frame_wqe()
2244 sf->fc_header_2_5[2] = cpu_to_le32(hdr[4]); in sli_send_frame_wqe()
2245 sf->fc_header_2_5[3] = cpu_to_le32(hdr[5]); in sli_send_frame_wqe()
2247 sf->frame_length = cpu_to_le32(req_len); in sli_send_frame_wqe()
2249 sf->xri_tag = cpu_to_le16(xri); in sli_send_frame_wqe()
2250 sf->dw7flags0 &= ~SLI4_SF_PU; in sli_send_frame_wqe()
2251 sf->context_tag = 0; in sli_send_frame_wqe()
2253 sf->ct_byte &= ~SLI4_SF_CT; in sli_send_frame_wqe()
2254 sf->command = SLI4_WQE_SEND_FRAME; in sli_send_frame_wqe()
2255 sf->dw7flags0 |= SLI4_GENERIC_CLASS_CLASS_3; in sli_send_frame_wqe()
2256 sf->timer = timeout; in sli_send_frame_wqe()
2258 sf->request_tag = cpu_to_le16(req_tag); in sli_send_frame_wqe()
2259 sf->eof = eof; in sli_send_frame_wqe()
2260 sf->sof = sof; in sli_send_frame_wqe()
2262 sf->dw10flags1 &= ~SLI4_SF_QOSD; in sli_send_frame_wqe()
2263 sf->dw10flags0 |= SLI4_SF_LEN_LOC_BIT1; in sli_send_frame_wqe()
2264 sf->dw10flags2 &= ~SLI4_SF_XC; in sli_send_frame_wqe()
2266 sf->dw10flags1 |= SLI4_SF_XBL; in sli_send_frame_wqe()
2268 sf->cmd_type_byte |= SLI4_CMD_SEND_FRAME_WQE; in sli_send_frame_wqe()
2269 sf->cq_id = cpu_to_le16(0xffff); in sli_send_frame_wqe()
2285 if (params->rpi_registered && params->s_id != U32_MAX) { in sli_xmit_bls_rsp64_wqe()
2287 params->rpi); in sli_xmit_bls_rsp64_wqe()
2288 return -EIO; in sli_xmit_bls_rsp64_wqe()
2291 memset(buf, 0, sli->wqe_size); in sli_xmit_bls_rsp64_wqe()
2293 if (payload->type == SLI4_SLI_BLS_ACC) { in sli_xmit_bls_rsp64_wqe()
2294 bls->payload_word0 = in sli_xmit_bls_rsp64_wqe()
2295 cpu_to_le32((payload->u.acc.seq_id_last << 16) | in sli_xmit_bls_rsp64_wqe()
2296 (payload->u.acc.seq_id_validity << 24)); in sli_xmit_bls_rsp64_wqe()
2297 bls->high_seq_cnt = payload->u.acc.high_seq_cnt; in sli_xmit_bls_rsp64_wqe()
2298 bls->low_seq_cnt = payload->u.acc.low_seq_cnt; in sli_xmit_bls_rsp64_wqe()
2299 } else if (payload->type == SLI4_SLI_BLS_RJT) { in sli_xmit_bls_rsp64_wqe()
2300 bls->payload_word0 = in sli_xmit_bls_rsp64_wqe()
2301 cpu_to_le32(*((u32 *)&payload->u.rjt)); in sli_xmit_bls_rsp64_wqe()
2304 efc_log_info(sli, "bad BLS type %#x\n", payload->type); in sli_xmit_bls_rsp64_wqe()
2305 return -EIO; in sli_xmit_bls_rsp64_wqe()
2308 bls->ox_id = payload->ox_id; in sli_xmit_bls_rsp64_wqe()
2309 bls->rx_id = payload->rx_id; in sli_xmit_bls_rsp64_wqe()
2311 if (params->rpi_registered) { in sli_xmit_bls_rsp64_wqe()
2312 bls->dw8flags0 |= in sli_xmit_bls_rsp64_wqe()
2314 bls->context_tag = cpu_to_le16(params->rpi); in sli_xmit_bls_rsp64_wqe()
2316 bls->dw8flags0 |= in sli_xmit_bls_rsp64_wqe()
2318 bls->context_tag = cpu_to_le16(params->vpi); in sli_xmit_bls_rsp64_wqe()
2320 bls->local_n_port_id_dword |= in sli_xmit_bls_rsp64_wqe()
2321 cpu_to_le32(params->s_id & 0x00ffffff); in sli_xmit_bls_rsp64_wqe()
2324 (params->d_id & SLI4_BLS_RSP_RID); in sli_xmit_bls_rsp64_wqe()
2326 bls->temporary_rpi = cpu_to_le16(params->rpi); in sli_xmit_bls_rsp64_wqe()
2329 bls->xri_tag = cpu_to_le16(params->xri); in sli_xmit_bls_rsp64_wqe()
2331 bls->dw8flags1 |= SLI4_GENERIC_CLASS_CLASS_3; in sli_xmit_bls_rsp64_wqe()
2333 bls->command = SLI4_WQE_XMIT_BLS_RSP; in sli_xmit_bls_rsp64_wqe()
2335 bls->request_tag = cpu_to_le16(params->tag); in sli_xmit_bls_rsp64_wqe()
2337 bls->dw11flags1 |= SLI4_BLS_RSP_WQE_QOSD; in sli_xmit_bls_rsp64_wqe()
2339 bls->remote_id_dword = cpu_to_le32(dw_ridflags); in sli_xmit_bls_rsp64_wqe()
2340 bls->cq_id = cpu_to_le16(SLI4_CQ_DEFAULT); in sli_xmit_bls_rsp64_wqe()
2342 bls->dw12flags0 |= SLI4_CMD_XMIT_BLS_RSP64_WQE; in sli_xmit_bls_rsp64_wqe()
2353 memset(buf, 0, sli->wqe_size); in sli_xmit_els_rsp64_wqe()
2355 if (sli->params.sgl_pre_registered) in sli_xmit_els_rsp64_wqe()
2356 els->flags2 |= SLI4_ELS_DBDE; in sli_xmit_els_rsp64_wqe()
2358 els->flags2 |= SLI4_ELS_XBL; in sli_xmit_els_rsp64_wqe()
2360 els->els_response_payload.bde_type_buflen = in sli_xmit_els_rsp64_wqe()
2362 (params->rsp_len & SLI4_BDE_LEN_MASK)); in sli_xmit_els_rsp64_wqe()
2363 els->els_response_payload.u.data.low = in sli_xmit_els_rsp64_wqe()
2364 cpu_to_le32(lower_32_bits(rsp->phys)); in sli_xmit_els_rsp64_wqe()
2365 els->els_response_payload.u.data.high = in sli_xmit_els_rsp64_wqe()
2366 cpu_to_le32(upper_32_bits(rsp->phys)); in sli_xmit_els_rsp64_wqe()
2368 els->els_response_payload_length = cpu_to_le32(params->rsp_len); in sli_xmit_els_rsp64_wqe()
2370 els->xri_tag = cpu_to_le16(params->xri); in sli_xmit_els_rsp64_wqe()
2372 els->class_byte |= SLI4_GENERIC_CLASS_CLASS_3; in sli_xmit_els_rsp64_wqe()
2374 els->command = SLI4_WQE_ELS_RSP64; in sli_xmit_els_rsp64_wqe()
2376 els->request_tag = cpu_to_le16(params->tag); in sli_xmit_els_rsp64_wqe()
2378 els->ox_id = cpu_to_le16(params->ox_id); in sli_xmit_els_rsp64_wqe()
2380 els->flags2 |= SLI4_ELS_QOSD; in sli_xmit_els_rsp64_wqe()
2382 els->cmd_type_wqec = SLI4_ELS_REQUEST64_CMD_GEN; in sli_xmit_els_rsp64_wqe()
2384 els->cq_id = cpu_to_le16(SLI4_CQ_DEFAULT); in sli_xmit_els_rsp64_wqe()
2386 if (params->rpi_registered) { in sli_xmit_els_rsp64_wqe()
2387 els->ct_byte |= in sli_xmit_els_rsp64_wqe()
2389 els->context_tag = cpu_to_le16(params->rpi); in sli_xmit_els_rsp64_wqe()
2393 els->ct_byte |= SLI4_GENERIC_CONTEXT_VPI << SLI4_ELS_CT_OFFSET; in sli_xmit_els_rsp64_wqe()
2394 els->context_tag = cpu_to_le16(params->vpi); in sli_xmit_els_rsp64_wqe()
2395 els->rid_dw = cpu_to_le32(params->d_id & SLI4_ELS_RID); in sli_xmit_els_rsp64_wqe()
2396 els->temporary_rpi = cpu_to_le16(params->rpi); in sli_xmit_els_rsp64_wqe()
2397 if (params->s_id != U32_MAX) { in sli_xmit_els_rsp64_wqe()
2398 els->sid_dw |= in sli_xmit_els_rsp64_wqe()
2399 cpu_to_le32(SLI4_ELS_SP | (params->s_id & SLI4_ELS_SID)); in sli_xmit_els_rsp64_wqe()
2411 memset(buf, 0, sli4->wqe_size); in sli_xmit_sequence64_wqe()
2413 if (!payload || !payload->virt) { in sli_xmit_sequence64_wqe()
2415 payload, payload ? payload->virt : NULL); in sli_xmit_sequence64_wqe()
2416 return -EIO; in sli_xmit_sequence64_wqe()
2419 if (sli4->params.sgl_pre_registered) in sli_xmit_sequence64_wqe()
2420 xmit->dw10w0 |= cpu_to_le16(SLI4_SEQ_WQE_DBDE); in sli_xmit_sequence64_wqe()
2422 xmit->dw10w0 |= cpu_to_le16(SLI4_SEQ_WQE_XBL); in sli_xmit_sequence64_wqe()
2424 xmit->bde.bde_type_buflen = in sli_xmit_sequence64_wqe()
2426 (params->rsp_len & SLI4_BDE_LEN_MASK)); in sli_xmit_sequence64_wqe()
2427 xmit->bde.u.data.low = in sli_xmit_sequence64_wqe()
2428 cpu_to_le32(lower_32_bits(payload->phys)); in sli_xmit_sequence64_wqe()
2429 xmit->bde.u.data.high = in sli_xmit_sequence64_wqe()
2430 cpu_to_le32(upper_32_bits(payload->phys)); in sli_xmit_sequence64_wqe()
2431 xmit->sequence_payload_len = cpu_to_le32(params->rsp_len); in sli_xmit_sequence64_wqe()
2433 xmit->remote_n_port_id_dword |= cpu_to_le32(params->d_id & 0x00ffffff); in sli_xmit_sequence64_wqe()
2435 xmit->relative_offset = 0; in sli_xmit_sequence64_wqe()
2437 /* sequence initiative - this matches what is seen from in sli_xmit_sequence64_wqe()
2440 xmit->dw5flags0 &= (~SLI4_SEQ_WQE_SI); in sli_xmit_sequence64_wqe()
2441 xmit->dw5flags0 &= (~SLI4_SEQ_WQE_FT);/* force transmit */ in sli_xmit_sequence64_wqe()
2442 xmit->dw5flags0 &= (~SLI4_SEQ_WQE_XO);/* exchange responder */ in sli_xmit_sequence64_wqe()
2443 xmit->dw5flags0 |= SLI4_SEQ_WQE_LS;/* last in seqence */ in sli_xmit_sequence64_wqe()
2444 xmit->df_ctl = params->df_ctl; in sli_xmit_sequence64_wqe()
2445 xmit->type = params->type; in sli_xmit_sequence64_wqe()
2446 xmit->r_ctl = params->r_ctl; in sli_xmit_sequence64_wqe()
2448 xmit->xri_tag = cpu_to_le16(params->xri); in sli_xmit_sequence64_wqe()
2449 xmit->context_tag = cpu_to_le16(params->rpi); in sli_xmit_sequence64_wqe()
2451 xmit->dw7flags0 &= ~SLI4_SEQ_WQE_DIF; in sli_xmit_sequence64_wqe()
2452 xmit->dw7flags0 |= in sli_xmit_sequence64_wqe()
2454 xmit->dw7flags0 &= ~SLI4_SEQ_WQE_BS; in sli_xmit_sequence64_wqe()
2456 xmit->command = SLI4_WQE_XMIT_SEQUENCE64; in sli_xmit_sequence64_wqe()
2457 xmit->dw7flags1 |= SLI4_GENERIC_CLASS_CLASS_3; in sli_xmit_sequence64_wqe()
2458 xmit->dw7flags1 &= ~SLI4_SEQ_WQE_PU; in sli_xmit_sequence64_wqe()
2459 xmit->timer = params->timeout; in sli_xmit_sequence64_wqe()
2461 xmit->abort_tag = 0; in sli_xmit_sequence64_wqe()
2462 xmit->request_tag = cpu_to_le16(params->tag); in sli_xmit_sequence64_wqe()
2463 xmit->remote_xid = cpu_to_le16(params->ox_id); in sli_xmit_sequence64_wqe()
2465 xmit->dw10w0 |= in sli_xmit_sequence64_wqe()
2468 xmit->cmd_type_wqec_byte |= SLI4_CMD_XMIT_SEQUENCE64_WQE; in sli_xmit_sequence64_wqe()
2470 xmit->dw10w0 |= cpu_to_le16(2 << SLI4_SEQ_WQE_LEN_LOC_SHIFT); in sli_xmit_sequence64_wqe()
2472 xmit->cq_id = cpu_to_le16(0xFFFF); in sli_xmit_sequence64_wqe()
2482 memset(buf, 0, sli4->wqe_size); in sli_requeue_xri_wqe()
2484 requeue->command = SLI4_WQE_REQUEUE_XRI; in sli_requeue_xri_wqe()
2485 requeue->xri_tag = cpu_to_le16(xri); in sli_requeue_xri_wqe()
2486 requeue->request_tag = cpu_to_le16(tag); in sli_requeue_xri_wqe()
2487 requeue->flags2 |= cpu_to_le16(SLI4_REQU_XRI_WQE_XC); in sli_requeue_xri_wqe()
2488 requeue->flags1 |= cpu_to_le16(SLI4_REQU_XRI_WQE_QOSD); in sli_requeue_xri_wqe()
2489 requeue->cq_id = cpu_to_le16(cq_id); in sli_requeue_xri_wqe()
2490 requeue->cmd_type_wqec_byte = SLI4_CMD_REQUEUE_XRI_WQE; in sli_requeue_xri_wqe()
2501 link_attn->link_number, link_attn->attn_type, in sli_fc_process_link_attention()
2502 link_attn->topology, link_attn->port_speed, in sli_fc_process_link_attention()
2503 link_attn->port_fault); in sli_fc_process_link_attention()
2505 link_attn->shared_link_status, in sli_fc_process_link_attention()
2506 le16_to_cpu(link_attn->logical_link_speed), in sli_fc_process_link_attention()
2507 le32_to_cpu(link_attn->event_tag)); in sli_fc_process_link_attention()
2509 if (!sli4->link) in sli_fc_process_link_attention()
2510 return -EIO; in sli_fc_process_link_attention()
2514 switch (link_attn->attn_type) { in sli_fc_process_link_attention()
2530 switch (link_attn->event_type) { in sli_fc_process_link_attention()
2541 switch (link_attn->topology) { in sli_fc_process_link_attention()
2561 event.speed = link_attn->port_speed * 1000; in sli_fc_process_link_attention()
2563 sli4->link(sli4->link_arg, (void *)&event); in sli_fc_process_link_attention()
2581 *r_id = le16_to_cpu(wcqe->request_tag); in sli_fc_cqe_parse()
2582 rc = wcqe->status; in sli_fc_cqe_parse()
2587 wcqe->status, wcqe->hw_status, in sli_fc_cqe_parse()
2588 le16_to_cpu(wcqe->request_tag)); in sli_fc_cqe_parse()
2590 le32_to_cpu(wcqe->wqe_specific_1), in sli_fc_cqe_parse()
2591 le32_to_cpu(wcqe->wqe_specific_2), in sli_fc_cqe_parse()
2592 (wcqe->flags & SLI4_WCQE_XB)); in sli_fc_cqe_parse()
2605 *r_id = le16_to_cpu(rcqe->fcfi_rq_id_word) & SLI4_RACQE_RQ_ID; in sli_fc_cqe_parse()
2606 rc = rcqe->status; in sli_fc_cqe_parse()
2614 *r_id = le16_to_cpu(rcqe->rq_id); in sli_fc_cqe_parse()
2615 rc = rcqe->status; in sli_fc_cqe_parse()
2623 *r_id = le16_to_cpu(optcqe->rq_id); in sli_fc_cqe_parse()
2624 rc = optcqe->status; in sli_fc_cqe_parse()
2632 *r_id = le16_to_cpu(dcqe->xri); in sli_fc_cqe_parse()
2633 rc = dcqe->status; in sli_fc_cqe_parse()
2638 dcqe->status); in sli_fc_cqe_parse()
2640 dcqe->hw_status, le16_to_cpu(dcqe->xri), in sli_fc_cqe_parse()
2641 le32_to_cpu(dcqe->total_data_placed), in sli_fc_cqe_parse()
2643 (dcqe->flags & SLI4_OCQE_XB)); in sli_fc_cqe_parse()
2652 *r_id = le16_to_cpu(rcqe->rq_id); in sli_fc_cqe_parse()
2653 rc = rcqe->status; in sli_fc_cqe_parse()
2661 *r_id = le16_to_cpu(xa->xri); in sli_fc_cqe_parse()
2670 *r_id = le16_to_cpu(wqec->wq_id); in sli_fc_cqe_parse()
2679 rc = -EINVAL; in sli_fc_cqe_parse()
2690 return le32_to_cpu(wcqe->wqe_specific_1); in sli_fc_response_length()
2698 return le32_to_cpu(wcqe->wqe_specific_1); in sli_fc_io_length()
2708 if (wcqe->status) in sli_fc_els_did()
2709 return -EIO; in sli_fc_els_did()
2710 *d_id = le32_to_cpu(wcqe->wqe_specific_2) & 0x00ffffff; in sli_fc_els_did()
2720 switch (wcqe->status) { in sli_fc_ext_status()
2742 return le32_to_cpu(wcqe->wqe_specific_2) & mask; in sli_fc_ext_status()
2748 int rc = -EIO; in sli_fc_rqe_rqid_and_index()
2761 *rq_id = le16_to_cpu(rcqe->fcfi_rq_id_word) & SLI4_RACQE_RQ_ID; in sli_fc_rqe_rqid_and_index()
2763 le16_to_cpu(rcqe->rq_elmt_indx_word) & SLI4_RACQE_RQ_EL_INDX; in sli_fc_rqe_rqid_and_index()
2765 if (rcqe->status == SLI4_FC_ASYNC_RQ_SUCCESS) { in sli_fc_rqe_rqid_and_index()
2768 rc = rcqe->status; in sli_fc_rqe_rqid_and_index()
2770 rcqe->status, in sli_fc_rqe_rqid_and_index()
2771 sli_fc_get_status_string(rcqe->status), in sli_fc_rqe_rqid_and_index()
2772 le16_to_cpu(rcqe->fcfi_rq_id_word) & in sli_fc_rqe_rqid_and_index()
2776 le16_to_cpu(rcqe->data_placement_length), in sli_fc_rqe_rqid_and_index()
2777 rcqe->sof_byte, rcqe->eof_byte, in sli_fc_rqe_rqid_and_index()
2778 rcqe->hdpl_byte & SLI4_RACQE_HDPL); in sli_fc_rqe_rqid_and_index()
2783 *rq_id = le16_to_cpu(rcqe_v1->rq_id); in sli_fc_rqe_rqid_and_index()
2785 (le16_to_cpu(rcqe_v1->rq_elmt_indx_word) & in sli_fc_rqe_rqid_and_index()
2788 if (rcqe_v1->status == SLI4_FC_ASYNC_RQ_SUCCESS) { in sli_fc_rqe_rqid_and_index()
2791 rc = rcqe_v1->status; in sli_fc_rqe_rqid_and_index()
2793 rcqe_v1->status, in sli_fc_rqe_rqid_and_index()
2794 sli_fc_get_status_string(rcqe_v1->status), in sli_fc_rqe_rqid_and_index()
2795 le16_to_cpu(rcqe_v1->rq_id), rq_element_index); in sli_fc_rqe_rqid_and_index()
2798 le16_to_cpu(rcqe_v1->data_placement_length), in sli_fc_rqe_rqid_and_index()
2799 rcqe_v1->sof_byte, rcqe_v1->eof_byte, in sli_fc_rqe_rqid_and_index()
2800 rcqe_v1->hdpl_byte & SLI4_RACQE_HDPL); in sli_fc_rqe_rqid_and_index()
2805 *rq_id = le16_to_cpu(optcqe->rq_id); in sli_fc_rqe_rqid_and_index()
2806 *index = le16_to_cpu(optcqe->w1) & SLI4_OCQE_RQ_EL_INDX; in sli_fc_rqe_rqid_and_index()
2807 if (optcqe->status == SLI4_FC_ASYNC_RQ_SUCCESS) { in sli_fc_rqe_rqid_and_index()
2810 rc = optcqe->status; in sli_fc_rqe_rqid_and_index()
2812 optcqe->status, in sli_fc_rqe_rqid_and_index()
2813 sli_fc_get_status_string(optcqe->status), in sli_fc_rqe_rqid_and_index()
2814 le16_to_cpu(optcqe->rq_id), *index, in sli_fc_rqe_rqid_and_index()
2815 le16_to_cpu(optcqe->data_placement_length)); in sli_fc_rqe_rqid_and_index()
2818 (optcqe->hdpl_vld & SLI4_OCQE_HDPL), in sli_fc_rqe_rqid_and_index()
2819 (optcqe->flags1 & SLI4_OCQE_OOX), in sli_fc_rqe_rqid_and_index()
2820 (optcqe->flags1 & SLI4_OCQE_AGXR), in sli_fc_rqe_rqid_and_index()
2821 optcqe->xri, le16_to_cpu(optcqe->rpi)); in sli_fc_rqe_rqid_and_index()
2826 rq_element_index = (le16_to_cpu(rcqe->rq_elmt_indx_word) & in sli_fc_rqe_rqid_and_index()
2829 *rq_id = le16_to_cpu(rcqe->rq_id); in sli_fc_rqe_rqid_and_index()
2830 if (rcqe->status == SLI4_FC_COALESCE_RQ_SUCCESS) { in sli_fc_rqe_rqid_and_index()
2835 rc = rcqe->status; in sli_fc_rqe_rqid_and_index()
2838 rcqe->status, in sli_fc_rqe_rqid_and_index()
2839 sli_fc_get_status_string(rcqe->status), in sli_fc_rqe_rqid_and_index()
2840 le16_to_cpu(rcqe->rq_id), rq_element_index); in sli_fc_rqe_rqid_and_index()
2842 le16_to_cpu(rcqe->rq_id), in sli_fc_rqe_rqid_and_index()
2843 le16_to_cpu(rcqe->seq_placement_length)); in sli_fc_rqe_rqid_and_index()
2849 rc = rcqe->status; in sli_fc_rqe_rqid_and_index()
2852 rcqe->status, in sli_fc_rqe_rqid_and_index()
2853 le16_to_cpu(rcqe->fcfi_rq_id_word) & SLI4_RACQE_RQ_ID, in sli_fc_rqe_rqid_and_index()
2854 (le16_to_cpu(rcqe->rq_elmt_indx_word) & SLI4_RACQE_RQ_EL_INDX), in sli_fc_rqe_rqid_and_index()
2855 le16_to_cpu(rcqe->data_placement_length)); in sli_fc_rqe_rqid_and_index()
2857 rcqe->sof_byte, rcqe->eof_byte, in sli_fc_rqe_rqid_and_index()
2858 rcqe->hdpl_byte & SLI4_RACQE_HDPL); in sli_fc_rqe_rqid_and_index()
2873 val = readl(sli4->reg[0] + SLI4_BMBX_REG); in sli_bmbx_wait()
2880 return -EIO; in sli_bmbx_wait()
2889 val = sli_bmbx_write_hi(sli4->bmbx.phys); in sli_bmbx_write()
2890 writel(val, (sli4->reg[0] + SLI4_BMBX_REG)); in sli_bmbx_write()
2894 return -EIO; in sli_bmbx_write()
2896 val = sli_bmbx_write_lo(sli4->bmbx.phys); in sli_bmbx_write()
2897 writel(val, (sli4->reg[0] + SLI4_BMBX_REG)); in sli_bmbx_write()
2906 void *cqe = (u8 *)sli4->bmbx.virt + SLI4_BMBX_SIZE; in sli_bmbx_command()
2909 efc_log_crit(sli4, "Chip is in an error state -Mailbox command rejected"); in sli_bmbx_command()
2914 return -EIO; in sli_bmbx_command()
2917 /* Submit a command to the bootstrap mailbox and check the status */ in sli_bmbx_command()
2920 &sli4->bmbx.phys, readl(sli4->reg[0] + SLI4_BMBX_REG)); in sli_bmbx_command()
2921 return -EIO; in sli_bmbx_command()
2925 if (le32_to_cpu(((struct sli4_mcqe *)cqe)->dw3_flags) & in sli_bmbx_command()
2930 return -EIO; in sli_bmbx_command()
2940 config_link->hdr.command = SLI4_MBX_CMD_CONFIG_LINK; in sli_cmd_config_link()
2942 /* Port interprets zero in a field as "use default value" */ in sli_cmd_config_link()
2954 hdr->command = SLI4_MBX_CMD_DOWN_LINK; in sli_cmd_down_link()
2956 /* Port interprets zero in a field as "use default value" */ in sli_cmd_down_link()
2968 cmd->hdr.command = SLI4_MBX_CMD_DUMP; in sli_cmd_dump_type4()
2969 cmd->type_dword = cpu_to_le32(0x4); in sli_cmd_dump_type4()
2970 cmd->wki_selection = cpu_to_le16(wki); in sli_cmd_dump_type4()
2984 psize = dma->size; in sli_cmd_common_read_transceiver_data()
2988 return -EIO; in sli_cmd_common_read_transceiver_data()
2990 sli_cmd_fill_hdr(&req->hdr, SLI4_CMN_READ_TRANS_DATA, in sli_cmd_common_read_transceiver_data()
2994 req->page_number = cpu_to_le32(page_num); in sli_cmd_common_read_transceiver_data()
2995 req->port = cpu_to_le32(sli4->port_number); in sli_cmd_common_read_transceiver_data()
3010 cmd->hdr.command = SLI4_MBX_CMD_READ_LNK_STAT; in sli_cmd_read_link_stats()
3020 cmd->dw1_flags = cpu_to_le32(flags); in sli_cmd_read_link_stats()
3032 cmd->hdr.command = SLI4_MBX_CMD_READ_STATUS; in sli_cmd_read_status()
3038 cmd->dw1_flags = cpu_to_le32(flags); in sli_cmd_read_status()
3050 init_link->hdr.command = SLI4_MBX_CMD_INIT_LINK; in sli_cmd_init_link()
3052 init_link->sel_reset_al_pa_dword = in sli_cmd_init_link()
3056 init_link->link_speed_sel_code = cpu_to_le32(speed); in sli_cmd_init_link()
3069 init_link->flags0 = cpu_to_le32(flags); in sli_cmd_init_link()
3070 return -EIO; in sli_cmd_init_link()
3073 switch (sli4->topology) { in sli_cmd_init_link()
3075 /* Attempt P2P but failover to FC-AL */ in sli_cmd_init_link()
3083 efc_log_info(sli4, "unsupported FC-AL speed %d\n", in sli_cmd_init_link()
3085 init_link->flags0 = cpu_to_le32(flags); in sli_cmd_init_link()
3086 return -EIO; in sli_cmd_init_link()
3094 efc_log_info(sli4, "unsupported topology %#x\n", sli4->topology); in sli_cmd_init_link()
3096 init_link->flags0 = cpu_to_le32(flags); in sli_cmd_init_link()
3097 return -EIO; in sli_cmd_init_link()
3105 init_link->flags0 = cpu_to_le32(flags); in sli_cmd_init_link()
3118 init_vfi->hdr.command = SLI4_MBX_CMD_INIT_VFI; in sli_cmd_init_vfi()
3119 init_vfi->vfi = cpu_to_le16(vfi); in sli_cmd_init_vfi()
3120 init_vfi->fcfi = cpu_to_le16(fcfi); in sli_cmd_init_vfi()
3128 init_vfi->flags0_word = cpu_to_le16(flags); in sli_cmd_init_vfi()
3129 init_vfi->vpi = cpu_to_le16(vpi); in sli_cmd_init_vfi()
3142 init_vpi->hdr.command = SLI4_MBX_CMD_INIT_VPI; in sli_cmd_init_vpi()
3143 init_vpi->vpi = cpu_to_le16(vpi); in sli_cmd_init_vpi()
3144 init_vpi->vfi = cpu_to_le16(vfi); in sli_cmd_init_vpi()
3157 post_xri->hdr.command = SLI4_MBX_CMD_POST_XRI; in sli_cmd_post_xri()
3158 post_xri->xri_base = cpu_to_le16(xri_base); in sli_cmd_post_xri()
3162 post_xri->xri_count_flags = cpu_to_le16(xri_count_flags); in sli_cmd_post_xri()
3174 release_xri->hdr.command = SLI4_MBX_CMD_RELEASE_XRI; in sli_cmd_release_xri()
3175 release_xri->xri_count_word = cpu_to_le16(num_xri & in sli_cmd_release_xri()
3188 read_config->hdr.command = SLI4_MBX_CMD_READ_CONFIG; in sli_cmd_read_config()
3200 read_nvparms->hdr.command = SLI4_MBX_CMD_READ_NVPARMS; in sli_cmd_read_nvparms()
3213 write_nvparms->hdr.command = SLI4_MBX_CMD_WRITE_NVPARMS; in sli_cmd_write_nvparms()
3214 memcpy(write_nvparms->wwpn, wwpn, 8); in sli_cmd_write_nvparms()
3215 memcpy(write_nvparms->wwnn, wwnn, 8); in sli_cmd_write_nvparms()
3217 write_nvparms->hard_alpa_d_id = in sli_cmd_write_nvparms()
3229 read_rev->hdr.command = SLI4_MBX_CMD_READ_REV; in sli_cmd_read_rev()
3231 if (vpd && vpd->size) { in sli_cmd_read_rev()
3232 read_rev->flags0_word |= cpu_to_le16(SLI4_READ_REV_FLAG_VPD); in sli_cmd_read_rev()
3234 read_rev->available_length_dword = in sli_cmd_read_rev()
3235 cpu_to_le32(vpd->size & in sli_cmd_read_rev()
3238 read_rev->hostbuf.low = in sli_cmd_read_rev()
3239 cpu_to_le32(lower_32_bits(vpd->phys)); in sli_cmd_read_rev()
3240 read_rev->hostbuf.high = in sli_cmd_read_rev()
3241 cpu_to_le32(upper_32_bits(vpd->phys)); in sli_cmd_read_rev()
3254 return -EIO; in sli_cmd_read_sparm64()
3257 if (!dma || !dma->phys) { in sli_cmd_read_sparm64()
3259 return -EIO; in sli_cmd_read_sparm64()
3264 read_sparm64->hdr.command = SLI4_MBX_CMD_READ_SPARM64; in sli_cmd_read_sparm64()
3266 read_sparm64->bde_64.bde_type_buflen = in sli_cmd_read_sparm64()
3268 (dma->size & SLI4_BDE_LEN_MASK)); in sli_cmd_read_sparm64()
3269 read_sparm64->bde_64.u.data.low = in sli_cmd_read_sparm64()
3270 cpu_to_le32(lower_32_bits(dma->phys)); in sli_cmd_read_sparm64()
3271 read_sparm64->bde_64.u.data.high = in sli_cmd_read_sparm64()
3272 cpu_to_le32(upper_32_bits(dma->phys)); in sli_cmd_read_sparm64()
3274 read_sparm64->vpi = cpu_to_le16(vpi); in sli_cmd_read_sparm64()
3284 if (!dma || !dma->size) in sli_cmd_read_topology()
3285 return -EIO; in sli_cmd_read_topology()
3287 if (dma->size < SLI4_MIN_LOOP_MAP_BYTES) { in sli_cmd_read_topology()
3288 efc_log_err(sli4, "loop map buffer too small %zx\n", dma->size); in sli_cmd_read_topology()
3289 return -EIO; in sli_cmd_read_topology()
3294 read_topo->hdr.command = SLI4_MBX_CMD_READ_TOPOLOGY; in sli_cmd_read_topology()
3296 memset(dma->virt, 0, dma->size); in sli_cmd_read_topology()
3298 read_topo->bde_loop_map.bde_type_buflen = in sli_cmd_read_topology()
3300 (dma->size & SLI4_BDE_LEN_MASK)); in sli_cmd_read_topology()
3301 read_topo->bde_loop_map.u.data.low = in sli_cmd_read_topology()
3302 cpu_to_le32(lower_32_bits(dma->phys)); in sli_cmd_read_topology()
3303 read_topo->bde_loop_map.u.data.high = in sli_cmd_read_topology()
3304 cpu_to_le32(upper_32_bits(dma->phys)); in sli_cmd_read_topology()
3318 reg_fcfi->hdr.command = SLI4_MBX_CMD_REG_FCFI; in sli_cmd_reg_fcfi()
3320 reg_fcfi->fcf_index = cpu_to_le16(index); in sli_cmd_reg_fcfi()
3325 reg_fcfi->rqid0 = rq_cfg[0].rq_id; in sli_cmd_reg_fcfi()
3328 reg_fcfi->rqid1 = rq_cfg[1].rq_id; in sli_cmd_reg_fcfi()
3331 reg_fcfi->rqid2 = rq_cfg[2].rq_id; in sli_cmd_reg_fcfi()
3334 reg_fcfi->rqid3 = rq_cfg[3].rq_id; in sli_cmd_reg_fcfi()
3337 reg_fcfi->rq_cfg[i].r_ctl_mask = rq_cfg[i].r_ctl_mask; in sli_cmd_reg_fcfi()
3338 reg_fcfi->rq_cfg[i].r_ctl_match = rq_cfg[i].r_ctl_match; in sli_cmd_reg_fcfi()
3339 reg_fcfi->rq_cfg[i].type_mask = rq_cfg[i].type_mask; in sli_cmd_reg_fcfi()
3340 reg_fcfi->rq_cfg[i].type_match = rq_cfg[i].type_match; in sli_cmd_reg_fcfi()
3357 reg_fcfi_mrq->hdr.command = SLI4_MBX_CMD_REG_FCFI_MRQ; in sli_cmd_reg_fcfi_mrq()
3359 reg_fcfi_mrq->fcf_index = cpu_to_le16(fcf_index); in sli_cmd_reg_fcfi_mrq()
3363 reg_fcfi_mrq->dw8_vlan = cpu_to_le32(SLI4_REGFCFI_MRQ_MODE); in sli_cmd_reg_fcfi_mrq()
3366 reg_fcfi_mrq->rq_cfg[i].r_ctl_mask = rq_cfg[i].r_ctl_mask; in sli_cmd_reg_fcfi_mrq()
3367 reg_fcfi_mrq->rq_cfg[i].r_ctl_match = rq_cfg[i].r_ctl_match; in sli_cmd_reg_fcfi_mrq()
3368 reg_fcfi_mrq->rq_cfg[i].type_mask = rq_cfg[i].type_mask; in sli_cmd_reg_fcfi_mrq()
3369 reg_fcfi_mrq->rq_cfg[i].type_match = rq_cfg[i].type_match; in sli_cmd_reg_fcfi_mrq()
3373 reg_fcfi_mrq->rqid3 = rq_cfg[i].rq_id; in sli_cmd_reg_fcfi_mrq()
3376 reg_fcfi_mrq->rqid2 = rq_cfg[i].rq_id; in sli_cmd_reg_fcfi_mrq()
3379 reg_fcfi_mrq->rqid1 = rq_cfg[i].rq_id; in sli_cmd_reg_fcfi_mrq()
3382 reg_fcfi_mrq->rqid0 = rq_cfg[i].rq_id; in sli_cmd_reg_fcfi_mrq()
3390 reg_fcfi_mrq->dw9_mrqflags = cpu_to_le32(mrq_flags); in sli_cmd_reg_fcfi_mrq()
3404 reg_rpi->hdr.command = SLI4_MBX_CMD_REG_RPI; in sli_cmd_reg_rpi()
3406 reg_rpi->rpi = cpu_to_le16(rpi); in sli_cmd_reg_rpi()
3420 reg_rpi->dw2_rportid_flags = cpu_to_le32(rportid_flags); in sli_cmd_reg_rpi()
3422 reg_rpi->bde_64.bde_type_buflen = in sli_cmd_reg_rpi()
3425 reg_rpi->bde_64.u.data.low = in sli_cmd_reg_rpi()
3426 cpu_to_le32(lower_32_bits(dma->phys)); in sli_cmd_reg_rpi()
3427 reg_rpi->bde_64.u.data.high = in sli_cmd_reg_rpi()
3428 cpu_to_le32(upper_32_bits(dma->phys)); in sli_cmd_reg_rpi()
3430 reg_rpi->vpi = cpu_to_le16(vpi); in sli_cmd_reg_rpi()
3444 reg_vfi->hdr.command = SLI4_MBX_CMD_REG_VFI; in sli_cmd_reg_vfi()
3446 reg_vfi->vfi = cpu_to_le16(vfi); in sli_cmd_reg_vfi()
3448 reg_vfi->fcfi = cpu_to_le16(fcfi); in sli_cmd_reg_vfi()
3450 reg_vfi->sparm.bde_type_buflen = in sli_cmd_reg_vfi()
3453 reg_vfi->sparm.u.data.low = in sli_cmd_reg_vfi()
3455 reg_vfi->sparm.u.data.high = in sli_cmd_reg_vfi()
3458 reg_vfi->e_d_tov = cpu_to_le32(sli4->e_d_tov); in sli_cmd_reg_vfi()
3459 reg_vfi->r_a_tov = cpu_to_le32(sli4->r_a_tov); in sli_cmd_reg_vfi()
3461 reg_vfi->dw0w1_flags |= cpu_to_le16(SLI4_REGVFI_VP); in sli_cmd_reg_vfi()
3462 reg_vfi->vpi = cpu_to_le16(vpi); in sli_cmd_reg_vfi()
3463 memcpy(reg_vfi->wwpn, &sli_wwpn, sizeof(reg_vfi->wwpn)); in sli_cmd_reg_vfi()
3464 reg_vfi->dw10_lportid_flags = cpu_to_le32(fc_id); in sli_cmd_reg_vfi()
3478 reg_vpi->hdr.command = SLI4_MBX_CMD_REG_VPI; in sli_cmd_reg_vpi()
3486 reg_vpi->dw2_lportid_flags = cpu_to_le32(flags); in sli_cmd_reg_vpi()
3487 memcpy(reg_vpi->wwpn, &sli_wwpn, sizeof(reg_vpi->wwpn)); in sli_cmd_reg_vpi()
3488 reg_vpi->vpi = cpu_to_le16(vpi); in sli_cmd_reg_vpi()
3489 reg_vpi->vfi = cpu_to_le16(vfi); in sli_cmd_reg_vpi()
3502 req_features->hdr.command = SLI4_MBX_CMD_RQST_FEATURES; in sli_cmd_request_features()
3505 req_features->dw1_qry = cpu_to_le32(SLI4_REQFEAT_QRY); in sli_cmd_request_features()
3507 req_features->cmd = cpu_to_le32(features_mask); in sli_cmd_request_features()
3519 unreg_fcfi->hdr.command = SLI4_MBX_CMD_UNREG_FCFI; in sli_cmd_unreg_fcfi()
3520 unreg_fcfi->fcfi = cpu_to_le16(indicator); in sli_cmd_unreg_fcfi()
3534 unreg_rpi->hdr.command = SLI4_MBX_CMD_UNREG_RPI; in sli_cmd_unreg_rpi()
3542 unreg_rpi->dw2_dest_n_portid = in sli_cmd_unreg_rpi()
3556 return -EIO; in sli_cmd_unreg_rpi()
3559 unreg_rpi->dw1w1_flags = cpu_to_le16(flags); in sli_cmd_unreg_rpi()
3560 unreg_rpi->index = cpu_to_le16(indicator); in sli_cmd_unreg_rpi()
3572 unreg_vfi->hdr.command = SLI4_MBX_CMD_UNREG_VFI; in sli_cmd_unreg_vfi()
3575 unreg_vfi->index = cpu_to_le16(index); in sli_cmd_unreg_vfi()
3578 unreg_vfi->index = cpu_to_le16(index); in sli_cmd_unreg_vfi()
3581 unreg_vfi->index = cpu_to_le16(U32_MAX); in sli_cmd_unreg_vfi()
3584 return -EIO; in sli_cmd_unreg_vfi()
3588 unreg_vfi->dw2_flags = cpu_to_le16(SLI4_UNREG_VFI_II_FCFI); in sli_cmd_unreg_vfi()
3601 unreg_vpi->hdr.command = SLI4_MBX_CMD_UNREG_VPI; in sli_cmd_unreg_vpi()
3602 unreg_vpi->index = cpu_to_le16(indicator); in sli_cmd_unreg_vpi()
3615 unreg_vpi->index = cpu_to_le16(U32_MAX); in sli_cmd_unreg_vpi()
3619 return -EIO; in sli_cmd_unreg_vpi()
3622 unreg_vpi->dw2w0_flags = cpu_to_le16(flags); in sli_cmd_unreg_vpi()
3637 return -EIO; in sli_cmd_common_modify_eq_delay()
3639 sli_cmd_fill_hdr(&req->hdr, SLI4_CMN_MODIFY_EQ_DELAY, in sli_cmd_common_modify_eq_delay()
3642 req->num_eq = cpu_to_le32(num_q); in sli_cmd_common_modify_eq_delay()
3645 req->eq_delay_record[i].eq_id = cpu_to_le32(q[i].id); in sli_cmd_common_modify_eq_delay()
3646 req->eq_delay_record[i].phase = cpu_to_le32(shift); in sli_cmd_common_modify_eq_delay()
3647 req->eq_delay_record[i].delay_multiplier = in sli_cmd_common_modify_eq_delay()
3665 sli_cmd_fill_hdr(&req->hdr, SLI4_OPC_LOWLEVEL_SET_WATCHDOG, in sli4_cmd_lowlevel_set_watchdog()
3668 req->watchdog_timeout = cpu_to_le16(timeout); in sli4_cmd_lowlevel_set_watchdog()
3679 return -EIO; in sli_cmd_common_get_cntl_attributes()
3681 hdr->opcode = SLI4_CMN_GET_CNTL_ATTRIBUTES; in sli_cmd_common_get_cntl_attributes()
3682 hdr->subsystem = SLI4_SUBSYSTEM_COMMON; in sli_cmd_common_get_cntl_attributes()
3683 hdr->request_length = cpu_to_le32(dma->size); in sli_cmd_common_get_cntl_attributes()
3696 return -EIO; in sli_cmd_common_get_cntl_addl_attributes()
3698 hdr->opcode = SLI4_CMN_GET_CNTL_ADDL_ATTRS; in sli_cmd_common_get_cntl_addl_attributes()
3699 hdr->subsystem = SLI4_SUBSYSTEM_COMMON; in sli_cmd_common_get_cntl_addl_attributes()
3700 hdr->request_length = cpu_to_le32(dma->size); in sli_cmd_common_get_cntl_addl_attributes()
3713 return -EIO; in sli_cmd_common_nop()
3715 sli_cmd_fill_hdr(&nop->hdr, SLI4_CMN_NOP, SLI4_SUBSYSTEM_COMMON, in sli_cmd_common_nop()
3718 memcpy(&nop->context, &context, sizeof(context)); in sli_cmd_common_nop()
3731 return -EIO; in sli_cmd_common_get_resource_extent_info()
3733 sli_cmd_fill_hdr(&ext->hdr, SLI4_CMN_GET_RSC_EXTENT_INFO, in sli_cmd_common_get_resource_extent_info()
3737 ext->resource_type = cpu_to_le16(rtype); in sli_cmd_common_get_resource_extent_info()
3750 return -EIO; in sli_cmd_common_get_sli4_parameters()
3752 hdr->opcode = SLI4_CMN_GET_SLI4_PARAMS; in sli_cmd_common_get_sli4_parameters()
3753 hdr->subsystem = SLI4_SUBSYSTEM_COMMON; in sli_cmd_common_get_sli4_parameters()
3754 hdr->request_length = SLI4_RQST_PYLD_LEN(cmn_get_sli4_params); in sli_cmd_common_get_sli4_parameters()
3767 return -EIO; in sli_cmd_common_get_port_name()
3769 sli_cmd_fill_hdr(&pname->hdr, SLI4_CMN_GET_PORT_NAME, in sli_cmd_common_get_port_name()
3774 pname->port_type = SLI4_PORT_TYPE_FC; in sli_cmd_common_get_port_name()
3792 return -EIO; in sli_cmd_common_write_object()
3794 sli_cmd_fill_hdr(&wr_obj->hdr, SLI4_CMN_WRITE_OBJECT, in sli_cmd_common_write_object()
3804 wr_obj->desired_write_len_dword = cpu_to_le32(dwflags); in sli_cmd_common_write_object()
3806 wr_obj->write_offset = cpu_to_le32(offset); in sli_cmd_common_write_object()
3807 strncpy(wr_obj->object_name, obj_name, sizeof(wr_obj->object_name) - 1); in sli_cmd_common_write_object()
3808 wr_obj->host_buffer_descriptor_count = cpu_to_le32(1); in sli_cmd_common_write_object()
3810 bde = (struct sli4_bde *)wr_obj->host_buffer_descriptor; in sli_cmd_common_write_object()
3813 bde->bde_type_buflen = in sli_cmd_common_write_object()
3816 bde->u.data.low = cpu_to_le32(lower_32_bits(dma->phys)); in sli_cmd_common_write_object()
3817 bde->u.data.high = cpu_to_le32(upper_32_bits(dma->phys)); in sli_cmd_common_write_object()
3830 return -EIO; in sli_cmd_common_delete_object()
3832 sli_cmd_fill_hdr(&req->hdr, SLI4_CMN_DELETE_OBJECT, in sli_cmd_common_delete_object()
3836 strncpy(req->object_name, obj_name, sizeof(req->object_name) - 1); in sli_cmd_common_delete_object()
3850 return -EIO; in sli_cmd_common_read_object()
3852 sli_cmd_fill_hdr(&rd_obj->hdr, SLI4_CMN_READ_OBJECT, in sli_cmd_common_read_object()
3855 rd_obj->desired_read_length_dword = in sli_cmd_common_read_object()
3858 rd_obj->read_offset = cpu_to_le32(offset); in sli_cmd_common_read_object()
3859 strncpy(rd_obj->object_name, obj_name, sizeof(rd_obj->object_name) - 1); in sli_cmd_common_read_object()
3860 rd_obj->host_buffer_descriptor_count = cpu_to_le32(1); in sli_cmd_common_read_object()
3862 bde = (struct sli4_bde *)rd_obj->host_buffer_descriptor; in sli_cmd_common_read_object()
3865 bde->bde_type_buflen = in sli_cmd_common_read_object()
3869 bde->u.data.low = cpu_to_le32(lower_32_bits(dma->phys)); in sli_cmd_common_read_object()
3870 bde->u.data.high = cpu_to_le32(upper_32_bits(dma->phys)); in sli_cmd_common_read_object()
3872 bde->u.data.low = 0; in sli_cmd_common_read_object()
3873 bde->u.data.high = 0; in sli_cmd_common_read_object()
3888 return -EIO; in sli_cmd_dmtf_exec_clp_cmd()
3890 sli_cmd_fill_hdr(&clp_cmd->hdr, DMTF_EXEC_CLP_CMD, SLI4_SUBSYSTEM_DMTF, in sli_cmd_dmtf_exec_clp_cmd()
3893 clp_cmd->cmd_buf_length = cpu_to_le32(cmd->size); in sli_cmd_dmtf_exec_clp_cmd()
3894 clp_cmd->cmd_buf_addr_low = cpu_to_le32(lower_32_bits(cmd->phys)); in sli_cmd_dmtf_exec_clp_cmd()
3895 clp_cmd->cmd_buf_addr_high = cpu_to_le32(upper_32_bits(cmd->phys)); in sli_cmd_dmtf_exec_clp_cmd()
3896 clp_cmd->resp_buf_length = cpu_to_le32(resp->size); in sli_cmd_dmtf_exec_clp_cmd()
3897 clp_cmd->resp_buf_addr_low = cpu_to_le32(lower_32_bits(resp->phys)); in sli_cmd_dmtf_exec_clp_cmd()
3898 clp_cmd->resp_buf_addr_high = cpu_to_le32(upper_32_bits(resp->phys)); in sli_cmd_dmtf_exec_clp_cmd()
3913 return -EIO; in sli_cmd_common_set_dump_location()
3915 sli_cmd_fill_hdr(&set_dump_loc->hdr, SLI4_CMN_SET_DUMP_LOCATION, in sli_cmd_common_set_dump_location()
3929 set_dump_loc->buf_addr_low = in sli_cmd_common_set_dump_location()
3930 cpu_to_le32(lower_32_bits(buffer->phys)); in sli_cmd_common_set_dump_location()
3931 set_dump_loc->buf_addr_high = in sli_cmd_common_set_dump_location()
3932 cpu_to_le32(upper_32_bits(buffer->phys)); in sli_cmd_common_set_dump_location()
3935 buffer->len & SLI4_CMN_SET_DUMP_BUFFER_LEN; in sli_cmd_common_set_dump_location()
3937 set_dump_loc->buf_addr_low = 0; in sli_cmd_common_set_dump_location()
3938 set_dump_loc->buf_addr_high = 0; in sli_cmd_common_set_dump_location()
3939 set_dump_loc->buffer_length_dword = 0; in sli_cmd_common_set_dump_location()
3941 set_dump_loc->buffer_length_dword = cpu_to_le32(buffer_length_flag); in sli_cmd_common_set_dump_location()
3954 return -EIO; in sli_cmd_common_set_features()
3956 sli_cmd_fill_hdr(&cmd->hdr, SLI4_CMN_SET_FEATURES, in sli_cmd_common_set_features()
3960 cmd->feature = cpu_to_le32(feature); in sli_cmd_common_set_features()
3961 cmd->param_len = cpu_to_le32(param_len); in sli_cmd_common_set_features()
3962 memcpy(cmd->params, parameter, param_len); in sli_cmd_common_set_features()
3971 u32 dwflags = le32_to_cpu(mcqe->dw3_flags); in sli_cqe_mq()
3974 * the "consumed" bit set and a second with the "complete" bit set. in sli_cqe_mq()
3980 if (le16_to_cpu(mcqe->completion_status)) { in sli_cqe_mq()
3982 le16_to_cpu(mcqe->completion_status), in sli_cqe_mq()
3983 le16_to_cpu(mcqe->extended_status), in sli_cqe_mq()
3990 return le16_to_cpu(mcqe->completion_status); in sli_cqe_mq()
3997 int rc = -EIO; in sli_cqe_async()
4001 return -EIO; in sli_cqe_async()
4004 switch (acqe->event_code) { in sli_cqe_async()
4007 acqe->event_code); in sli_cqe_async()
4014 acqe->event_type, in sli_cqe_async()
4015 le32_to_cpu(acqe->event_data[0]), in sli_cqe_async()
4016 le32_to_cpu(acqe->event_data[1])); in sli_cqe_async()
4022 efc_log_info(sli4, "ACQE unknown=%#x\n", acqe->event_code); in sli_cqe_async()
4033 /* Determine if the chip FW is in a ready state */ in sli_fw_ready()
4063 writel(val, (sli4->reg[0] + SLI4_PORT_CTRL_REG)); in sli_sliport_reset()
4084 * Reset port to a known state in sli_fw_init()
4092 struct sli4_cmd_request_features *req_features = sli4->bmbx.virt; in sli_request_features()
4094 if (sli_cmd_request_features(sli4, sli4->bmbx.virt, *features, query)) { in sli_request_features()
4096 return -EIO; in sli_request_features()
4101 return -EIO; in sli_request_features()
4104 if (le16_to_cpu(req_features->hdr.status)) { in sli_request_features()
4106 le16_to_cpu(req_features->hdr.status)); in sli_request_features()
4107 return -EIO; in sli_request_features()
4110 *features = le32_to_cpu(req_features->resp); in sli_request_features()
4121 sli4->qinfo.max_qentries[q] = in sli_calc_max_qentries()
4122 sli_convert_mask_to_count(sli4->qinfo.count_method[q], in sli_calc_max_qentries()
4123 sli4->qinfo.count_mask[q]); in sli_calc_max_qentries()
4131 qentries = sli4->qinfo.max_qentries[q]; in sli_calc_max_qentries()
4135 sli4->qinfo.max_qentries[q], qentries); in sli_calc_max_qentries()
4136 sli4->qinfo.max_qentries[q] = qentries; in sli_calc_max_qentries()
4143 struct sli4_rsp_read_config *conf = sli4->bmbx.virt; in sli_get_read_config()
4147 if (sli_cmd_read_config(sli4, sli4->bmbx.virt)) { in sli_get_read_config()
4149 return -EIO; in sli_get_read_config()
4154 return -EIO; in sli_get_read_config()
4157 if (le16_to_cpu(conf->hdr.status)) { in sli_get_read_config()
4159 le16_to_cpu(conf->hdr.status)); in sli_get_read_config()
4160 return -EIO; in sli_get_read_config()
4163 sli4->params.has_extents = in sli_get_read_config()
4164 le32_to_cpu(conf->ext_dword) & SLI4_READ_CFG_RESP_RESOURCE_EXT; in sli_get_read_config()
4165 if (sli4->params.has_extents) { in sli_get_read_config()
4167 return -EIO; in sli_get_read_config()
4170 base = sli4->ext[0].base; in sli_get_read_config()
4176 return -EIO; in sli_get_read_config()
4180 sli4->ext[i].number = 1; in sli_get_read_config()
4181 sli4->ext[i].n_alloc = 0; in sli_get_read_config()
4182 sli4->ext[i].base = &base[i]; in sli_get_read_config()
4185 sli4->ext[SLI4_RSRC_VFI].base[0] = le16_to_cpu(conf->vfi_base); in sli_get_read_config()
4186 sli4->ext[SLI4_RSRC_VFI].size = le16_to_cpu(conf->vfi_count); in sli_get_read_config()
4188 sli4->ext[SLI4_RSRC_VPI].base[0] = le16_to_cpu(conf->vpi_base); in sli_get_read_config()
4189 sli4->ext[SLI4_RSRC_VPI].size = le16_to_cpu(conf->vpi_count); in sli_get_read_config()
4191 sli4->ext[SLI4_RSRC_RPI].base[0] = le16_to_cpu(conf->rpi_base); in sli_get_read_config()
4192 sli4->ext[SLI4_RSRC_RPI].size = le16_to_cpu(conf->rpi_count); in sli_get_read_config()
4194 sli4->ext[SLI4_RSRC_XRI].base[0] = le16_to_cpu(conf->xri_base); in sli_get_read_config()
4195 sli4->ext[SLI4_RSRC_XRI].size = le16_to_cpu(conf->xri_count); in sli_get_read_config()
4197 sli4->ext[SLI4_RSRC_FCFI].base[0] = 0; in sli_get_read_config()
4198 sli4->ext[SLI4_RSRC_FCFI].size = le16_to_cpu(conf->fcfi_count); in sli_get_read_config()
4201 total = sli4->ext[i].number * sli4->ext[i].size; in sli_get_read_config()
4202 sli4->ext[i].use_map = bitmap_zalloc(total, GFP_KERNEL); in sli_get_read_config()
4203 if (!sli4->ext[i].use_map) { in sli_get_read_config()
4206 return -EIO; in sli_get_read_config()
4208 sli4->ext[i].map_size = total; in sli_get_read_config()
4211 sli4->topology = (le32_to_cpu(conf->topology_dword) & in sli_get_read_config()
4213 switch (sli4->topology) { in sli_get_read_config()
4224 efc_log_info(sli4, "bad topology %#x\n", sli4->topology); in sli_get_read_config()
4227 sli4->e_d_tov = le16_to_cpu(conf->e_d_tov); in sli_get_read_config()
4228 sli4->r_a_tov = le16_to_cpu(conf->r_a_tov); in sli_get_read_config()
4230 sli4->link_module_type = le16_to_cpu(conf->lmt); in sli_get_read_config()
4232 sli4->qinfo.max_qcount[SLI4_QTYPE_EQ] = le16_to_cpu(conf->eq_count); in sli_get_read_config()
4233 sli4->qinfo.max_qcount[SLI4_QTYPE_CQ] = le16_to_cpu(conf->cq_count); in sli_get_read_config()
4234 sli4->qinfo.max_qcount[SLI4_QTYPE_WQ] = le16_to_cpu(conf->wq_count); in sli_get_read_config()
4235 sli4->qinfo.max_qcount[SLI4_QTYPE_RQ] = le16_to_cpu(conf->rq_count); in sli_get_read_config()
4240 * date. Dummy up a "max" MQ count here. in sli_get_read_config()
4242 sli4->qinfo.max_qcount[SLI4_QTYPE_MQ] = SLI4_USER_MQ_COUNT; in sli_get_read_config()
4258 if (sli_cmd_common_get_sli4_parameters(sli4, sli4->bmbx.virt)) in sli_get_sli4_parameters()
4259 return -EIO; in sli_get_sli4_parameters()
4262 (((u8 *)sli4->bmbx.virt) + in sli_get_sli4_parameters()
4267 return -EIO; in sli_get_sli4_parameters()
4270 if (parms->hdr.status) { in sli_get_sli4_parameters()
4272 parms->hdr.status); in sli_get_sli4_parameters()
4274 parms->hdr.additional_status); in sli_get_sli4_parameters()
4275 return -EIO; in sli_get_sli4_parameters()
4278 dw_loopback = le32_to_cpu(parms->dw16_loopback_scope); in sli_get_sli4_parameters()
4279 dw_eq_pg_cnt = le32_to_cpu(parms->dw6_eq_page_cnt); in sli_get_sli4_parameters()
4280 dw_cq_pg_cnt = le32_to_cpu(parms->dw8_cq_page_cnt); in sli_get_sli4_parameters()
4281 dw_mq_pg_cnt = le32_to_cpu(parms->dw10_mq_page_cnt); in sli_get_sli4_parameters()
4282 dw_wq_pg_cnt = le32_to_cpu(parms->dw12_wq_page_cnt); in sli_get_sli4_parameters()
4283 dw_rq_pg_cnt = le32_to_cpu(parms->dw14_rq_page_cnt); in sli_get_sli4_parameters()
4285 sli4->params.auto_reg = (dw_loopback & SLI4_PARAM_AREG); in sli_get_sli4_parameters()
4286 sli4->params.auto_xfer_rdy = (dw_loopback & SLI4_PARAM_AGXF); in sli_get_sli4_parameters()
4287 sli4->params.hdr_template_req = (dw_loopback & SLI4_PARAM_HDRR); in sli_get_sli4_parameters()
4288 sli4->params.t10_dif_inline_capable = (dw_loopback & SLI4_PARAM_TIMM); in sli_get_sli4_parameters()
4289 sli4->params.t10_dif_separate_capable = (dw_loopback & SLI4_PARAM_TSMM); in sli_get_sli4_parameters()
4291 sli4->params.mq_create_version = GET_Q_CREATE_VERSION(dw_mq_pg_cnt); in sli_get_sli4_parameters()
4292 sli4->params.cq_create_version = GET_Q_CREATE_VERSION(dw_cq_pg_cnt); in sli_get_sli4_parameters()
4294 sli4->rq_min_buf_size = le16_to_cpu(parms->min_rq_buffer_size); in sli_get_sli4_parameters()
4295 sli4->rq_max_buf_size = le32_to_cpu(parms->max_rq_buffer_size); in sli_get_sli4_parameters()
4297 sli4->qinfo.qpage_count[SLI4_QTYPE_EQ] = in sli_get_sli4_parameters()
4299 sli4->qinfo.qpage_count[SLI4_QTYPE_CQ] = in sli_get_sli4_parameters()
4301 sli4->qinfo.qpage_count[SLI4_QTYPE_MQ] = in sli_get_sli4_parameters()
4303 sli4->qinfo.qpage_count[SLI4_QTYPE_WQ] = in sli_get_sli4_parameters()
4305 sli4->qinfo.qpage_count[SLI4_QTYPE_RQ] = in sli_get_sli4_parameters()
4310 sli4->qinfo.count_mask[SLI4_QTYPE_EQ] = in sli_get_sli4_parameters()
4311 le16_to_cpu(parms->eqe_count_mask); in sli_get_sli4_parameters()
4312 sli4->qinfo.count_method[SLI4_QTYPE_EQ] = in sli_get_sli4_parameters()
4315 sli4->qinfo.count_mask[SLI4_QTYPE_CQ] = in sli_get_sli4_parameters()
4316 le16_to_cpu(parms->cqe_count_mask); in sli_get_sli4_parameters()
4317 sli4->qinfo.count_method[SLI4_QTYPE_CQ] = in sli_get_sli4_parameters()
4320 sli4->qinfo.count_mask[SLI4_QTYPE_MQ] = in sli_get_sli4_parameters()
4321 le16_to_cpu(parms->mqe_count_mask); in sli_get_sli4_parameters()
4322 sli4->qinfo.count_method[SLI4_QTYPE_MQ] = in sli_get_sli4_parameters()
4325 sli4->qinfo.count_mask[SLI4_QTYPE_WQ] = in sli_get_sli4_parameters()
4326 le16_to_cpu(parms->wqe_count_mask); in sli_get_sli4_parameters()
4327 sli4->qinfo.count_method[SLI4_QTYPE_WQ] = in sli_get_sli4_parameters()
4330 sli4->qinfo.count_mask[SLI4_QTYPE_RQ] = in sli_get_sli4_parameters()
4331 le16_to_cpu(parms->rqe_count_mask); in sli_get_sli4_parameters()
4332 sli4->qinfo.count_method[SLI4_QTYPE_RQ] = in sli_get_sli4_parameters()
4338 dw_sgl_pg_cnt = le32_to_cpu(parms->dw18_sgl_page_cnt); in sli_get_sli4_parameters()
4341 sli4->max_sgl_pages = (dw_sgl_pg_cnt & SLI4_PARAM_SGL_PAGE_CNT_MASK); in sli_get_sli4_parameters()
4344 sli4->sgl_page_sizes = (dw_sgl_pg_cnt & in sli_get_sli4_parameters()
4346 /* ignore HLM here. Use value from REQUEST_FEATURES */ in sli_get_sli4_parameters()
4347 sli4->sge_supported_length = le32_to_cpu(parms->sge_supported_length); in sli_get_sli4_parameters()
4348 sli4->params.sgl_pre_reg_required = (dw_loopback & SLI4_PARAM_SGLR); in sli_get_sli4_parameters()
4349 /* default to using pre-registered SGL's */ in sli_get_sli4_parameters()
4350 sli4->params.sgl_pre_registered = true; in sli_get_sli4_parameters()
4352 sli4->params.perf_hint = dw_loopback & SLI4_PARAM_PHON; in sli_get_sli4_parameters()
4353 sli4->params.perf_wq_id_association = (dw_loopback & SLI4_PARAM_PHWQ); in sli_get_sli4_parameters()
4355 sli4->rq_batch = (le16_to_cpu(parms->dw15w1_rq_db_window) & in sli_get_sli4_parameters()
4361 sli4->wqe_size = SLI4_WQE_EXT_BYTES; in sli_get_sli4_parameters()
4363 sli4->wqe_size = SLI4_WQE_BYTES; in sli_get_sli4_parameters()
4381 memset(sli4->vpd_data.virt, 0, sli4->vpd_data.size); in sli_get_ctrl_attributes()
4382 if (sli_cmd_common_get_cntl_attributes(sli4, sli4->bmbx.virt, in sli_get_ctrl_attributes()
4383 &sli4->vpd_data)) { in sli_get_ctrl_attributes()
4385 return -EIO; in sli_get_ctrl_attributes()
4388 attr = sli4->vpd_data.virt; in sli_get_ctrl_attributes()
4392 return -EIO; in sli_get_ctrl_attributes()
4395 if (attr->hdr.status) { in sli_get_ctrl_attributes()
4397 attr->hdr.status); in sli_get_ctrl_attributes()
4399 attr->hdr.additional_status); in sli_get_ctrl_attributes()
4400 return -EIO; in sli_get_ctrl_attributes()
4403 sli4->port_number = attr->port_num_type_flags & SLI4_CNTL_ATTR_PORTNUM; in sli_get_ctrl_attributes()
4405 memcpy(sli4->bios_version_string, attr->bios_version_str, in sli_get_ctrl_attributes()
4406 sizeof(sli4->bios_version_string)); in sli_get_ctrl_attributes()
4411 data.virt = dma_alloc_coherent(&sli4->pci->dev, data.size, in sli_get_ctrl_attributes()
4416 return -EIO; in sli_get_ctrl_attributes()
4419 if (sli_cmd_common_get_cntl_addl_attributes(sli4, sli4->bmbx.virt, in sli_get_ctrl_attributes()
4422 dma_free_coherent(&sli4->pci->dev, data.size, in sli_get_ctrl_attributes()
4424 return -EIO; in sli_get_ctrl_attributes()
4429 dma_free_coherent(&sli4->pci->dev, data.size, in sli_get_ctrl_attributes()
4431 return -EIO; in sli_get_ctrl_attributes()
4435 if (add_attr->hdr.status) { in sli_get_ctrl_attributes()
4437 add_attr->hdr.status); in sli_get_ctrl_attributes()
4438 dma_free_coherent(&sli4->pci->dev, data.size, in sli_get_ctrl_attributes()
4440 return -EIO; in sli_get_ctrl_attributes()
4443 memcpy(sli4->ipl_name, add_attr->ipl_file_name, sizeof(sli4->ipl_name)); in sli_get_ctrl_attributes()
4445 efc_log_info(sli4, "IPL:%s\n", (char *)sli4->ipl_name); in sli_get_ctrl_attributes()
4447 dma_free_coherent(&sli4->pci->dev, data.size, data.virt, in sli_get_ctrl_attributes()
4456 struct sli4_cmd_read_rev *read_rev = sli4->bmbx.virt; in sli_get_fw_rev()
4458 if (sli_cmd_read_rev(sli4, sli4->bmbx.virt, &sli4->vpd_data)) in sli_get_fw_rev()
4459 return -EIO; in sli_get_fw_rev()
4463 return -EIO; in sli_get_fw_rev()
4466 if (le16_to_cpu(read_rev->hdr.status)) { in sli_get_fw_rev()
4468 le16_to_cpu(read_rev->hdr.status)); in sli_get_fw_rev()
4469 return -EIO; in sli_get_fw_rev()
4472 sli4->fw_rev[0] = le32_to_cpu(read_rev->first_fw_id); in sli_get_fw_rev()
4473 memcpy(sli4->fw_name[0], read_rev->first_fw_name, in sli_get_fw_rev()
4474 sizeof(sli4->fw_name[0])); in sli_get_fw_rev()
4476 sli4->fw_rev[1] = le32_to_cpu(read_rev->second_fw_id); in sli_get_fw_rev()
4477 memcpy(sli4->fw_name[1], read_rev->second_fw_name, in sli_get_fw_rev()
4478 sizeof(sli4->fw_name[1])); in sli_get_fw_rev()
4480 sli4->hw_rev[0] = le32_to_cpu(read_rev->first_hw_rev); in sli_get_fw_rev()
4481 sli4->hw_rev[1] = le32_to_cpu(read_rev->second_hw_rev); in sli_get_fw_rev()
4482 sli4->hw_rev[2] = le32_to_cpu(read_rev->third_hw_rev); in sli_get_fw_rev()
4485 read_rev->first_fw_name, le32_to_cpu(read_rev->first_fw_id), in sli_get_fw_rev()
4486 read_rev->second_fw_name, le32_to_cpu(read_rev->second_fw_id)); in sli_get_fw_rev()
4489 le32_to_cpu(read_rev->first_hw_rev), in sli_get_fw_rev()
4490 le32_to_cpu(read_rev->second_hw_rev)); in sli_get_fw_rev()
4493 if (le32_to_cpu(read_rev->returned_vpd_length) != in sli_get_fw_rev()
4494 le32_to_cpu(read_rev->actual_vpd_length)) { in sli_get_fw_rev()
4496 le32_to_cpu(read_rev->available_length_dword) & in sli_get_fw_rev()
4498 le32_to_cpu(read_rev->returned_vpd_length), in sli_get_fw_rev()
4499 le32_to_cpu(read_rev->actual_vpd_length)); in sli_get_fw_rev()
4501 sli4->vpd_length = le32_to_cpu(read_rev->returned_vpd_length); in sli_get_fw_rev()
4515 return -EIO; in sli_get_config()
4518 return -EIO; in sli_get_config()
4521 return -EIO; in sli_get_config()
4523 if (sli_cmd_common_get_port_name(sli4, sli4->bmbx.virt)) in sli_get_config()
4524 return -EIO; in sli_get_config()
4527 (((u8 *)sli4->bmbx.virt) + in sli_get_config()
4532 return -EIO; in sli_get_config()
4535 sli4->port_name[0] = port_name->port_name[sli4->port_number]; in sli_get_config()
4536 sli4->port_name[1] = '\0'; in sli_get_config()
4539 return -EIO; in sli_get_config()
4541 if (sli_cmd_read_nvparms(sli4, sli4->bmbx.virt)) { in sli_get_config()
4543 return -EIO; in sli_get_config()
4548 return -EIO; in sli_get_config()
4551 read_nvparms = sli4->bmbx.virt; in sli_get_config()
4552 if (le16_to_cpu(read_nvparms->hdr.status)) { in sli_get_config()
4554 le16_to_cpu(read_nvparms->hdr.status)); in sli_get_config()
4555 return -EIO; in sli_get_config()
4558 memcpy(sli4->wwpn, read_nvparms->wwpn, sizeof(sli4->wwpn)); in sli_get_config()
4559 memcpy(sli4->wwnn, read_nvparms->wwnn, sizeof(sli4->wwnn)); in sli_get_config()
4562 sli4->wwpn[0], sli4->wwpn[1], sli4->wwpn[2], sli4->wwpn[3], in sli_get_config()
4563 sli4->wwpn[4], sli4->wwpn[5], sli4->wwpn[6], sli4->wwpn[7]); in sli_get_config()
4565 sli4->wwnn[0], sli4->wwnn[1], sli4->wwnn[2], sli4->wwnn[3], in sli_get_config()
4566 sli4->wwnn[4], sli4->wwnn[5], sli4->wwnn[6], sli4->wwnn[7]); in sli_get_config()
4585 sli4->os = os; in sli_setup()
4586 sli4->pci = pdev; in sli_setup()
4589 sli4->reg[i] = reg[i]; in sli_setup()
4595 return -EIO; in sli_setup()
4599 return -EIO; in sli_setup()
4602 /* driver only support SLI-4 */ in sli_setup()
4605 return -EIO; in sli_setup()
4608 sli4->sli_family = intf & SLI4_INTF_FAMILY_MASK; in sli_setup()
4610 sli4->if_type = intf & SLI4_INTF_IF_TYPE_MASK; in sli_setup()
4620 return -EIO; in sli_setup()
4623 family = sli4->sli_family; in sli_setup()
4631 if (rev_id == asic->rev_id && family == asic->family) { in sli_setup()
4632 sli4->asic_type = family; in sli_setup()
4633 sli4->asic_rev = rev_id; in sli_setup()
4638 if (!sli4->asic_type) { in sli_setup()
4641 return -EIO; in sli_setup()
4645 * The bootstrap mailbox is equivalent to a MQ with a single 256 byte in sli_setup()
4646 * entry, a CQ with a single 16 byte entry, and no event queue. in sli_setup()
4650 sli4->bmbx.size = SLI4_BMBX_SIZE + sizeof(struct sli4_mcqe); in sli_setup()
4651 sli4->bmbx.virt = dma_alloc_coherent(&pdev->dev, sli4->bmbx.size, in sli_setup()
4652 &sli4->bmbx.phys, GFP_KERNEL); in sli_setup()
4653 if (!sli4->bmbx.virt) { in sli_setup()
4654 memset(&sli4->bmbx, 0, sizeof(struct efc_dma)); in sli_setup()
4656 return -EIO; in sli_setup()
4659 if (sli4->bmbx.phys & SLI4_BMBX_MASK_LO) { in sli_setup()
4661 return -EIO; in sli_setup()
4664 efc_log_info(sli4, "bmbx v=%p p=0x%x %08x s=%zd\n", sli4->bmbx.virt, in sli_setup()
4665 upper_32_bits(sli4->bmbx.phys), in sli_setup()
4666 lower_32_bits(sli4->bmbx.phys), sli4->bmbx.size); in sli_setup()
4669 sli4->vpd_data.size = 4096; in sli_setup()
4670 sli4->vpd_data.virt = dma_alloc_coherent(&pdev->dev, in sli_setup()
4671 sli4->vpd_data.size, in sli_setup()
4672 &sli4->vpd_data.phys, in sli_setup()
4674 if (!sli4->vpd_data.virt) { in sli_setup()
4675 memset(&sli4->vpd_data, 0, sizeof(struct efc_dma)); in sli_setup()
4682 return -EIO; in sli_setup()
4689 sli4->features = (SLI4_REQFEAT_IAAB | SLI4_REQFEAT_NPIV | in sli_setup()
4697 if (sli4->params.perf_hint) in sli_setup()
4698 sli4->features |= SLI4_REQFEAT_PERFH; in sli_setup()
4700 if (sli_request_features(sli4, &sli4->features, true)) in sli_setup()
4701 return -EIO; in sli_setup()
4704 return -EIO; in sli_setup()
4712 if (sli4->params.has_extents) { in sli_init()
4714 return -EIO; in sli_init()
4717 sli4->features &= (~SLI4_REQFEAT_HLM); in sli_init()
4718 sli4->features &= (~SLI4_REQFEAT_RXSEQ); in sli_init()
4719 sli4->features &= (~SLI4_REQFEAT_RXRI); in sli_init()
4721 if (sli_request_features(sli4, &sli4->features, false)) in sli_init()
4722 return -EIO; in sli_init()
4734 return -EIO; in sli_reset()
4737 kfree(sli4->ext[0].base); in sli_reset()
4738 sli4->ext[0].base = NULL; in sli_reset()
4741 bitmap_free(sli4->ext[i].use_map); in sli_reset()
4742 sli4->ext[i].use_map = NULL; in sli_reset()
4743 sli4->ext[i].base = NULL; in sli_reset()
4757 return -EIO; in sli_fw_reset()
4761 writel(SLI4_PHYDEV_CTRL_FRST, (sli4->reg[0] + SLI4_PHYDEV_CTRL_REG)); in sli_fw_reset()
4766 return -EIO; in sli_fw_reset()
4776 kfree(sli4->ext[0].base); in sli_teardown()
4777 sli4->ext[0].base = NULL; in sli_teardown()
4780 sli4->ext[i].base = NULL; in sli_teardown()
4782 bitmap_free(sli4->ext[i].use_map); in sli_teardown()
4783 sli4->ext[i].use_map = NULL; in sli_teardown()
4789 dma_free_coherent(&sli4->pci->dev, sli4->vpd_data.size, in sli_teardown()
4790 sli4->vpd_data.virt, sli4->vpd_data.phys); in sli_teardown()
4791 memset(&sli4->vpd_data, 0, sizeof(struct efc_dma)); in sli_teardown()
4793 dma_free_coherent(&sli4->pci->dev, sli4->bmbx.size, in sli_teardown()
4794 sli4->bmbx.virt, sli4->bmbx.phys); in sli_teardown()
4795 memset(&sli4->bmbx, 0, sizeof(struct efc_dma)); in sli_teardown()
4805 return -EIO; in sli_callback()
4810 sli4->link = func; in sli_callback()
4811 sli4->link_arg = arg; in sli_callback()
4815 return -EIO; in sli_callback()
4825 sli_cmd_common_modify_eq_delay(sli4, sli4->bmbx.virt, eq, num_eq, in sli_eq_modify_delay()
4830 return -EIO; in sli_eq_modify_delay()
4832 if (sli_res_sli_config(sli4, sli4->bmbx.virt)) { in sli_eq_modify_delay()
4834 return -EIO; in sli_eq_modify_delay()
4859 find_first_zero_bit(sli4->ext[rtype].use_map, in sli_resource_alloc()
4860 sli4->ext[rtype].map_size); in sli_resource_alloc()
4861 if (position >= sli4->ext[rtype].map_size) { in sli_resource_alloc()
4863 rtype, sli4->ext[rtype].n_alloc); in sli_resource_alloc()
4864 rc = -EIO; in sli_resource_alloc()
4867 set_bit(position, sli4->ext[rtype].use_map); in sli_resource_alloc()
4870 size = sli4->ext[rtype].size; in sli_resource_alloc()
4875 *rid = sli4->ext[rtype].base[ext_idx] + item_idx; in sli_resource_alloc()
4877 sli4->ext[rtype].n_alloc++; in sli_resource_alloc()
4880 rc = -EIO; in sli_resource_alloc()
4889 int rc = -EIO; in sli_resource_free()
4901 * extent->base <= resource ID < extent->base + extent->size in sli_resource_free()
4903 base = sli4->ext[rtype].base; in sli_resource_free()
4904 size = sli4->ext[rtype].size; in sli_resource_free()
4909 * free the resource. Prevent a NULL pointer access. in sli_resource_free()
4914 for (x = 0; x < sli4->ext[rtype].number; x++) { in sli_resource_free()
4918 rid -= base[x]; in sli_resource_free()
4919 clear_bit((x * size) + rid, sli4->ext[rtype].use_map); in sli_resource_free()
4934 int rc = -EIO; in sli_resource_reset()
4942 for (i = 0; i < sli4->ext[rtype].map_size; i++) in sli_resource_reset()
4943 clear_bit(i, sli4->ext[rtype].use_map); in sli_resource_reset()
4959 writel(val, (sli4->reg[0] + SLI4_PORT_CTRL_REG)); in sli_raise_ue()
4965 writel(val, (sli4->reg[0] + SLI4_PHYDEV_CTRL_REG)); in sli_raise_ue()
4982 bmbx_val = readl(sli4->reg[0] + SLI4_BMBX_REG); in sli_dump_is_ready()
5015 return -EIO; in sli_cmd_post_sgl_pages()
5023 sli_cmd_fill_hdr(&post->hdr, SLI4_OPC_POST_SGL_PAGES, SLI4_SUBSYSTEM_FC, in sli_cmd_post_sgl_pages()
5025 post->xri_start = cpu_to_le16(xri); in sli_cmd_post_sgl_pages()
5026 post->xri_count = cpu_to_le16(xri_count); in sli_cmd_post_sgl_pages()
5029 post->page_set[i].page0_low = in sli_cmd_post_sgl_pages()
5030 cpu_to_le32(lower_32_bits(page0[i]->phys)); in sli_cmd_post_sgl_pages()
5031 post->page_set[i].page0_high = in sli_cmd_post_sgl_pages()
5032 cpu_to_le32(upper_32_bits(page0[i]->phys)); in sli_cmd_post_sgl_pages()
5037 post->page_set[i].page1_low = in sli_cmd_post_sgl_pages()
5038 cpu_to_le32(lower_32_bits(page1[i]->phys)); in sli_cmd_post_sgl_pages()
5039 post->page_set[i].page1_high = in sli_cmd_post_sgl_pages()
5040 cpu_to_le32(upper_32_bits(page1[i]->phys)); in sli_cmd_post_sgl_pages()
5056 page_count = sli_page_count(dma->size, SLI_PAGE_SIZE); in sli_cmd_post_hdr_templates()
5059 (page_count * SZ_DMAADDR)) - sizeof(struct sli4_rqst_hdr)); in sli_cmd_post_hdr_templates()
5064 * command, it has to be non-embedded in sli_cmd_post_hdr_templates()
5066 payload_dma->size = payload_size; in sli_cmd_post_hdr_templates()
5067 payload_dma->virt = dma_alloc_coherent(&sli4->pci->dev, in sli_cmd_post_hdr_templates()
5068 payload_dma->size, in sli_cmd_post_hdr_templates()
5069 &payload_dma->phys, GFP_KERNEL); in sli_cmd_post_hdr_templates()
5070 if (!payload_dma->virt) { in sli_cmd_post_hdr_templates()
5073 return -EIO; in sli_cmd_post_hdr_templates()
5081 return -EIO; in sli_cmd_post_hdr_templates()
5084 rpi = sli4->ext[SLI4_RSRC_RPI].base[0]; in sli_cmd_post_hdr_templates()
5086 sli_cmd_fill_hdr(&req->hdr, SLI4_OPC_POST_HDR_TEMPLATES, in sli_cmd_post_hdr_templates()
5090 req->rpi_offset = cpu_to_le16(rpi); in sli_cmd_post_hdr_templates()
5091 req->page_count = cpu_to_le16(page_count); in sli_cmd_post_hdr_templates()
5092 phys = dma->phys; in sli_cmd_post_hdr_templates()
5094 req->page_descriptor[i].low = cpu_to_le32(lower_32_bits(phys)); in sli_cmd_post_hdr_templates()
5095 req->page_descriptor[i].high = cpu_to_le32(upper_32_bits(phys)); in sli_cmd_post_hdr_templates()
5109 if (sli4->params.hdr_template_req) in sli_fc_get_rpi_requirements()
5110 /* round up to a page */ in sli_fc_get_rpi_requirements()