366 struct efct_hw {  struct
372 	enum efct_hw_state	state;  argument
378 	struct efct_hw_config	config;  argument
381 	u32			num_qentries[SLI4_QTYPE_MAX];
384 	struct sli4_queue	wq[EFCT_HW_MAX_NUM_WQ];
385 	struct sli4_queue	rq[EFCT_HW_MAX_NUM_RQ];
386 	u16			hw_rq_lookup[EFCT_HW_MAX_NUM_RQ];
387 	struct sli4_queue	mq[EFCT_HW_MAX_NUM_MQ];
388 	struct sli4_queue	cq[EFCT_HW_MAX_NUM_CQ];
389 	struct sli4_queue	eq[EFCT_HW_MAX_NUM_EQ];
392 	u32			eq_count;
393 	u32			cq_count;
394 	u32			mq_count;
395 	u32			wq_count;
396 	u32			rq_count;
397 	u32			cmd_head_count;
398 	struct list_head	eq_list;
400 	struct efct_queue_hash	cq_hash[EFCT_HW_Q_HASH_SIZE];
401 	struct efct_queue_hash	rq_hash[EFCT_HW_Q_HASH_SIZE];
402 	struct efct_queue_hash	wq_hash[EFCT_HW_Q_HASH_SIZE];
405 	struct hw_wq		*hw_wq[EFCT_HW_MAX_NUM_WQ];
406 	struct hw_rq		*hw_rq[EFCT_HW_MAX_NUM_RQ];
407 	struct hw_mq		*hw_mq[EFCT_HW_MAX_NUM_MQ];
431 	struct efct_hw_io	**io;  argument
433 	u8			*wqe_buffs;
436 	spinlock_t		io_lock;
461 enum efct_hw_io_count_type {  argument
475 	struct efct_hw		*hw;  argument