Lines Matching +full:64 +full:ma
43 * 64-bit BAR0/BAR1 ... We use the hardware backdoor mechanism to in csio_t5_set_mem_win()
56 * back MA register to ensure that changes propagate before we attempt in csio_t5_set_mem_win()
101 { MAGRPPERR_F, "PCI MA group FIFO parity error", -1, 1 }, in csio_t5_pcie_intr_handler()
138 * @data: 64 bytes of data containing the requested address
139 * @ecc: where to store the corresponding 64-bit ECC word
141 * Read 64 bytes of data from MC starting at a 64-byte-aligned address
143 * is assigned the 64-bit ECC word for the read data.
161 csio_wr_reg32(hw, 64, mc_bist_cmd_len_reg); in csio_t5_mc_read()
185 * @data: 64 bytes of data containing the requested address
186 * @ecc: where to store the corresponding 64-bit ECC word
188 * Read 64 bytes of data from EDC starting at a 64-byte-aligned address
190 * is assigned the 64-bit ECC word for the read data.
216 csio_wr_reg32(hw, 64, edc_bist_cmd_len_reg); in csio_t5_edc_read()