Lines Matching refs:byte
60 * use byte 27 of the SCB as a pseudo-next pointer and to thread a list
412 * message byte we receive so it can be checked prior to
413 * driving REQ on the bus for the next byte.
420 /* Wait for the byte */
573 * the first byte.
623 /* Set the valid byte */
631 /* Set the valid byte */
633 mvi DFWADDR, 3; /* Third 64bit word or byte 24 */
677 mov NONE, SCSIDATL; /* Ack the last byte */
854 * flag in the highest byte of the data count. We cannot
859 /* The lowest address byte must be loaded last. */
989 * store the bottom byte of the next S/G pointer in
1076 * Here we fixup the HSHADDR stored in the high byte
1228 * The lowest address byte must be loaded
1288 * Clear the high address byte so that all other DMA
1404 * The data fifo seems to require 4 byte aligned
1464 * Status phase. Wait for the data byte to appear, then read it
1478 * control byte. This will cause us to interrupt the host and allow
1491 * Otherwise, treat MSG_OUT as a 1 byte message to send (abort, abort tag,
1555 mvi ACCUM call inb_first; /* read the 1st message byte */
1583 /* Pull the residue byte */
1604 * is a residual or the status byte is something other than STATUS_GOOD (0).
1606 * process this information. In the case of a non zero status byte, we
1617 * Perhaps there was a parity error on this last message byte.
1701 * Perhaps there was a parity error on this last message byte
1963 * latched (the usual way), then read the data byte directly off the bus
1965 * acknowledge the byte, then we do a dummy read from SCISDATL. The SCSI
1966 * spec guarantees that the target will hold the data byte on the bus until
1991 mov DINDIR,SCSIBUSL ret; /*read byte directly from bus*/
2026 * Send a byte to an initiator in Automatic PIO mode.
2078 * Prepare the hardware to post a byte to host memory given an
2153 * an array of 32byte objects, SINDEX contains
2166 * an array of 64byte objects, SINDEX contains
2177 * index into an array of 1byte objects, SINDEX contains
2259 * module has an 8 byte input latch that only