Lines Matching +full:trickle +full:- +full:resistor +full:- +full:ohms
1 // SPDX-License-Identifier: GPL-2.0-only
3 * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips.
23 #include <linux/hwmon-sysfs.h>
24 #include <linux/clk-provider.h>
29 * We can't determine type by probing, but if we expect pre-Linux code
31 * setting the date and time), Linux can ignore the non-clock features.
56 #define DS1307_REG_SECS 0x00 /* 00-59 */
60 #define DS1307_REG_MIN 0x01 /* 00-59 */
62 #define DS1307_REG_HOUR 0x02 /* 00-23, or 1-12{am,pm} */
67 #define DS1307_REG_WDAY 0x03 /* 01-07 */
69 #define DS1307_REG_MDAY 0x04 /* 01-31 */
70 #define DS1307_REG_MONTH 0x05 /* 01-12 */
72 #define DS1307_REG_YEAR 0x06 /* 00-99 */
75 * Other registers (control, status, alarms, trickle charge, NVRAM, etc)
163 /* negative offset step is -2.034ppm */
168 #define M41TXX_MIN_OFFSET ((-31) * M41TXX_NEG_OFFSET_STEP_PPB)
196 /* Does the RTC require trickle-resistor-ohms to select the value of
197 * the resistor between Vcc and Vbackup?
213 const struct chip_desc *chip = &chips[ds1307->type]; in ds1307_get_time()
216 if (ds1307->type == rx_8130) { in ds1307_get_time()
218 ret = regmap_read(ds1307->regmap, RX8130_REG_FLAG, ®flag); in ds1307_get_time()
226 return -EINVAL; in ds1307_get_time()
231 ret = regmap_bulk_read(ds1307->regmap, chip->offset, regs, in ds1307_get_time()
241 if (ds1307->type == m41t0 && in ds1307_get_time()
244 return -EINVAL; in ds1307_get_time()
248 switch (ds1307->type) { in ds1307_get_time()
254 return -EINVAL; in ds1307_get_time()
259 return -EINVAL; in ds1307_get_time()
261 ret = regmap_read(ds1307->regmap, DS1307_REG_CONTROL, &tmp); in ds1307_get_time()
265 return -EINVAL; in ds1307_get_time()
269 return -EINVAL; in ds1307_get_time()
271 ret = regmap_read(ds1307->regmap, DS1340_REG_FLAG, &tmp); in ds1307_get_time()
275 return -EINVAL; in ds1307_get_time()
278 ret = regmap_read(ds1307->regmap, DS1388_REG_FLAG, &tmp); in ds1307_get_time()
282 return -EINVAL; in ds1307_get_time()
286 return -EINVAL; in ds1307_get_time()
293 t->tm_sec = bcd2bin(regs[DS1307_REG_SECS] & 0x7f); in ds1307_get_time()
294 t->tm_min = bcd2bin(regs[DS1307_REG_MIN] & 0x7f); in ds1307_get_time()
296 t->tm_hour = bcd2bin(tmp); in ds1307_get_time()
298 if (ds1307->type == rx_8130) in ds1307_get_time()
299 t->tm_wday = fls(regs[DS1307_REG_WDAY] & 0x7f); in ds1307_get_time()
301 t->tm_wday = bcd2bin(regs[DS1307_REG_WDAY] & 0x07) - 1; in ds1307_get_time()
302 t->tm_mday = bcd2bin(regs[DS1307_REG_MDAY] & 0x3f); in ds1307_get_time()
304 t->tm_mon = bcd2bin(tmp) - 1; in ds1307_get_time()
305 t->tm_year = bcd2bin(regs[DS1307_REG_YEAR]) + 100; in ds1307_get_time()
307 if (regs[chip->century_reg] & chip->century_bit && in ds1307_get_time()
309 t->tm_year += 100; in ds1307_get_time()
313 "read", t->tm_sec, t->tm_min, in ds1307_get_time()
314 t->tm_hour, t->tm_mday, in ds1307_get_time()
315 t->tm_mon, t->tm_year, t->tm_wday); in ds1307_get_time()
323 const struct chip_desc *chip = &chips[ds1307->type]; in ds1307_set_time()
330 "write", t->tm_sec, t->tm_min, in ds1307_set_time()
331 t->tm_hour, t->tm_mday, in ds1307_set_time()
332 t->tm_mon, t->tm_year, t->tm_wday); in ds1307_set_time()
334 if (t->tm_year < 100) in ds1307_set_time()
335 return -EINVAL; in ds1307_set_time()
338 if (t->tm_year > (chip->century_bit ? 299 : 199)) in ds1307_set_time()
339 return -EINVAL; in ds1307_set_time()
341 if (t->tm_year > 199) in ds1307_set_time()
342 return -EINVAL; in ds1307_set_time()
345 regs[DS1307_REG_SECS] = bin2bcd(t->tm_sec); in ds1307_set_time()
346 regs[DS1307_REG_MIN] = bin2bcd(t->tm_min); in ds1307_set_time()
347 regs[DS1307_REG_HOUR] = bin2bcd(t->tm_hour); in ds1307_set_time()
349 if (ds1307->type == rx_8130) in ds1307_set_time()
350 regs[DS1307_REG_WDAY] = 1 << t->tm_wday; in ds1307_set_time()
352 regs[DS1307_REG_WDAY] = bin2bcd(t->tm_wday + 1); in ds1307_set_time()
353 regs[DS1307_REG_MDAY] = bin2bcd(t->tm_mday); in ds1307_set_time()
354 regs[DS1307_REG_MONTH] = bin2bcd(t->tm_mon + 1); in ds1307_set_time()
357 tmp = t->tm_year - 100; in ds1307_set_time()
360 if (chip->century_enable_bit) in ds1307_set_time()
361 regs[chip->century_reg] |= chip->century_enable_bit; in ds1307_set_time()
362 if (t->tm_year > 199 && chip->century_bit) in ds1307_set_time()
363 regs[chip->century_reg] |= chip->century_bit; in ds1307_set_time()
365 switch (ds1307->type) { in ds1307_set_time()
368 regmap_update_bits(ds1307->regmap, DS1307_REG_CONTROL, in ds1307_set_time()
372 regmap_update_bits(ds1307->regmap, DS1340_REG_FLAG, in ds1307_set_time()
376 regmap_update_bits(ds1307->regmap, DS1388_REG_FLAG, in ds1307_set_time()
394 result = regmap_bulk_write(ds1307->regmap, chip->offset, regs, in ds1307_set_time()
401 if (ds1307->type == rx_8130) { in ds1307_set_time()
403 result = regmap_write(ds1307->regmap, RX8130_REG_FLAG, in ds1307_set_time()
421 ret = regmap_bulk_read(ds1307->regmap, DS1339_REG_ALARM1_SECS, in ds1337_read_alarm()
432 * report alarm time (ALARM1); assume 24 hour and day-of-month modes, in ds1337_read_alarm()
435 t->time.tm_sec = bcd2bin(regs[0] & 0x7f); in ds1337_read_alarm()
436 t->time.tm_min = bcd2bin(regs[1] & 0x7f); in ds1337_read_alarm()
437 t->time.tm_hour = bcd2bin(regs[2] & 0x3f); in ds1337_read_alarm()
438 t->time.tm_mday = bcd2bin(regs[3] & 0x3f); in ds1337_read_alarm()
441 t->enabled = !!(regs[7] & DS1337_BIT_A1IE); in ds1337_read_alarm()
442 t->pending = !!(regs[8] & DS1337_BIT_A1I); in ds1337_read_alarm()
446 "alarm read", t->time.tm_sec, t->time.tm_min, in ds1337_read_alarm()
447 t->time.tm_hour, t->time.tm_mday, in ds1337_read_alarm()
448 t->enabled, t->pending); in ds1337_read_alarm()
462 "alarm set", t->time.tm_sec, t->time.tm_min, in ds1337_set_alarm()
463 t->time.tm_hour, t->time.tm_mday, in ds1337_set_alarm()
464 t->enabled, t->pending); in ds1337_set_alarm()
467 ret = regmap_bulk_read(ds1307->regmap, DS1339_REG_ALARM1_SECS, regs, in ds1337_set_alarm()
479 /* set ALARM1, using 24 hour and day-of-month modes */ in ds1337_set_alarm()
480 regs[0] = bin2bcd(t->time.tm_sec); in ds1337_set_alarm()
481 regs[1] = bin2bcd(t->time.tm_min); in ds1337_set_alarm()
482 regs[2] = bin2bcd(t->time.tm_hour); in ds1337_set_alarm()
483 regs[3] = bin2bcd(t->time.tm_mday); in ds1337_set_alarm()
485 /* set ALARM2 to non-garbage */ in ds1337_set_alarm()
494 ret = regmap_bulk_write(ds1307->regmap, DS1339_REG_ALARM1_SECS, regs, in ds1337_set_alarm()
502 if (t->enabled) { in ds1337_set_alarm()
505 regmap_write(ds1307->regmap, DS1337_REG_CONTROL, regs[7]); in ds1337_set_alarm()
515 return regmap_update_bits(ds1307->regmap, DS1337_REG_CONTROL, in ds1307_alarm_irq_enable()
520 static u8 do_trickle_setup_ds1339(struct ds1307 *ds1307, u32 ohms, bool diode) in do_trickle_setup_ds1339() argument
527 switch (ohms) { in do_trickle_setup_ds1339()
538 dev_warn(ds1307->dev, in do_trickle_setup_ds1339()
539 "Unsupported ohm value %u in dt\n", ohms); in do_trickle_setup_ds1339()
545 static u8 do_trickle_setup_rx8130(struct ds1307 *ds1307, u32 ohms, bool diode) in do_trickle_setup_rx8130() argument
561 rtc_lock(ds1307->rtc); in rx8130_irq()
564 ret = regmap_bulk_read(ds1307->regmap, RX8130_REG_EXTENSION, ctl, in rx8130_irq()
573 ret = regmap_bulk_write(ds1307->regmap, RX8130_REG_EXTENSION, ctl, in rx8130_irq()
578 rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF); in rx8130_irq()
581 rtc_unlock(ds1307->rtc); in rx8130_irq()
593 ret = regmap_bulk_read(ds1307->regmap, RX8130_REG_ALARM_MIN, ald, in rx8130_read_alarm()
599 ret = regmap_bulk_read(ds1307->regmap, RX8130_REG_EXTENSION, ctl, in rx8130_read_alarm()
604 t->enabled = !!(ctl[2] & RX8130_REG_CONTROL0_AIE); in rx8130_read_alarm()
605 t->pending = !!(ctl[1] & RX8130_REG_FLAG_AF); in rx8130_read_alarm()
607 /* Report alarm 0 time assuming 24-hour and day-of-month modes. */ in rx8130_read_alarm()
608 t->time.tm_sec = -1; in rx8130_read_alarm()
609 t->time.tm_min = bcd2bin(ald[0] & 0x7f); in rx8130_read_alarm()
610 t->time.tm_hour = bcd2bin(ald[1] & 0x7f); in rx8130_read_alarm()
611 t->time.tm_wday = -1; in rx8130_read_alarm()
612 t->time.tm_mday = bcd2bin(ald[2] & 0x7f); in rx8130_read_alarm()
613 t->time.tm_mon = -1; in rx8130_read_alarm()
614 t->time.tm_year = -1; in rx8130_read_alarm()
615 t->time.tm_yday = -1; in rx8130_read_alarm()
616 t->time.tm_isdst = -1; in rx8130_read_alarm()
619 __func__, t->time.tm_sec, t->time.tm_min, t->time.tm_hour, in rx8130_read_alarm()
620 t->time.tm_wday, t->time.tm_mday, t->time.tm_mon, t->enabled); in rx8130_read_alarm()
633 t->time.tm_sec, t->time.tm_min, t->time.tm_hour, in rx8130_set_alarm()
634 t->time.tm_wday, t->time.tm_mday, t->time.tm_mon, in rx8130_set_alarm()
635 t->enabled, t->pending); in rx8130_set_alarm()
638 ret = regmap_bulk_read(ds1307->regmap, RX8130_REG_EXTENSION, ctl, in rx8130_set_alarm()
647 ret = regmap_bulk_write(ds1307->regmap, RX8130_REG_EXTENSION, ctl, in rx8130_set_alarm()
653 ald[0] = bin2bcd(t->time.tm_min); in rx8130_set_alarm()
654 ald[1] = bin2bcd(t->time.tm_hour); in rx8130_set_alarm()
655 ald[2] = bin2bcd(t->time.tm_mday); in rx8130_set_alarm()
657 ret = regmap_bulk_write(ds1307->regmap, RX8130_REG_ALARM_MIN, ald, in rx8130_set_alarm()
662 if (!t->enabled) in rx8130_set_alarm()
667 return regmap_write(ds1307->regmap, RX8130_REG_CONTROL0, ctl[2]); in rx8130_set_alarm()
675 ret = regmap_read(ds1307->regmap, RX8130_REG_CONTROL0, ®); in rx8130_alarm_irq_enable()
684 return regmap_write(ds1307->regmap, RX8130_REG_CONTROL0, reg); in rx8130_alarm_irq_enable()
690 struct mutex *lock = &ds1307->rtc->ops_lock; in mcp794xx_irq()
696 ret = regmap_read(ds1307->regmap, MCP794XX_REG_ALARM0_CTRL, ®); in mcp794xx_irq()
702 ret = regmap_write(ds1307->regmap, MCP794XX_REG_ALARM0_CTRL, reg); in mcp794xx_irq()
707 ret = regmap_update_bits(ds1307->regmap, MCP794XX_REG_CONTROL, in mcp794xx_irq()
712 rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF); in mcp794xx_irq()
727 ret = regmap_bulk_read(ds1307->regmap, MCP794XX_REG_CONTROL, regs, in mcp794xx_read_alarm()
732 t->enabled = !!(regs[0] & MCP794XX_BIT_ALM0_EN); in mcp794xx_read_alarm()
734 /* Report alarm 0 time assuming 24-hour and day-of-month modes. */ in mcp794xx_read_alarm()
735 t->time.tm_sec = bcd2bin(regs[3] & 0x7f); in mcp794xx_read_alarm()
736 t->time.tm_min = bcd2bin(regs[4] & 0x7f); in mcp794xx_read_alarm()
737 t->time.tm_hour = bcd2bin(regs[5] & 0x3f); in mcp794xx_read_alarm()
738 t->time.tm_wday = bcd2bin(regs[6] & 0x7) - 1; in mcp794xx_read_alarm()
739 t->time.tm_mday = bcd2bin(regs[7] & 0x3f); in mcp794xx_read_alarm()
740 t->time.tm_mon = bcd2bin(regs[8] & 0x1f) - 1; in mcp794xx_read_alarm()
741 t->time.tm_year = -1; in mcp794xx_read_alarm()
742 t->time.tm_yday = -1; in mcp794xx_read_alarm()
743 t->time.tm_isdst = -1; in mcp794xx_read_alarm()
747 t->time.tm_sec, t->time.tm_min, t->time.tm_hour, in mcp794xx_read_alarm()
748 t->time.tm_wday, t->time.tm_mday, t->time.tm_mon, t->enabled, in mcp794xx_read_alarm()
772 return (tm_now.tm_wday + days_alarm - days_now) % 7 + 1; in mcp794xx_alm_weekday()
781 wday = mcp794xx_alm_weekday(dev, &t->time); in mcp794xx_set_alarm()
787 t->time.tm_sec, t->time.tm_min, t->time.tm_hour, in mcp794xx_set_alarm()
788 t->time.tm_wday, t->time.tm_mday, t->time.tm_mon, in mcp794xx_set_alarm()
789 t->enabled, t->pending); in mcp794xx_set_alarm()
792 ret = regmap_bulk_read(ds1307->regmap, MCP794XX_REG_CONTROL, regs, in mcp794xx_set_alarm()
797 /* Set alarm 0, using 24-hour and day-of-month modes. */ in mcp794xx_set_alarm()
798 regs[3] = bin2bcd(t->time.tm_sec); in mcp794xx_set_alarm()
799 regs[4] = bin2bcd(t->time.tm_min); in mcp794xx_set_alarm()
800 regs[5] = bin2bcd(t->time.tm_hour); in mcp794xx_set_alarm()
802 regs[7] = bin2bcd(t->time.tm_mday); in mcp794xx_set_alarm()
803 regs[8] = bin2bcd(t->time.tm_mon + 1); in mcp794xx_set_alarm()
812 ret = regmap_bulk_write(ds1307->regmap, MCP794XX_REG_CONTROL, regs, in mcp794xx_set_alarm()
817 if (!t->enabled) in mcp794xx_set_alarm()
820 return regmap_write(ds1307->regmap, MCP794XX_REG_CONTROL, regs[0]); in mcp794xx_set_alarm()
827 return regmap_update_bits(ds1307->regmap, MCP794XX_REG_CONTROL, in mcp794xx_alarm_irq_enable()
838 regmap_read(ds1307->regmap, M41TXX_REG_CONTROL, &ctrl_reg); in m41txx_rtc_read_offset()
846 *offset = -(val * M41TXX_NEG_OFFSET_STEP_PPB); in m41txx_rtc_read_offset()
857 return -ERANGE; in m41txx_rtc_set_offset()
868 return regmap_update_bits(ds1307->regmap, M41TXX_REG_CONTROL, in m41txx_rtc_set_offset()
880 ret = regmap_update_bits(ds1307->regmap, DS1388_REG_FLAG, in ds1388_wdt_start()
885 ret = regmap_update_bits(ds1307->regmap, DS1388_REG_CONTROL, in ds1388_wdt_start()
895 regs[1] = bin2bcd(wdt_dev->timeout); in ds1388_wdt_start()
897 ret = regmap_bulk_write(ds1307->regmap, DS1388_REG_WDOG_HUN_SECS, regs, in ds1388_wdt_start()
902 return regmap_update_bits(ds1307->regmap, DS1388_REG_CONTROL, in ds1388_wdt_start()
911 return regmap_update_bits(ds1307->regmap, DS1388_REG_CONTROL, in ds1388_wdt_stop()
920 return regmap_bulk_read(ds1307->regmap, DS1388_REG_WDOG_HUN_SECS, regs, in ds1388_wdt_ping()
930 wdt_dev->timeout = val; in ds1388_wdt_set_timeout()
932 regs[1] = bin2bcd(wdt_dev->timeout); in ds1388_wdt_set_timeout()
934 return regmap_bulk_write(ds1307->regmap, DS1388_REG_WDOG_HUN_SECS, regs, in ds1388_wdt_set_timeout()
1157 struct mutex *lock = &ds1307->rtc->ops_lock; in ds1307_irq()
1161 ret = regmap_read(ds1307->regmap, DS1337_REG_STATUS, &stat); in ds1307_irq()
1167 regmap_write(ds1307->regmap, DS1337_REG_STATUS, stat); in ds1307_irq()
1169 ret = regmap_update_bits(ds1307->regmap, DS1337_REG_CONTROL, in ds1307_irq()
1174 rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF); in ds1307_irq()
1183 /*----------------------------------------------------------------------*/
1197 struct ds1307 *ds1307 = dev_get_drvdata(dev->parent); in frequency_test_store()
1207 regmap_update_bits(ds1307->regmap, M41TXX_REG_CONTROL, M41TXX_BIT_FT, in frequency_test_store()
1217 struct ds1307 *ds1307 = dev_get_drvdata(dev->parent); in frequency_test_show()
1220 regmap_read(ds1307->regmap, M41TXX_REG_CONTROL, &ctrl_reg); in frequency_test_show()
1240 switch (ds1307->type) { in ds1307_add_frequency_test()
1244 err = rtc_add_group(ds1307->rtc, &rtc_freq_test_attr_group); in ds1307_add_frequency_test()
1255 /*----------------------------------------------------------------------*/
1261 const struct chip_desc *chip = &chips[ds1307->type]; in ds1307_nvram_read()
1263 return regmap_bulk_read(ds1307->regmap, chip->nvram_offset + offset, in ds1307_nvram_read()
1271 const struct chip_desc *chip = &chips[ds1307->type]; in ds1307_nvram_write()
1273 return regmap_bulk_write(ds1307->regmap, chip->nvram_offset + offset, in ds1307_nvram_write()
1277 /*----------------------------------------------------------------------*/
1282 u32 ohms, chargeable; in ds1307_trickle_init() local
1283 bool diode = chip->charge_default; in ds1307_trickle_init()
1285 if (!chip->do_trickle_setup) in ds1307_trickle_init()
1288 if (device_property_read_u32(ds1307->dev, "trickle-resistor-ohms", in ds1307_trickle_init()
1289 &ohms) && chip->requires_trickle_resistor) in ds1307_trickle_init()
1292 /* aux-voltage-chargeable takes precedence over the deprecated in ds1307_trickle_init()
1293 * trickle-diode-disable in ds1307_trickle_init()
1295 if (!device_property_read_u32(ds1307->dev, "aux-voltage-chargeable", in ds1307_trickle_init()
1305 dev_warn(ds1307->dev, in ds1307_trickle_init()
1306 "unsupported aux-voltage-chargeable value\n"); in ds1307_trickle_init()
1309 } else if (device_property_read_bool(ds1307->dev, in ds1307_trickle_init()
1310 "trickle-diode-disable")) { in ds1307_trickle_init()
1314 return chip->do_trickle_setup(ds1307, ohms, diode); in ds1307_trickle_init()
1317 /*----------------------------------------------------------------------*/
1328 * A user-initiated temperature conversion is not started by this function,
1338 ret = regmap_bulk_read(ds1307->regmap, DS3231_REG_TEMPERATURE, in ds3231_hwmon_read_temp()
1343 * Temperature is represented as a 10-bit code with a resolution of in ds3231_hwmon_read_temp()
1378 if (ds1307->type != ds_3231) in ds1307_hwmon_register()
1381 dev = devm_hwmon_device_register_with_groups(ds1307->dev, ds1307->name, in ds1307_hwmon_register()
1385 dev_warn(ds1307->dev, "unable to register hwmon device %ld\n", in ds1307_hwmon_register()
1398 /*----------------------------------------------------------------------*/
1401 * Square-wave output support for DS3231
1425 struct mutex *lock = &ds1307->rtc->ops_lock; in ds1337_write_control()
1429 ret = regmap_update_bits(ds1307->regmap, DS1337_REG_CONTROL, in ds1337_write_control()
1443 ret = regmap_read(ds1307->regmap, DS1337_REG_CONTROL, &control); in ds3231_clk_sqw_recalc_rate()
1459 for (i = ARRAY_SIZE(ds3231_clk_sqw_rates) - 1; i >= 0; i--) { in ds3231_clk_sqw_round_rate()
1481 return -EINVAL; in ds3231_clk_sqw_set_rate()
1511 ret = regmap_read(ds1307->regmap, DS1337_REG_CONTROL, &control); in ds3231_clk_sqw_is_prepared()
1535 struct mutex *lock = &ds1307->rtc->ops_lock; in ds3231_clk_32khz_control()
1539 ret = regmap_update_bits(ds1307->regmap, DS1337_REG_STATUS, in ds3231_clk_32khz_control()
1566 ret = regmap_read(ds1307->regmap, DS1337_REG_STATUS, &status); in ds3231_clk_32khz_is_prepared()
1596 struct device_node *node = ds1307->dev->of_node; in ds3231_clks_register()
1600 onecell = devm_kzalloc(ds1307->dev, sizeof(*onecell), GFP_KERNEL); in ds3231_clks_register()
1602 return -ENOMEM; in ds3231_clks_register()
1604 onecell->clk_num = ARRAY_SIZE(ds3231_clks_init); in ds3231_clks_register()
1605 onecell->clks = devm_kcalloc(ds1307->dev, onecell->clk_num, in ds3231_clks_register()
1606 sizeof(onecell->clks[0]), GFP_KERNEL); in ds3231_clks_register()
1607 if (!onecell->clks) in ds3231_clks_register()
1608 return -ENOMEM; in ds3231_clks_register()
1611 device_property_read_string_array(ds1307->dev, "clock-output-names", in ds3231_clks_register()
1619 * Interrupt signal due to alarm conditions and square-wave in ds3231_clks_register()
1622 if (i == DS3231_CLK_SQW && test_bit(RTC_FEATURE_ALARM, ds1307->rtc->features)) in ds3231_clks_register()
1626 ds1307->clks[i].init = &init; in ds3231_clks_register()
1628 onecell->clks[i] = devm_clk_register(ds1307->dev, in ds3231_clks_register()
1629 &ds1307->clks[i]); in ds3231_clks_register()
1630 if (IS_ERR(onecell->clks[i])) in ds3231_clks_register()
1631 return PTR_ERR(onecell->clks[i]); in ds3231_clks_register()
1644 if (ds1307->type != ds_3231) in ds1307_clks_register()
1649 dev_warn(ds1307->dev, "unable to register clock device %d\n", in ds1307_clks_register()
1683 if (ds1307->type != ds_1388) in ds1307_wdt_register()
1686 wdt = devm_kzalloc(ds1307->dev, sizeof(*wdt), GFP_KERNEL); in ds1307_wdt_register()
1690 err = regmap_read(ds1307->regmap, DS1388_REG_FLAG, &val); in ds1307_wdt_register()
1692 wdt->bootstatus = WDIOF_CARDRESET; in ds1307_wdt_register()
1694 wdt->info = &ds1388_wdt_info; in ds1307_wdt_register()
1695 wdt->ops = &ds1388_wdt_ops; in ds1307_wdt_register()
1696 wdt->timeout = 99; in ds1307_wdt_register()
1697 wdt->max_timeout = 99; in ds1307_wdt_register()
1698 wdt->min_timeout = 1; in ds1307_wdt_register()
1700 watchdog_init_timeout(wdt, 0, ds1307->dev); in ds1307_wdt_register()
1702 devm_watchdog_register_device(ds1307->dev, wdt); in ds1307_wdt_register()
1720 int err = -ENODEV; in ds1307_probe()
1726 struct ds1307_platform_data *pdata = dev_get_platdata(&client->dev); in ds1307_probe()
1729 ds1307 = devm_kzalloc(&client->dev, sizeof(struct ds1307), GFP_KERNEL); in ds1307_probe()
1731 return -ENOMEM; in ds1307_probe()
1733 dev_set_drvdata(&client->dev, ds1307); in ds1307_probe()
1734 ds1307->dev = &client->dev; in ds1307_probe()
1735 ds1307->name = client->name; in ds1307_probe()
1737 ds1307->regmap = devm_regmap_init_i2c(client, ®map_config); in ds1307_probe()
1738 if (IS_ERR(ds1307->regmap)) { in ds1307_probe()
1739 dev_err(ds1307->dev, "regmap allocation failed\n"); in ds1307_probe()
1740 return PTR_ERR(ds1307->regmap); in ds1307_probe()
1745 match = device_get_match_data(&client->dev); in ds1307_probe()
1747 ds1307->type = (uintptr_t)match; in ds1307_probe()
1748 chip = &chips[ds1307->type]; in ds1307_probe()
1750 chip = &chips[id->driver_data]; in ds1307_probe()
1751 ds1307->type = id->driver_data; in ds1307_probe()
1753 return -ENODEV; in ds1307_probe()
1756 want_irq = client->irq > 0 && chip->alarm; in ds1307_probe()
1760 else if (pdata->trickle_charger_setup) in ds1307_probe()
1761 trickle_charger_setup = pdata->trickle_charger_setup; in ds1307_probe()
1763 if (trickle_charger_setup && chip->trickle_charger_reg) { in ds1307_probe()
1764 dev_dbg(ds1307->dev, in ds1307_probe()
1765 "writing trickle charger info 0x%x to 0x%x\n", in ds1307_probe()
1766 trickle_charger_setup, chip->trickle_charger_reg); in ds1307_probe()
1767 regmap_write(ds1307->regmap, chip->trickle_charger_reg, in ds1307_probe()
1774 * the device's .dts file using the "wakeup-source" boolean property. in ds1307_probe()
1775 * If the "wakeup-source" property is set, don't request an IRQ. in ds1307_probe()
1779 if (chip->alarm && device_property_read_bool(&client->dev, "wakeup-source")) in ds1307_probe()
1782 switch (ds1307->type) { in ds1307_probe()
1788 err = regmap_bulk_read(ds1307->regmap, DS1337_REG_CONTROL, in ds1307_probe()
1791 dev_dbg(ds1307->dev, "read error %d\n", err); in ds1307_probe()
1800 * Using IRQ or defined as wakeup-source? in ds1307_probe()
1806 regs[0] |= DS1337_BIT_INTCN | chip->bbsqi_bit; in ds1307_probe()
1810 regmap_write(ds1307->regmap, DS1337_REG_CONTROL, in ds1307_probe()
1815 regmap_write(ds1307->regmap, DS1337_REG_STATUS, in ds1307_probe()
1817 dev_warn(ds1307->dev, "SET TIME!\n"); in ds1307_probe()
1822 err = regmap_bulk_read(ds1307->regmap, in ds1307_probe()
1825 dev_dbg(ds1307->dev, "read error %d\n", err); in ds1307_probe()
1832 regmap_write(ds1307->regmap, in ds1307_probe()
1835 dev_warn(ds1307->dev, in ds1307_probe()
1836 "oscillator stop detected - SET TIME!\n"); in ds1307_probe()
1841 regmap_write(ds1307->regmap, in ds1307_probe()
1844 dev_warn(ds1307->dev, "power-on detected\n"); in ds1307_probe()
1849 regmap_write(ds1307->regmap, in ds1307_probe()
1852 dev_warn(ds1307->dev, "voltage drop detected\n"); in ds1307_probe()
1860 regmap_write(ds1307->regmap, in ds1307_probe()
1864 err = regmap_bulk_read(ds1307->regmap, in ds1307_probe()
1868 dev_dbg(ds1307->dev, "read error %d\n", err); in ds1307_probe()
1879 regmap_write(ds1307->regmap, in ds1307_probe()
1884 err = regmap_read(ds1307->regmap, DS1388_REG_CONTROL, &tmp); in ds1307_probe()
1886 dev_dbg(ds1307->dev, "read error %d\n", err); in ds1307_probe()
1893 regmap_write(ds1307->regmap, DS1388_REG_CONTROL, tmp); in ds1307_probe()
1901 err = regmap_bulk_read(ds1307->regmap, chip->offset, regs, in ds1307_probe()
1904 dev_dbg(ds1307->dev, "read error %d\n", err); in ds1307_probe()
1908 if (ds1307->type == mcp794xx && in ds1307_probe()
1910 regmap_write(ds1307->regmap, DS1307_REG_WDAY, in ds1307_probe()
1916 switch (ds1307->type) { in ds1307_probe()
1933 * Be sure we're in 24 hour mode. Multi-master systems in ds1307_probe()
1941 regmap_write(ds1307->regmap, chip->offset + DS1307_REG_HOUR, in ds1307_probe()
1945 ds1307->rtc = devm_rtc_allocate_device(ds1307->dev); in ds1307_probe()
1946 if (IS_ERR(ds1307->rtc)) in ds1307_probe()
1947 return PTR_ERR(ds1307->rtc); in ds1307_probe()
1950 device_set_wakeup_capable(ds1307->dev, true); in ds1307_probe()
1952 clear_bit(RTC_FEATURE_ALARM, ds1307->rtc->features); in ds1307_probe()
1955 dev_info(ds1307->dev, in ds1307_probe()
1956 "'wakeup-source' is set, request for an IRQ is disabled!\n"); in ds1307_probe()
1958 clear_bit(RTC_FEATURE_UPDATE_INTERRUPT, ds1307->rtc->features); in ds1307_probe()
1962 err = devm_request_threaded_irq(ds1307->dev, client->irq, NULL, in ds1307_probe()
1963 chip->irq_handler ?: ds1307_irq, in ds1307_probe()
1965 ds1307->name, ds1307); in ds1307_probe()
1967 client->irq = 0; in ds1307_probe()
1968 device_set_wakeup_capable(ds1307->dev, false); in ds1307_probe()
1969 clear_bit(RTC_FEATURE_ALARM, ds1307->rtc->features); in ds1307_probe()
1970 dev_err(ds1307->dev, "unable to request IRQ!\n"); in ds1307_probe()
1972 dev_dbg(ds1307->dev, "got IRQ %d\n", client->irq); in ds1307_probe()
1976 ds1307->rtc->ops = chip->rtc_ops ?: &ds13xx_rtc_ops; in ds1307_probe()
1981 err = devm_rtc_register_device(ds1307->rtc); in ds1307_probe()
1985 if (chip->nvram_size) { in ds1307_probe()
1990 .size = chip->nvram_size, in ds1307_probe()
1996 devm_rtc_nvmem_register(ds1307->rtc, &nvmem_cfg); in ds1307_probe()
2011 .name = "rtc-ds1307",