Lines Matching +full:clkdiv +full:- +full:-
1 // SPDX-License-Identifier: GPL-2.0
44 * struct pwm_mediatek_chip - struct representing PWM chip
82 ret = clk_prepare_enable(pc->clk_top); in pwm_mediatek_clk_enable()
86 ret = clk_prepare_enable(pc->clk_main); in pwm_mediatek_clk_enable()
90 ret = clk_prepare_enable(pc->clk_pwms[pwm->hwpwm]); in pwm_mediatek_clk_enable()
97 clk_disable_unprepare(pc->clk_main); in pwm_mediatek_clk_enable()
99 clk_disable_unprepare(pc->clk_top); in pwm_mediatek_clk_enable()
109 clk_disable_unprepare(pc->clk_pwms[pwm->hwpwm]); in pwm_mediatek_clk_disable()
110 clk_disable_unprepare(pc->clk_main); in pwm_mediatek_clk_disable()
111 clk_disable_unprepare(pc->clk_top); in pwm_mediatek_clk_disable()
118 writel(value, chip->regs + chip->soc->reg_offset[num] + offset); in pwm_mediatek_writel()
125 u32 clkdiv = 0, cnt_period, cnt_duty, reg_width = PWMDWIDTH, in pwm_mediatek_config() local
136 if (pc->soc->has_ck_26m_sel) in pwm_mediatek_config()
137 writel(0, pc->regs + PWM_CK_26M_SEL); in pwm_mediatek_config()
141 do_div(resolution, clk_get_rate(pc->clk_pwms[pwm->hwpwm])); in pwm_mediatek_config()
146 clkdiv++; in pwm_mediatek_config()
151 if (clkdiv > PWM_CLK_DIV_MAX) { in pwm_mediatek_config()
153 dev_err(chip->dev, "period of %d ns not supported\n", period_ns); in pwm_mediatek_config()
154 return -EINVAL; in pwm_mediatek_config()
157 if (pc->soc->pwm45_fixup && pwm->hwpwm > 2) { in pwm_mediatek_config()
167 pwm_mediatek_writel(pc, pwm->hwpwm, PWMCON, BIT(15) | clkdiv); in pwm_mediatek_config()
168 pwm_mediatek_writel(pc, pwm->hwpwm, reg_width, cnt_period); in pwm_mediatek_config()
169 pwm_mediatek_writel(pc, pwm->hwpwm, reg_thres, cnt_duty); in pwm_mediatek_config()
186 value = readl(pc->regs); in pwm_mediatek_enable()
187 value |= BIT(pwm->hwpwm); in pwm_mediatek_enable()
188 writel(value, pc->regs); in pwm_mediatek_enable()
198 value = readl(pc->regs); in pwm_mediatek_disable()
199 value &= ~BIT(pwm->hwpwm); in pwm_mediatek_disable()
200 writel(value, pc->regs); in pwm_mediatek_disable()
210 if (state->polarity != PWM_POLARITY_NORMAL) in pwm_mediatek_apply()
211 return -EINVAL; in pwm_mediatek_apply()
213 if (!state->enabled) { in pwm_mediatek_apply()
214 if (pwm->state.enabled) in pwm_mediatek_apply()
220 err = pwm_mediatek_config(pwm->chip, pwm, state->duty_cycle, state->period); in pwm_mediatek_apply()
224 if (!pwm->state.enabled) in pwm_mediatek_apply()
241 pc = devm_kzalloc(&pdev->dev, sizeof(*pc), GFP_KERNEL); in pwm_mediatek_probe()
243 return -ENOMEM; in pwm_mediatek_probe()
245 pc->soc = of_device_get_match_data(&pdev->dev); in pwm_mediatek_probe()
247 pc->regs = devm_platform_ioremap_resource(pdev, 0); in pwm_mediatek_probe()
248 if (IS_ERR(pc->regs)) in pwm_mediatek_probe()
249 return PTR_ERR(pc->regs); in pwm_mediatek_probe()
251 pc->clk_pwms = devm_kmalloc_array(&pdev->dev, pc->soc->num_pwms, in pwm_mediatek_probe()
252 sizeof(*pc->clk_pwms), GFP_KERNEL); in pwm_mediatek_probe()
253 if (!pc->clk_pwms) in pwm_mediatek_probe()
254 return -ENOMEM; in pwm_mediatek_probe()
256 pc->clk_top = devm_clk_get(&pdev->dev, "top"); in pwm_mediatek_probe()
257 if (IS_ERR(pc->clk_top)) in pwm_mediatek_probe()
258 return dev_err_probe(&pdev->dev, PTR_ERR(pc->clk_top), in pwm_mediatek_probe()
261 pc->clk_main = devm_clk_get(&pdev->dev, "main"); in pwm_mediatek_probe()
262 if (IS_ERR(pc->clk_main)) in pwm_mediatek_probe()
263 return dev_err_probe(&pdev->dev, PTR_ERR(pc->clk_main), in pwm_mediatek_probe()
266 for (i = 0; i < pc->soc->num_pwms; i++) { in pwm_mediatek_probe()
271 pc->clk_pwms[i] = devm_clk_get(&pdev->dev, name); in pwm_mediatek_probe()
272 if (IS_ERR(pc->clk_pwms[i])) in pwm_mediatek_probe()
273 return dev_err_probe(&pdev->dev, PTR_ERR(pc->clk_pwms[i]), in pwm_mediatek_probe()
277 pc->chip.dev = &pdev->dev; in pwm_mediatek_probe()
278 pc->chip.ops = &pwm_mediatek_ops; in pwm_mediatek_probe()
279 pc->chip.npwm = pc->soc->num_pwms; in pwm_mediatek_probe()
281 ret = devm_pwmchip_add(&pdev->dev, &pc->chip); in pwm_mediatek_probe()
283 return dev_err_probe(&pdev->dev, ret, "pwmchip_add() failed\n"); in pwm_mediatek_probe()
366 { .compatible = "mediatek,mt2712-pwm", .data = &mt2712_pwm_data },
367 { .compatible = "mediatek,mt6795-pwm", .data = &mt6795_pwm_data },
368 { .compatible = "mediatek,mt7622-pwm", .data = &mt7622_pwm_data },
369 { .compatible = "mediatek,mt7623-pwm", .data = &mt7623_pwm_data },
370 { .compatible = "mediatek,mt7628-pwm", .data = &mt7628_pwm_data },
371 { .compatible = "mediatek,mt7629-pwm", .data = &mt7629_pwm_data },
372 { .compatible = "mediatek,mt7981-pwm", .data = &mt7981_pwm_data },
373 { .compatible = "mediatek,mt7986-pwm", .data = &mt7986_pwm_data },
374 { .compatible = "mediatek,mt8183-pwm", .data = &mt8183_pwm_data },
375 { .compatible = "mediatek,mt8365-pwm", .data = &mt8365_pwm_data },
376 { .compatible = "mediatek,mt8516-pwm", .data = &mt8516_pwm_data },
383 .name = "pwm-mediatek",