1 // SPDX-License-Identifier: GPL-2.0
6  * - The hardware supports fixed period & configures only 2-wire mode.
7  * - Supports normal polarity. Does not support changing polarity.
8  * - When PWM is disabled, output of PWM will become 0(inactive). It doesn't
10  * - When duty cycle is changed, PWM output may be a mix of previous setting
13  * - It is a dedicated PWM fan controller. There are no other consumers for
17 #include <linux/clk.h>
36 #define LGM_PWM_MAX_RPM			(BIT(16) - 1)
38 #define LGM_PWM_MAX_DUTY_CYCLE		(BIT(8) - 1)
58 	struct regmap *regmap = pc->regmap;  in lgm_pwm_enable()
72 	if (state->polarity != PWM_POLARITY_NORMAL || state->period < pc->period)  in lgm_pwm_apply()
73 		return -EINVAL;  in lgm_pwm_apply()
75 	if (!state->enabled)  in lgm_pwm_apply()
78 	duty_cycle = min_t(u64, state->duty_cycle, pc->period);  in lgm_pwm_apply()
79 	val = duty_cycle * LGM_PWM_MAX_DUTY_CYCLE / pc->period;  in lgm_pwm_apply()
81 	ret = regmap_update_bits(pc->regmap, LGM_PWM_FAN_CON0, LGM_PWM_FAN_DC_MSK,  in lgm_pwm_apply()
95 	state->enabled = regmap_test_bits(pc->regmap, LGM_PWM_FAN_CON0,  in lgm_pwm_get_state()
97 	state->polarity = PWM_POLARITY_NORMAL;  in lgm_pwm_get_state()
98 	state->period = pc->period; /* fixed period */  in lgm_pwm_get_state()
100 	regmap_read(pc->regmap, LGM_PWM_FAN_CON0, &val);  in lgm_pwm_get_state()
102 	state->duty_cycle = DIV_ROUND_UP(duty * pc->period, LGM_PWM_MAX_DUTY_CYCLE);  in lgm_pwm_get_state()
115 	struct regmap *regmap = pc->regmap;  in lgm_pwm_init()
119 	pc->period = LGM_PWM_PERIOD_2WIRE_NS;  in lgm_pwm_init()
134 	struct clk *clk = data;  in lgm_clk_release()  local
136 	clk_disable_unprepare(clk);  in lgm_clk_release()
139 static int lgm_clk_enable(struct device *dev, struct clk *clk)  in lgm_clk_enable()  argument
143 	ret = clk_prepare_enable(clk);  in lgm_clk_enable()
147 	return devm_add_action_or_reset(dev, lgm_clk_release, clk);  in lgm_clk_enable()
170 	struct device *dev = &pdev->dev;  in lgm_pwm_probe()
174 	struct clk *clk;  in lgm_pwm_probe()  local
179 		return -ENOMEM;  in lgm_pwm_probe()
185 	pc->regmap = devm_regmap_init_mmio(dev, io_base, &lgm_pwm_regmap_config);  in lgm_pwm_probe()
186 	if (IS_ERR(pc->regmap))  in lgm_pwm_probe()
187 		return dev_err_probe(dev, PTR_ERR(pc->regmap),  in lgm_pwm_probe()
190 	clk = devm_clk_get(dev, NULL);  in lgm_pwm_probe()
191 	if (IS_ERR(clk))  in lgm_pwm_probe()
192 		return dev_err_probe(dev, PTR_ERR(clk), "failed to get clock\n");  in lgm_pwm_probe()
194 	ret = lgm_clk_enable(dev, clk);  in lgm_pwm_probe()
207 	pc->chip.dev = dev;  in lgm_pwm_probe()
208 	pc->chip.ops = &lgm_pwm_ops;  in lgm_pwm_probe()
209 	pc->chip.npwm = 1;  in lgm_pwm_probe()
213 	ret = devm_pwmchip_add(dev, &pc->chip);  in lgm_pwm_probe()
221 	{ .compatible = "intel,lgm-pwm" },
228 		.name = "intel-pwm",