drivers/pwm/pwm-imx27.c

99 static int pwm_imx27_clk_prepare_enable(struct pwm_imx27_chip *imx)  in pwm_imx27_clk_prepare_enable()  argument
103 	ret = clk_prepare_enable(imx->clk_ipg);  in pwm_imx27_clk_prepare_enable()
107 	ret = clk_prepare_enable(imx->clk_per);  in pwm_imx27_clk_prepare_enable()
109 		clk_disable_unprepare(imx->clk_ipg);  in pwm_imx27_clk_prepare_enable()
116 static void pwm_imx27_clk_disable_unprepare(struct pwm_imx27_chip *imx)  in pwm_imx27_clk_disable_unprepare()  argument
118 	clk_disable_unprepare(imx->clk_per);  in pwm_imx27_clk_disable_unprepare()
119 	clk_disable_unprepare(imx->clk_ipg);  in pwm_imx27_clk_disable_unprepare()
125 	struct pwm_imx27_chip *imx = to_pwm_imx27_chip(chip);  in pwm_imx27_get_state()  local
130 	ret = pwm_imx27_clk_prepare_enable(imx);  in pwm_imx27_get_state()
134 	val = readl(imx->mmio_base + MX3_PWMCR);  in pwm_imx27_get_state()
153 	pwm_clk = clk_get_rate(imx->clk_per);  in pwm_imx27_get_state()
154 	val = readl(imx->mmio_base + MX3_PWMPR);  in pwm_imx27_get_state()
166 		val = readl(imx->mmio_base + MX3_PWMSAR);  in pwm_imx27_get_state()
168 		val = imx->duty_cycle;  in pwm_imx27_get_state()
173 	pwm_imx27_clk_disable_unprepare(imx);  in pwm_imx27_get_state()
180 	struct pwm_imx27_chip *imx = to_pwm_imx27_chip(chip);  in pwm_imx27_sw_reset()  local
185 	writel(MX3_PWMCR_SWR, imx->mmio_base + MX3_PWMCR);  in pwm_imx27_sw_reset()
188 		cr = readl(imx->mmio_base + MX3_PWMCR);  in pwm_imx27_sw_reset()
199 	struct pwm_imx27_chip *imx = to_pwm_imx27_chip(chip);  in pwm_imx27_wait_fifo_slot()  local
205 	sr = readl(imx->mmio_base + MX3_PWMSR);  in pwm_imx27_wait_fifo_slot()
212 		sr = readl(imx->mmio_base + MX3_PWMSR);  in pwm_imx27_wait_fifo_slot()
222 	struct pwm_imx27_chip *imx = to_pwm_imx27_chip(chip);  in pwm_imx27_apply()  local
233 	clkrate = clk_get_rate(imx->clk_per);  in pwm_imx27_apply()
248 	 * according to imx pwm RM, the real period value should be PERIOD  in pwm_imx27_apply()
263 		ret = pwm_imx27_clk_prepare_enable(imx);  in pwm_imx27_apply()
270 	val = readl(imx->mmio_base + MX3_PWMPR);  in pwm_imx27_apply()
272 	cr = readl(imx->mmio_base + MX3_PWMCR);  in pwm_imx27_apply()
340 	val = FIELD_GET(MX3_PWMSR_FIFOAV, readl_relaxed(imx->mmio_base + MX3_PWMSR));  in pwm_imx27_apply()
342 	if (duty_cycles < imx->duty_cycle && (cr & MX3_PWMCR_EN)) {  in pwm_imx27_apply()
346 			writel_relaxed(imx->duty_cycle, imx->mmio_base + MX3_PWMSAR);  in pwm_imx27_apply()
347 			writel_relaxed(imx->duty_cycle, imx->mmio_base + MX3_PWMSAR);  in pwm_imx27_apply()
349 			val = readl_relaxed(imx->mmio_base + MX3_PWMCNR);  in pwm_imx27_apply()
354 			if ((val + c >= duty_cycles && val < imx->duty_cycle) ||  in pwm_imx27_apply()
356 				writel_relaxed(imx->duty_cycle, imx->mmio_base + MX3_PWMSAR);  in pwm_imx27_apply()
359 	writel_relaxed(duty_cycles, imx->mmio_base + MX3_PWMSAR);  in pwm_imx27_apply()
362 	writel(period_cycles, imx->mmio_base + MX3_PWMPR);  in pwm_imx27_apply()
368 	imx->duty_cycle = duty_cycles;  in pwm_imx27_apply()
382 	writel(cr, imx->mmio_base + MX3_PWMCR);  in pwm_imx27_apply()
385 		pwm_imx27_clk_disable_unprepare(imx);  in pwm_imx27_apply()
404 	struct pwm_imx27_chip *imx;  in pwm_imx27_probe()  local
408 	imx = devm_kzalloc(&pdev->dev, sizeof(*imx), GFP_KERNEL);  in pwm_imx27_probe()
409 	if (imx == NULL)  in pwm_imx27_probe()
412 	imx->clk_ipg = devm_clk_get(&pdev->dev, "ipg");  in pwm_imx27_probe()
413 	if (IS_ERR(imx->clk_ipg))  in pwm_imx27_probe()
414 		return dev_err_probe(&pdev->dev, PTR_ERR(imx->clk_ipg),  in pwm_imx27_probe()
417 	imx->clk_per = devm_clk_get(&pdev->dev, "per");  in pwm_imx27_probe()
418 	if (IS_ERR(imx->clk_per))  in pwm_imx27_probe()
419 		return dev_err_probe(&pdev->dev, PTR_ERR(imx->clk_per),  in pwm_imx27_probe()
422 	imx->chip.ops = &pwm_imx27_ops;  in pwm_imx27_probe()
423 	imx->chip.dev = &pdev->dev;  in pwm_imx27_probe()
424 	imx->chip.npwm = 1;  in pwm_imx27_probe()
426 	imx->mmio_base = devm_platform_ioremap_resource(pdev, 0);  in pwm_imx27_probe()
427 	if (IS_ERR(imx->mmio_base))  in pwm_imx27_probe()
428 		return PTR_ERR(imx->mmio_base);  in pwm_imx27_probe()
430 	ret = pwm_imx27_clk_prepare_enable(imx);  in pwm_imx27_probe()
435 	pwmcr = readl(imx->mmio_base + MX3_PWMCR);  in pwm_imx27_probe()
437 		pwm_imx27_clk_disable_unprepare(imx);  in pwm_imx27_probe()
439 	return devm_pwmchip_add(&pdev->dev, &imx->chip);  in pwm_imx27_probe()