Lines Matching refs:HDMI_RTX_CLK_CTL1

298 #define HDMI_RTX_CLK_CTL1	0x50  macro
317 		regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(11));  in imx8mp_hdmi_blk_ctrl_power_on()
324 		regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(17));  in imx8mp_hdmi_blk_ctrl_power_on()
328 		regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(28));  in imx8mp_hdmi_blk_ctrl_power_on()
332 		regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(27) | BIT(30));  in imx8mp_hdmi_blk_ctrl_power_on()
338 		regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL1,  in imx8mp_hdmi_blk_ctrl_power_on()
347 		regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(22) | BIT(24));  in imx8mp_hdmi_blk_ctrl_power_on()
355 		regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(3) | BIT(4) | BIT(5));  in imx8mp_hdmi_blk_ctrl_power_on()
374 		regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(11));  in imx8mp_hdmi_blk_ctrl_power_off()
381 		regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(17));  in imx8mp_hdmi_blk_ctrl_power_off()
385 		regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(28));  in imx8mp_hdmi_blk_ctrl_power_off()
389 		regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(27) | BIT(30));  in imx8mp_hdmi_blk_ctrl_power_off()
395 		regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1,  in imx8mp_hdmi_blk_ctrl_power_off()
405 		regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(22) | BIT(24));  in imx8mp_hdmi_blk_ctrl_power_off()
412 		regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(3) | BIT(4) | BIT(5));  in imx8mp_hdmi_blk_ctrl_power_off()
436 	regmap_write(bc->regmap, HDMI_RTX_CLK_CTL1, 0x0);  in imx8mp_hdmi_power_notifier()