Lines Matching refs:pwrc_domain
73 bool (*is_powered_off)(struct meson_ee_pwrc_domain *pwrc_domain);
257 static bool pwrc_ee_is_powered_off(struct meson_ee_pwrc_domain *pwrc_domain);
333 static bool pwrc_ee_is_powered_off(struct meson_ee_pwrc_domain *pwrc_domain) in pwrc_ee_is_powered_off() argument
337 regmap_read(pwrc_domain->pwrc->regmap_ao, in pwrc_ee_is_powered_off()
338 pwrc_domain->desc.top_pd->sleep_reg, ®); in pwrc_ee_is_powered_off()
340 return (reg & pwrc_domain->desc.top_pd->sleep_mask); in pwrc_ee_is_powered_off()
345 struct meson_ee_pwrc_domain *pwrc_domain = in meson_ee_pwrc_off() local
349 if (pwrc_domain->desc.top_pd) in meson_ee_pwrc_off()
350 regmap_update_bits(pwrc_domain->pwrc->regmap_ao, in meson_ee_pwrc_off()
351 pwrc_domain->desc.top_pd->sleep_reg, in meson_ee_pwrc_off()
352 pwrc_domain->desc.top_pd->sleep_mask, in meson_ee_pwrc_off()
353 pwrc_domain->desc.top_pd->sleep_mask); in meson_ee_pwrc_off()
356 for (i = 0 ; i < pwrc_domain->desc.mem_pd_count ; ++i) in meson_ee_pwrc_off()
357 regmap_update_bits(pwrc_domain->pwrc->regmap_hhi, in meson_ee_pwrc_off()
358 pwrc_domain->desc.mem_pd[i].reg, in meson_ee_pwrc_off()
359 pwrc_domain->desc.mem_pd[i].mask, in meson_ee_pwrc_off()
360 pwrc_domain->desc.mem_pd[i].mask); in meson_ee_pwrc_off()
364 if (pwrc_domain->desc.top_pd) in meson_ee_pwrc_off()
365 regmap_update_bits(pwrc_domain->pwrc->regmap_ao, in meson_ee_pwrc_off()
366 pwrc_domain->desc.top_pd->iso_reg, in meson_ee_pwrc_off()
367 pwrc_domain->desc.top_pd->iso_mask, in meson_ee_pwrc_off()
368 pwrc_domain->desc.top_pd->iso_mask); in meson_ee_pwrc_off()
370 if (pwrc_domain->num_clks) { in meson_ee_pwrc_off()
372 clk_bulk_disable_unprepare(pwrc_domain->num_clks, in meson_ee_pwrc_off()
373 pwrc_domain->clks); in meson_ee_pwrc_off()
381 struct meson_ee_pwrc_domain *pwrc_domain = in meson_ee_pwrc_on() local
385 if (pwrc_domain->desc.top_pd) in meson_ee_pwrc_on()
386 regmap_update_bits(pwrc_domain->pwrc->regmap_ao, in meson_ee_pwrc_on()
387 pwrc_domain->desc.top_pd->sleep_reg, in meson_ee_pwrc_on()
388 pwrc_domain->desc.top_pd->sleep_mask, 0); in meson_ee_pwrc_on()
391 for (i = 0 ; i < pwrc_domain->desc.mem_pd_count ; ++i) in meson_ee_pwrc_on()
392 regmap_update_bits(pwrc_domain->pwrc->regmap_hhi, in meson_ee_pwrc_on()
393 pwrc_domain->desc.mem_pd[i].reg, in meson_ee_pwrc_on()
394 pwrc_domain->desc.mem_pd[i].mask, 0); in meson_ee_pwrc_on()
398 ret = reset_control_assert(pwrc_domain->rstc); in meson_ee_pwrc_on()
402 if (pwrc_domain->desc.top_pd) in meson_ee_pwrc_on()
403 regmap_update_bits(pwrc_domain->pwrc->regmap_ao, in meson_ee_pwrc_on()
404 pwrc_domain->desc.top_pd->iso_reg, in meson_ee_pwrc_on()
405 pwrc_domain->desc.top_pd->iso_mask, 0); in meson_ee_pwrc_on()
407 ret = reset_control_deassert(pwrc_domain->rstc); in meson_ee_pwrc_on()
411 return clk_bulk_prepare_enable(pwrc_domain->num_clks, in meson_ee_pwrc_on()
412 pwrc_domain->clks); in meson_ee_pwrc_on()