Lines Matching refs:SUNXI_FUNCTION
20 SUNXI_FUNCTION(0x2, "emac1")), /* ERXD1 */
22 SUNXI_FUNCTION(0x2, "emac1")), /* ERXD0 */
24 SUNXI_FUNCTION(0x2, "emac1")), /* ECRS_DV */
26 SUNXI_FUNCTION(0x2, "emac1")), /* ERXERR */
28 SUNXI_FUNCTION(0x2, "emac1")), /* ETXD1 */
30 SUNXI_FUNCTION(0x2, "emac1")), /* ETXD0 */
32 SUNXI_FUNCTION(0x2, "emac1")), /* ETXCK */
34 SUNXI_FUNCTION(0x2, "emac1")), /* ETXEN */
36 SUNXI_FUNCTION(0x2, "emac1")), /* EMDC */
38 SUNXI_FUNCTION(0x2, "emac1")), /* EMDIO */
40 SUNXI_FUNCTION(0x2, "i2c3")), /* SCK */
42 SUNXI_FUNCTION(0x2, "i2c3")), /* SDA */
44 SUNXI_FUNCTION(0x2, "pwm5")),
47 SUNXI_FUNCTION(0x0, "gpio_in"),
48 SUNXI_FUNCTION(0x1, "gpio_out"),
49 SUNXI_FUNCTION(0x2, "nand0"), /* WE */
50 SUNXI_FUNCTION(0x3, "mmc2"), /* DS */
51 SUNXI_FUNCTION(0x4, "spi0"), /* CLK */
54 SUNXI_FUNCTION(0x0, "gpio_in"),
55 SUNXI_FUNCTION(0x1, "gpio_out"),
56 SUNXI_FUNCTION(0x2, "nand0"), /* ALE */
57 SUNXI_FUNCTION(0x3, "mmc2"), /* RST */
60 SUNXI_FUNCTION(0x0, "gpio_in"),
61 SUNXI_FUNCTION(0x1, "gpio_out"),
62 SUNXI_FUNCTION(0x2, "nand0"), /* CLE */
63 SUNXI_FUNCTION(0x4, "spi0"), /* MOSI */
66 SUNXI_FUNCTION(0x0, "gpio_in"),
67 SUNXI_FUNCTION(0x1, "gpio_out"),
68 SUNXI_FUNCTION(0x2, "nand0"), /* CE1 */
69 SUNXI_FUNCTION(0x4, "spi0"), /* CS0 */
72 SUNXI_FUNCTION(0x0, "gpio_in"),
73 SUNXI_FUNCTION(0x1, "gpio_out"),
74 SUNXI_FUNCTION(0x2, "nand0"), /* CE0 */
75 SUNXI_FUNCTION(0x4, "spi0"), /* MISO */
78 SUNXI_FUNCTION(0x0, "gpio_in"),
79 SUNXI_FUNCTION(0x1, "gpio_out"),
80 SUNXI_FUNCTION(0x2, "nand0"), /* RE */
81 SUNXI_FUNCTION(0x3, "mmc2"), /* CLK */
84 SUNXI_FUNCTION(0x0, "gpio_in"),
85 SUNXI_FUNCTION(0x1, "gpio_out"),
86 SUNXI_FUNCTION(0x2, "nand0"), /* RB0 */
87 SUNXI_FUNCTION(0x3, "mmc2"), /* CMD */
90 SUNXI_FUNCTION(0x0, "gpio_in"),
91 SUNXI_FUNCTION(0x1, "gpio_out"),
92 SUNXI_FUNCTION(0x2, "nand0"), /* RB1 */
93 SUNXI_FUNCTION(0x4, "spi0"), /* CS1 */
96 SUNXI_FUNCTION(0x0, "gpio_in"),
97 SUNXI_FUNCTION(0x1, "gpio_out"),
98 SUNXI_FUNCTION(0x2, "nand0"), /* DQ7 */
99 SUNXI_FUNCTION(0x3, "mmc2"), /* D3 */
102 SUNXI_FUNCTION(0x0, "gpio_in"),
103 SUNXI_FUNCTION(0x1, "gpio_out"),
104 SUNXI_FUNCTION(0x2, "nand0"), /* DQ6 */
105 SUNXI_FUNCTION(0x3, "mmc2"), /* D4 */
108 SUNXI_FUNCTION(0x0, "gpio_in"),
109 SUNXI_FUNCTION(0x1, "gpio_out"),
110 SUNXI_FUNCTION(0x2, "nand0"), /* DQ5 */
111 SUNXI_FUNCTION(0x3, "mmc2"), /* D0 */
114 SUNXI_FUNCTION(0x0, "gpio_in"),
115 SUNXI_FUNCTION(0x1, "gpio_out"),
116 SUNXI_FUNCTION(0x2, "nand0"), /* DQ4 */
117 SUNXI_FUNCTION(0x3, "mmc2"), /* D5 */
120 SUNXI_FUNCTION(0x0, "gpio_in"),
121 SUNXI_FUNCTION(0x1, "gpio_out"),
122 SUNXI_FUNCTION(0x2, "nand0"), /* DQS */
125 SUNXI_FUNCTION(0x0, "gpio_in"),
126 SUNXI_FUNCTION(0x1, "gpio_out"),
127 SUNXI_FUNCTION(0x2, "nand0"), /* DQ3 */
128 SUNXI_FUNCTION(0x3, "mmc2"), /* D1 */
131 SUNXI_FUNCTION(0x0, "gpio_in"),
132 SUNXI_FUNCTION(0x1, "gpio_out"),
133 SUNXI_FUNCTION(0x2, "nand0"), /* DQ2 */
134 SUNXI_FUNCTION(0x3, "mmc2"), /* D6 */
137 SUNXI_FUNCTION(0x0, "gpio_in"),
138 SUNXI_FUNCTION(0x1, "gpio_out"),
139 SUNXI_FUNCTION(0x2, "nand0"), /* DQ1 */
140 SUNXI_FUNCTION(0x3, "mmc2"), /* D2 */
141 SUNXI_FUNCTION(0x4, "spi0"), /* WP */
144 SUNXI_FUNCTION(0x0, "gpio_in"),
145 SUNXI_FUNCTION(0x1, "gpio_out"),
146 SUNXI_FUNCTION(0x2, "nand0"), /* DQ0 */
147 SUNXI_FUNCTION(0x3, "mmc2"), /* D7 */
148 SUNXI_FUNCTION(0x4, "spi0"), /* HOLD */
152 SUNXI_FUNCTION(0x0, "gpio_in"),
153 SUNXI_FUNCTION(0x1, "gpio_out"),
154 SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */
155 SUNXI_FUNCTION(0x3, "jtag"), /* MS */
158 SUNXI_FUNCTION(0x0, "gpio_in"),
159 SUNXI_FUNCTION(0x1, "gpio_out"),
160 SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */
161 SUNXI_FUNCTION(0x3, "jtag"), /* DI */
164 SUNXI_FUNCTION(0x0, "gpio_in"),
165 SUNXI_FUNCTION(0x1, "gpio_out"),
166 SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */
167 SUNXI_FUNCTION(0x3, "uart0"), /* TX */
170 SUNXI_FUNCTION(0x0, "gpio_in"),
171 SUNXI_FUNCTION(0x1, "gpio_out"),
172 SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */
173 SUNXI_FUNCTION(0x3, "jtag"), /* DO */
176 SUNXI_FUNCTION(0x0, "gpio_in"),
177 SUNXI_FUNCTION(0x1, "gpio_out"),
178 SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */
179 SUNXI_FUNCTION(0x3, "uart0"), /* RX */
182 SUNXI_FUNCTION(0x0, "gpio_in"),
183 SUNXI_FUNCTION(0x1, "gpio_out"),
184 SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */
185 SUNXI_FUNCTION(0x3, "jtag"), /* CK */
188 SUNXI_FUNCTION(0x0, "gpio_in"),
189 SUNXI_FUNCTION(0x1, "gpio_out"),
193 SUNXI_FUNCTION(0x0, "gpio_in"),
194 SUNXI_FUNCTION(0x1, "gpio_out"),
195 SUNXI_FUNCTION(0x2, "mmc1"), /* CLK */
198 SUNXI_FUNCTION(0x0, "gpio_in"),
199 SUNXI_FUNCTION(0x1, "gpio_out"),
200 SUNXI_FUNCTION(0x2, "mmc1"), /* CMD */
203 SUNXI_FUNCTION(0x0, "gpio_in"),
204 SUNXI_FUNCTION(0x1, "gpio_out"),
205 SUNXI_FUNCTION(0x2, "mmc1"), /* D0 */
208 SUNXI_FUNCTION(0x0, "gpio_in"),
209 SUNXI_FUNCTION(0x1, "gpio_out"),
210 SUNXI_FUNCTION(0x2, "mmc1"), /* D1 */
213 SUNXI_FUNCTION(0x0, "gpio_in"),
214 SUNXI_FUNCTION(0x1, "gpio_out"),
215 SUNXI_FUNCTION(0x2, "mmc1"), /* D2 */
218 SUNXI_FUNCTION(0x0, "gpio_in"),
219 SUNXI_FUNCTION(0x1, "gpio_out"),
220 SUNXI_FUNCTION(0x2, "mmc1"), /* D3 */
223 SUNXI_FUNCTION(0x0, "gpio_in"),
224 SUNXI_FUNCTION(0x1, "gpio_out"),
225 SUNXI_FUNCTION(0x2, "uart1"), /* TX */
226 SUNXI_FUNCTION(0x4, "jtag"), /* MS */
229 SUNXI_FUNCTION(0x0, "gpio_in"),
230 SUNXI_FUNCTION(0x1, "gpio_out"),
231 SUNXI_FUNCTION(0x2, "uart1"), /* RX */
232 SUNXI_FUNCTION(0x4, "jtag"), /* CK */
235 SUNXI_FUNCTION(0x0, "gpio_in"),
236 SUNXI_FUNCTION(0x1, "gpio_out"),
237 SUNXI_FUNCTION(0x2, "uart1"), /* RTS */
238 SUNXI_FUNCTION(0x3, "clock"), /* PLL_LOCK_DEBUG */
239 SUNXI_FUNCTION(0x4, "jtag"), /* DO */
242 SUNXI_FUNCTION(0x0, "gpio_in"),
243 SUNXI_FUNCTION(0x1, "gpio_out"),
244 SUNXI_FUNCTION(0x2, "uart1"), /* CTS */
247 SUNXI_FUNCTION(0x0, "gpio_in"),
248 SUNXI_FUNCTION(0x1, "gpio_out"),
249 SUNXI_FUNCTION(0x2, "i2s2"), /* MCLK */
250 SUNXI_FUNCTION(0x3, "clock"), /* X32KFOUT */
253 SUNXI_FUNCTION(0x0, "gpio_in"),
254 SUNXI_FUNCTION(0x1, "gpio_out"),
255 SUNXI_FUNCTION(0x2, "i2s2"), /* BCLK */
258 SUNXI_FUNCTION(0x0, "gpio_in"),
259 SUNXI_FUNCTION(0x1, "gpio_out"),
260 SUNXI_FUNCTION(0x2, "i2s2"), /* SYNC */
263 SUNXI_FUNCTION(0x0, "gpio_in"),
264 SUNXI_FUNCTION(0x1, "gpio_out"),
265 SUNXI_FUNCTION(0x2, "i2s2"), /* DOUT */
268 SUNXI_FUNCTION(0x0, "gpio_in"),
269 SUNXI_FUNCTION(0x1, "gpio_out"),
270 SUNXI_FUNCTION(0x2, "i2s2"), /* DIN */
273 SUNXI_FUNCTION(0x0, "gpio_in"),
274 SUNXI_FUNCTION(0x1, "gpio_out"),
275 SUNXI_FUNCTION(0x2, "uart2"), /* TX */
276 SUNXI_FUNCTION(0x5, "i2c4"), /* SCK */
279 SUNXI_FUNCTION(0x0, "gpio_in"),
280 SUNXI_FUNCTION(0x1, "gpio_out"),
281 SUNXI_FUNCTION(0x2, "uart2"), /* RX */
282 SUNXI_FUNCTION(0x5, "i2c4"), /* SDA */
285 SUNXI_FUNCTION(0x0, "gpio_in"),
286 SUNXI_FUNCTION(0x1, "gpio_out"),
287 SUNXI_FUNCTION(0x2, "uart2"), /* RTS */
288 SUNXI_FUNCTION(0x5, "i2c3"), /* SCK */
291 SUNXI_FUNCTION(0x0, "gpio_in"),
292 SUNXI_FUNCTION(0x1, "gpio_out"),
293 SUNXI_FUNCTION(0x2, "uart2"), /* CTS */
294 SUNXI_FUNCTION(0x5, "i2c3"), /* SDA */
297 SUNXI_FUNCTION(0x0, "gpio_in"),
298 SUNXI_FUNCTION(0x1, "gpio_out"),
299 SUNXI_FUNCTION(0x4, "pwm1"),
303 SUNXI_FUNCTION(0x0, "gpio_in"),
304 SUNXI_FUNCTION(0x1, "gpio_out"),
305 SUNXI_FUNCTION(0x2, "uart0"), /* TX */
306 SUNXI_FUNCTION(0x4, "pwm3"),
307 SUNXI_FUNCTION(0x5, "i2c1"), /* SCK */
310 SUNXI_FUNCTION(0x0, "gpio_in"),
311 SUNXI_FUNCTION(0x1, "gpio_out"),
312 SUNXI_FUNCTION(0x2, "uart0"), /* RX */
313 SUNXI_FUNCTION(0x4, "pwm4"),
314 SUNXI_FUNCTION(0x5, "i2c1"), /* SDA */
317 SUNXI_FUNCTION(0x0, "gpio_in"),
318 SUNXI_FUNCTION(0x1, "gpio_out"),
319 SUNXI_FUNCTION(0x2, "uart5"), /* TX */
320 SUNXI_FUNCTION(0x3, "spdif"), /* MCLK */
321 SUNXI_FUNCTION(0x4, "pwm2"),
322 SUNXI_FUNCTION(0x5, "i2c2"), /* SCK */
325 SUNXI_FUNCTION(0x0, "gpio_in"),
326 SUNXI_FUNCTION(0x1, "gpio_out"),
327 SUNXI_FUNCTION(0x2, "uart5"), /* RX */
328 SUNXI_FUNCTION(0x4, "pwm1"),
329 SUNXI_FUNCTION(0x5, "i2c2"), /* SDA */
332 SUNXI_FUNCTION(0x0, "gpio_in"),
333 SUNXI_FUNCTION(0x1, "gpio_out"),
334 SUNXI_FUNCTION(0x3, "spdif"), /* OUT */
335 SUNXI_FUNCTION(0x5, "i2c3"), /* SCK */
338 SUNXI_FUNCTION(0x0, "gpio_in"),
339 SUNXI_FUNCTION(0x1, "gpio_out"),
340 SUNXI_FUNCTION(0x2, "uart2"), /* TX */
341 SUNXI_FUNCTION(0x3, "i2s3"), /* MCLK */
342 SUNXI_FUNCTION(0x4, "spi1"), /* CS0 */
343 SUNXI_FUNCTION(0x5, "i2c3"), /* SDA */
346 SUNXI_FUNCTION(0x0, "gpio_in"),
347 SUNXI_FUNCTION(0x1, "gpio_out"),
348 SUNXI_FUNCTION(0x2, "uart2"), /* RX */
349 SUNXI_FUNCTION(0x3, "i2s3"), /* BCLK */
350 SUNXI_FUNCTION(0x4, "spi1"), /* CLK */
351 SUNXI_FUNCTION(0x5, "i2c4"), /* SCK */
354 SUNXI_FUNCTION(0x0, "gpio_in"),
355 SUNXI_FUNCTION(0x1, "gpio_out"),
356 SUNXI_FUNCTION(0x2, "uart2"), /* RTS */
357 SUNXI_FUNCTION(0x3, "i2s3"), /* SYNC */
358 SUNXI_FUNCTION(0x4, "spi1"), /* MOSI */
359 SUNXI_FUNCTION(0x5, "i2c4"), /* SDA */
362 SUNXI_FUNCTION(0x0, "gpio_in"),
363 SUNXI_FUNCTION(0x1, "gpio_out"),
364 SUNXI_FUNCTION(0x2, "uart2"), /* CTS */
365 SUNXI_FUNCTION(0x3, "i2s3_dout0"), /* DO0 */
366 SUNXI_FUNCTION(0x4, "spi1"), /* MISO */
367 SUNXI_FUNCTION(0x5, "i2s3_din1"), /* DI1 */
370 SUNXI_FUNCTION(0x0, "gpio_in"),
371 SUNXI_FUNCTION(0x1, "gpio_out"),
372 SUNXI_FUNCTION(0x3, "i2s3_din0"), /* DI0 */
373 SUNXI_FUNCTION(0x4, "spi1"), /* CS1 */
374 SUNXI_FUNCTION(0x5, "i2s3_dout1"), /* DO1 */
377 SUNXI_FUNCTION(0x0, "gpio_in"),
378 SUNXI_FUNCTION(0x1, "gpio_out"),
379 SUNXI_FUNCTION(0x3, "ir_rx"),
383 SUNXI_FUNCTION(0x0, "gpio_in"),
384 SUNXI_FUNCTION(0x1, "gpio_out"),
385 SUNXI_FUNCTION(0x2, "emac0"), /* ERXD3 */
386 SUNXI_FUNCTION(0x3, "dmic"), /* CLK */
387 SUNXI_FUNCTION(0x4, "i2s0"), /* MCLK */
388 SUNXI_FUNCTION(0x5, "hdmi"), /* HSCL */
391 SUNXI_FUNCTION(0x0, "gpio_in"),
392 SUNXI_FUNCTION(0x1, "gpio_out"),
393 SUNXI_FUNCTION(0x2, "emac0"), /* ERXD2 */
394 SUNXI_FUNCTION(0x3, "dmic"), /* DATA0 */
395 SUNXI_FUNCTION(0x4, "i2s0"), /* BCLK */
396 SUNXI_FUNCTION(0x5, "hdmi"), /* HSDA */
399 SUNXI_FUNCTION(0x0, "gpio_in"),
400 SUNXI_FUNCTION(0x1, "gpio_out"),
401 SUNXI_FUNCTION(0x2, "emac0"), /* ERXD1 */
402 SUNXI_FUNCTION(0x3, "dmic"), /* DATA1 */
403 SUNXI_FUNCTION(0x4, "i2s0"), /* SYNC */
404 SUNXI_FUNCTION(0x5, "hdmi"), /* HCEC */
407 SUNXI_FUNCTION(0x0, "gpio_in"),
408 SUNXI_FUNCTION(0x1, "gpio_out"),
409 SUNXI_FUNCTION(0x2, "emac0"), /* ERXD0 */
410 SUNXI_FUNCTION(0x3, "dmic"), /* DATA2 */
411 SUNXI_FUNCTION(0x4, "i2s0_dout0"), /* DO0 */
412 SUNXI_FUNCTION(0x5, "i2s0_din1"), /* DI1 */
415 SUNXI_FUNCTION(0x0, "gpio_in"),
416 SUNXI_FUNCTION(0x1, "gpio_out"),
417 SUNXI_FUNCTION(0x2, "emac0"), /* ERXCK */
418 SUNXI_FUNCTION(0x3, "dmic"), /* DATA3 */
419 SUNXI_FUNCTION(0x4, "i2s0_din0"), /* DI0 */
420 SUNXI_FUNCTION(0x5, "i2s0_dout1"), /* DO1 */
423 SUNXI_FUNCTION(0x0, "gpio_in"),
424 SUNXI_FUNCTION(0x1, "gpio_out"),
425 SUNXI_FUNCTION(0x2, "emac0"), /* ERXCTL */
426 SUNXI_FUNCTION(0x3, "uart2"), /* TX */
427 SUNXI_FUNCTION(0x4, "ts0"), /* CLK */
428 SUNXI_FUNCTION(0x5, "i2c0"), /* SCK */
431 SUNXI_FUNCTION(0x0, "gpio_in"),
432 SUNXI_FUNCTION(0x1, "gpio_out"),
433 SUNXI_FUNCTION(0x2, "emac0"), /* ENULL */
434 SUNXI_FUNCTION(0x3, "uart2"), /* RX */
435 SUNXI_FUNCTION(0x4, "ts0"), /* ERR */
436 SUNXI_FUNCTION(0x5, "i2c0"), /* SDA */
439 SUNXI_FUNCTION(0x0, "gpio_in"),
440 SUNXI_FUNCTION(0x1, "gpio_out"),
441 SUNXI_FUNCTION(0x2, "emac0"), /* ETXD3 */
442 SUNXI_FUNCTION(0x3, "uart2"), /* RTS */
443 SUNXI_FUNCTION(0x4, "ts0"), /* SYNC */
444 SUNXI_FUNCTION(0x5, "i2c1"), /* SCK */
447 SUNXI_FUNCTION(0x0, "gpio_in"),
448 SUNXI_FUNCTION(0x1, "gpio_out"),
449 SUNXI_FUNCTION(0x2, "emac0"), /* ETXD2 */
450 SUNXI_FUNCTION(0x3, "uart2"), /* CTS */
451 SUNXI_FUNCTION(0x4, "ts0"), /* DVLD */
452 SUNXI_FUNCTION(0x5, "i2c1"), /* SDA */
455 SUNXI_FUNCTION(0x0, "gpio_in"),
456 SUNXI_FUNCTION(0x1, "gpio_out"),
457 SUNXI_FUNCTION(0x2, "emac0"), /* ETXD1 */
458 SUNXI_FUNCTION(0x3, "uart3"), /* TX */
459 SUNXI_FUNCTION(0x4, "ts0"), /* D0 */
460 SUNXI_FUNCTION(0x5, "i2c2"), /* SCK */
463 SUNXI_FUNCTION(0x0, "gpio_in"),
464 SUNXI_FUNCTION(0x1, "gpio_out"),
465 SUNXI_FUNCTION(0x2, "emac0"), /* ETXD0 */
466 SUNXI_FUNCTION(0x3, "uart3"), /* RX */
467 SUNXI_FUNCTION(0x4, "ts0"), /* D1 */
468 SUNXI_FUNCTION(0x5, "i2c2"), /* SDA */
471 SUNXI_FUNCTION(0x0, "gpio_in"),
472 SUNXI_FUNCTION(0x1, "gpio_out"),
473 SUNXI_FUNCTION(0x2, "emac0"), /* ETXCK */
474 SUNXI_FUNCTION(0x3, "uart3"), /* RTS */
475 SUNXI_FUNCTION(0x4, "ts0"), /* D2 */
476 SUNXI_FUNCTION(0x5, "pwm1"),
479 SUNXI_FUNCTION(0x0, "gpio_in"),
480 SUNXI_FUNCTION(0x1, "gpio_out"),
481 SUNXI_FUNCTION(0x2, "emac0"), /* ETXCTL */
482 SUNXI_FUNCTION(0x3, "uart3"), /* CTS */
483 SUNXI_FUNCTION(0x4, "ts0"), /* D3 */
484 SUNXI_FUNCTION(0x5, "pwm2"),
487 SUNXI_FUNCTION(0x0, "gpio_in"),
488 SUNXI_FUNCTION(0x1, "gpio_out"),
489 SUNXI_FUNCTION(0x2, "emac0"), /* ECLKIN */
490 SUNXI_FUNCTION(0x3, "uart4"), /* TX */
491 SUNXI_FUNCTION(0x4, "ts0"), /* D4 */
492 SUNXI_FUNCTION(0x5, "pwm3"),
495 SUNXI_FUNCTION(0x0, "gpio_in"),
496 SUNXI_FUNCTION(0x1, "gpio_out"),
497 SUNXI_FUNCTION(0x2, "emac0"), /* MDC */
498 SUNXI_FUNCTION(0x3, "uart4"), /* RX */
499 SUNXI_FUNCTION(0x4, "ts0"), /* D5 */
500 SUNXI_FUNCTION(0x5, "pwm4"),
503 SUNXI_FUNCTION(0x0, "gpio_in"),
504 SUNXI_FUNCTION(0x1, "gpio_out"),
505 SUNXI_FUNCTION(0x2, "emac0"), /* MDIO */
506 SUNXI_FUNCTION(0x3, "uart4"), /* RTS */
507 SUNXI_FUNCTION(0x4, "ts0"), /* D6 */
508 SUNXI_FUNCTION(0x5, "clock"), /* CLK_FANOUT0 */
511 SUNXI_FUNCTION(0x0, "gpio_in"),
512 SUNXI_FUNCTION(0x1, "gpio_out"),
513 SUNXI_FUNCTION(0x2, "emac0"), /* EPHY_CLK */
514 SUNXI_FUNCTION(0x3, "uart4"), /* CTS */
515 SUNXI_FUNCTION(0x4, "ts0"), /* D7 */
516 SUNXI_FUNCTION(0x5, "clock"), /* CLK_FANOUT1 */