1 /* SPDX-License-Identifier: GPL-2.0+ */
45 #define EXYNOS_EINT_EDGE_FALLING	2
54 #define EXYNOS_PIN_BANK_EINTN(pins, reg, id)		\  argument
58 		.nr_pins	= pins,			\
63 #define EXYNOS_PIN_BANK_EINTG(pins, reg, id, offs)	\  argument
67 		.nr_pins	= pins,			\
73 #define EXYNOS_PIN_BANK_EINTW(pins, reg, id, offs)	\  argument
77 		.nr_pins	= pins,			\
83 #define EXYNOS5433_PIN_BANK_EINTG(pins, reg, id, offs)		\  argument
87 		.nr_pins	= pins,				\
93 #define EXYNOS5433_PIN_BANK_EINTW(pins, reg, id, offs)		\  argument
97 		.nr_pins	= pins,				\
103 #define EXYNOS5433_PIN_BANK_EINTW_EXT(pins, reg, id, offs, pctl_idx) \  argument
107 		.nr_pins        = pins,				\
114 #define EXYNOS850_PIN_BANK_EINTN(pins, reg, id)			\  argument
118 		.nr_pins	= pins,				\
123 #define EXYNOS850_PIN_BANK_EINTG(pins, reg, id, offs)		\  argument
127 		.nr_pins	= pins,				\
133 #define EXYNOS850_PIN_BANK_EINTW(pins, reg, id, offs)		\  argument
137 		.nr_pins	= pins,				\
157  * @nr_banks: count of banks being part of the mux
158  * @banks: array of banks being part of the mux