Lines Matching +full:8 +full:- +full:pin
1 // SPDX-License-Identifier: GPL-2.0+
20 #include <linux/soc/samsung/exynos-regs-pmu.h>
22 #include "pinctrl-samsung.h"
23 #include "pinctrl-exynos.h"
45 void __iomem *clk_base = (void __iomem *)drvdata->retention_ctrl->priv; in s5pv210_retention_disable()
62 ctrl = devm_kzalloc(drvdata->dev, sizeof(*ctrl), GFP_KERNEL); in s5pv210_retention_init()
64 return ERR_PTR(-ENOMEM); in s5pv210_retention_init()
66 np = of_find_compatible_node(NULL, NULL, "samsung,s5pv210-clock"); in s5pv210_retention_init()
70 return ERR_PTR(-ENODEV); in s5pv210_retention_init()
77 return ERR_PTR(-EINVAL); in s5pv210_retention_init()
80 ctrl->priv = (void __force *)clk_base; in s5pv210_retention_init()
81 ctrl->disable = s5pv210_retention_disable; in s5pv210_retention_init()
90 /* pin banks of s5pv210 pin-controller */
93 EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00),
95 EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpb", 0x08),
100 EXYNOS_PIN_BANK_EINTG(8, 0x0e0, "gpe0", 0x1c),
102 EXYNOS_PIN_BANK_EINTG(8, 0x120, "gpf0", 0x24),
103 EXYNOS_PIN_BANK_EINTG(8, 0x140, "gpf1", 0x28),
104 EXYNOS_PIN_BANK_EINTG(8, 0x160, "gpf2", 0x2c),
110 EXYNOS_PIN_BANK_EINTG(8, 0x240, "gpj0", 0x44),
112 EXYNOS_PIN_BANK_EINTG(8, 0x280, "gpj2", 0x4c),
113 EXYNOS_PIN_BANK_EINTG(8, 0x2a0, "gpj3", 0x50),
116 EXYNOS_PIN_BANK_EINTN(8, 0x2e0, "mp01"),
118 EXYNOS_PIN_BANK_EINTN(8, 0x320, "mp03"),
119 EXYNOS_PIN_BANK_EINTN(8, 0x340, "mp04"),
120 EXYNOS_PIN_BANK_EINTN(8, 0x360, "mp05"),
121 EXYNOS_PIN_BANK_EINTN(8, 0x380, "mp06"),
122 EXYNOS_PIN_BANK_EINTN(8, 0x3a0, "mp07"),
123 EXYNOS_PIN_BANK_EINTW(8, 0xc00, "gph0", 0x00),
124 EXYNOS_PIN_BANK_EINTW(8, 0xc20, "gph1", 0x04),
125 EXYNOS_PIN_BANK_EINTW(8, 0xc40, "gph2", 0x08),
126 EXYNOS_PIN_BANK_EINTW(8, 0xc60, "gph3", 0x0c),
131 /* pin-controller instance 0 data */
150 /* pin banks of exynos3250 pin-controller 0 */
153 EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00),
155 EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpb", 0x08),
162 /* pin banks of exynos3250 pin-controller 1 */
165 EXYNOS_PIN_BANK_EINTN(8, 0x120, "gpe0"),
166 EXYNOS_PIN_BANK_EINTN(8, 0x140, "gpe1"),
168 EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpk0", 0x08),
172 EXYNOS_PIN_BANK_EINTG(8, 0x260, "gpm0", 0x24),
175 EXYNOS_PIN_BANK_EINTG(8, 0x2c0, "gpm3", 0x30),
176 EXYNOS_PIN_BANK_EINTG(8, 0x2e0, "gpm4", 0x34),
177 EXYNOS_PIN_BANK_EINTW(8, 0xc00, "gpx0", 0x00),
178 EXYNOS_PIN_BANK_EINTW(8, 0xc20, "gpx1", 0x04),
179 EXYNOS_PIN_BANK_EINTW(8, 0xc40, "gpx2", 0x08),
180 EXYNOS_PIN_BANK_EINTW(8, 0xc60, "gpx3", 0x0c),
184 * PMU pad retention groups for Exynos3250 doesn't match pin banks, so handle
209 * two gpio/pin-mux/pinconfig controllers.
213 /* pin-controller instance 0 data */
221 /* pin-controller instance 1 data */
237 /* pin banks of exynos4210 pin-controller 0 */
240 EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00),
242 EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpb", 0x08),
248 EXYNOS_PIN_BANK_EINTG(8, 0x100, "gpe1", 0x20),
250 EXYNOS_PIN_BANK_EINTG(8, 0x140, "gpe3", 0x28),
251 EXYNOS_PIN_BANK_EINTG(8, 0x160, "gpe4", 0x2c),
252 EXYNOS_PIN_BANK_EINTG(8, 0x180, "gpf0", 0x30),
253 EXYNOS_PIN_BANK_EINTG(8, 0x1A0, "gpf1", 0x34),
254 EXYNOS_PIN_BANK_EINTG(8, 0x1C0, "gpf2", 0x38),
258 /* pin banks of exynos4210 pin-controller 1 */
261 EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpj0", 0x00),
267 EXYNOS_PIN_BANK_EINTG(8, 0x0C0, "gpl0", 0x18),
269 EXYNOS_PIN_BANK_EINTG(8, 0x100, "gpl2", 0x20),
273 EXYNOS_PIN_BANK_EINTN(8, 0x180, "gpy3"),
274 EXYNOS_PIN_BANK_EINTN(8, 0x1A0, "gpy4"),
275 EXYNOS_PIN_BANK_EINTN(8, 0x1C0, "gpy5"),
276 EXYNOS_PIN_BANK_EINTN(8, 0x1E0, "gpy6"),
277 EXYNOS_PIN_BANK_EINTW(8, 0xC00, "gpx0", 0x00),
278 EXYNOS_PIN_BANK_EINTW(8, 0xC20, "gpx1", 0x04),
279 EXYNOS_PIN_BANK_EINTW(8, 0xC40, "gpx2", 0x08),
280 EXYNOS_PIN_BANK_EINTW(8, 0xC60, "gpx3", 0x0c),
283 /* pin banks of exynos4210 pin-controller 2 */
307 /* PMU retention control for audio pins can be tied to audio pin bank */
321 * three gpio/pin-mux/pinconfig controllers.
325 /* pin-controller instance 0 data */
333 /* pin-controller instance 1 data */
342 /* pin-controller instance 2 data */
354 /* pin banks of exynos4x12 pin-controller 0 */
357 EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00),
359 EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpb", 0x08),
364 EXYNOS_PIN_BANK_EINTG(8, 0x180, "gpf0", 0x30),
365 EXYNOS_PIN_BANK_EINTG(8, 0x1A0, "gpf1", 0x34),
366 EXYNOS_PIN_BANK_EINTG(8, 0x1C0, "gpf2", 0x38),
368 EXYNOS_PIN_BANK_EINTG(8, 0x240, "gpj0", 0x40),
372 /* pin banks of exynos4x12 pin-controller 1 */
381 EXYNOS_PIN_BANK_EINTG(8, 0x100, "gpl2", 0x20),
382 EXYNOS_PIN_BANK_EINTG(8, 0x260, "gpm0", 0x24),
385 EXYNOS_PIN_BANK_EINTG(8, 0x2C0, "gpm3", 0x30),
386 EXYNOS_PIN_BANK_EINTG(8, 0x2E0, "gpm4", 0x34),
390 EXYNOS_PIN_BANK_EINTN(8, 0x180, "gpy3"),
391 EXYNOS_PIN_BANK_EINTN(8, 0x1A0, "gpy4"),
392 EXYNOS_PIN_BANK_EINTN(8, 0x1C0, "gpy5"),
393 EXYNOS_PIN_BANK_EINTN(8, 0x1E0, "gpy6"),
394 EXYNOS_PIN_BANK_EINTW(8, 0xC00, "gpx0", 0x00),
395 EXYNOS_PIN_BANK_EINTW(8, 0xC20, "gpx1", 0x04),
396 EXYNOS_PIN_BANK_EINTW(8, 0xC40, "gpx2", 0x08),
397 EXYNOS_PIN_BANK_EINTW(8, 0xC60, "gpx3", 0x0c),
400 /* pin banks of exynos4x12 pin-controller 2 */
406 /* pin banks of exynos4x12 pin-controller 3 */
409 EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpv0", 0x00),
410 EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpv1", 0x04),
411 EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpv2", 0x08),
412 EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpv3", 0x0c),
418 * four gpio/pin-mux/pinconfig controllers.
422 /* pin-controller instance 0 data */
430 /* pin-controller instance 1 data */
439 /* pin-controller instance 2 data */
447 /* pin-controller instance 3 data */
461 /* pin banks of exynos5250 pin-controller 0 */
464 EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00),
466 EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpa2", 0x08),
476 EXYNOS_PIN_BANK_EINTG(8, 0x180, "gpd1", 0x30),
481 EXYNOS_PIN_BANK_EINTN(8, 0x200, "gpy3"),
482 EXYNOS_PIN_BANK_EINTN(8, 0x220, "gpy4"),
483 EXYNOS_PIN_BANK_EINTN(8, 0x240, "gpy5"),
484 EXYNOS_PIN_BANK_EINTN(8, 0x260, "gpy6"),
485 EXYNOS_PIN_BANK_EINTW(8, 0xC00, "gpx0", 0x00),
486 EXYNOS_PIN_BANK_EINTW(8, 0xC20, "gpx1", 0x04),
487 EXYNOS_PIN_BANK_EINTW(8, 0xC40, "gpx2", 0x08),
488 EXYNOS_PIN_BANK_EINTW(8, 0xC60, "gpx3", 0x0c),
491 /* pin banks of exynos5250 pin-controller 1 */
494 EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpe0", 0x00),
498 EXYNOS_PIN_BANK_EINTG(8, 0x080, "gpg0", 0x10),
499 EXYNOS_PIN_BANK_EINTG(8, 0x0A0, "gpg1", 0x14),
502 EXYNOS_PIN_BANK_EINTG(8, 0x100, "gph1", 0x20),
505 /* pin banks of exynos5250 pin-controller 2 */
508 EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpv0", 0x00),
509 EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpv1", 0x04),
510 EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpv2", 0x08),
511 EXYNOS_PIN_BANK_EINTG(8, 0x080, "gpv3", 0x0c),
515 /* pin banks of exynos5250 pin-controller 3 */
523 * four gpio/pin-mux/pinconfig controllers.
527 /* pin-controller instance 0 data */
536 /* pin-controller instance 1 data */
544 /* pin-controller instance 2 data */
551 /* pin-controller instance 3 data */
566 /* pin banks of exynos5260 pin-controller 0 */
571 EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpa2", 0x08),
575 EXYNOS_PIN_BANK_EINTG(8, 0x0c0, "gpb3", 0x18),
576 EXYNOS_PIN_BANK_EINTG(8, 0x0e0, "gpb4", 0x1c),
577 EXYNOS_PIN_BANK_EINTG(8, 0x100, "gpb5", 0x20),
578 EXYNOS_PIN_BANK_EINTG(8, 0x120, "gpd0", 0x24),
581 EXYNOS_PIN_BANK_EINTG(8, 0x180, "gpe0", 0x30),
584 EXYNOS_PIN_BANK_EINTG(8, 0x1e0, "gpf1", 0x3c),
586 EXYNOS_PIN_BANK_EINTW(8, 0xc00, "gpx0", 0x00),
587 EXYNOS_PIN_BANK_EINTW(8, 0xc20, "gpx1", 0x04),
588 EXYNOS_PIN_BANK_EINTW(8, 0xc40, "gpx2", 0x08),
589 EXYNOS_PIN_BANK_EINTW(8, 0xc60, "gpx3", 0x0c),
592 /* pin banks of exynos5260 pin-controller 1 */
602 /* pin banks of exynos5260 pin-controller 2 */
611 * three gpio/pin-mux/pinconfig controllers.
615 /* pin-controller instance 0 data */
623 /* pin-controller instance 1 data */
630 /* pin-controller instance 2 data */
644 /* pin banks of exynos5410 pin-controller 0 */
647 EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00),
649 EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpa2", 0x08),
658 EXYNOS_PIN_BANK_EINTG(8, 0x180, "gpd1", 0x2c),
659 EXYNOS_PIN_BANK_EINTG(8, 0x1A0, "gpe0", 0x30),
662 EXYNOS_PIN_BANK_EINTG(8, 0x200, "gpf1", 0x3c),
663 EXYNOS_PIN_BANK_EINTG(8, 0x220, "gpg0", 0x40),
664 EXYNOS_PIN_BANK_EINTG(8, 0x240, "gpg1", 0x44),
667 EXYNOS_PIN_BANK_EINTG(8, 0x2A0, "gph1", 0x50),
669 EXYNOS_PIN_BANK_EINTN(8, 0x2C0, "gpm7"),
673 EXYNOS_PIN_BANK_EINTN(8, 0x340, "gpy3"),
674 EXYNOS_PIN_BANK_EINTN(8, 0x360, "gpy4"),
675 EXYNOS_PIN_BANK_EINTN(8, 0x380, "gpy5"),
676 EXYNOS_PIN_BANK_EINTN(8, 0x3A0, "gpy6"),
677 EXYNOS_PIN_BANK_EINTN(8, 0x3C0, "gpy7"),
678 EXYNOS_PIN_BANK_EINTW(8, 0xC00, "gpx0", 0x00),
679 EXYNOS_PIN_BANK_EINTW(8, 0xC20, "gpx1", 0x04),
680 EXYNOS_PIN_BANK_EINTW(8, 0xC40, "gpx2", 0x08),
681 EXYNOS_PIN_BANK_EINTW(8, 0xC60, "gpx3", 0x0c),
684 /* pin banks of exynos5410 pin-controller 1 */
688 EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpj1", 0x04),
689 EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpj2", 0x08),
690 EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpj3", 0x0c),
692 EXYNOS_PIN_BANK_EINTG(8, 0x0A0, "gpk0", 0x14),
693 EXYNOS_PIN_BANK_EINTG(8, 0x0C0, "gpk1", 0x18),
694 EXYNOS_PIN_BANK_EINTG(8, 0x0E0, "gpk2", 0x1c),
698 /* pin banks of exynos5410 pin-controller 2 */
701 EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpv0", 0x00),
702 EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpv1", 0x04),
703 EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpv2", 0x08),
704 EXYNOS_PIN_BANK_EINTG(8, 0x080, "gpv3", 0x0c),
708 /* pin banks of exynos5410 pin-controller 3 */
716 * four gpio/pin-mux/pinconfig controllers.
720 /* pin-controller instance 0 data */
728 /* pin-controller instance 1 data */
735 /* pin-controller instance 2 data */
742 /* pin-controller instance 3 data */
756 /* pin banks of exynos5420 pin-controller 0 */
759 EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpy7", 0x00),
760 EXYNOS_PIN_BANK_EINTW(8, 0xC00, "gpx0", 0x00),
761 EXYNOS_PIN_BANK_EINTW(8, 0xC20, "gpx1", 0x04),
762 EXYNOS_PIN_BANK_EINTW(8, 0xC40, "gpx2", 0x08),
763 EXYNOS_PIN_BANK_EINTW(8, 0xC60, "gpx3", 0x0c),
766 /* pin banks of exynos5420 pin-controller 1 */
769 EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpc0", 0x00),
770 EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpc1", 0x04),
774 EXYNOS_PIN_BANK_EINTG(8, 0x0A0, "gpd1", 0x14),
778 EXYNOS_PIN_BANK_EINTN(8, 0x120, "gpy3"),
779 EXYNOS_PIN_BANK_EINTN(8, 0x140, "gpy4"),
780 EXYNOS_PIN_BANK_EINTN(8, 0x160, "gpy5"),
781 EXYNOS_PIN_BANK_EINTN(8, 0x180, "gpy6"),
784 /* pin banks of exynos5420 pin-controller 2 */
787 EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpe0", 0x00),
790 EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpf1", 0x0c),
791 EXYNOS_PIN_BANK_EINTG(8, 0x080, "gpg0", 0x10),
792 EXYNOS_PIN_BANK_EINTG(8, 0x0A0, "gpg1", 0x14),
797 /* pin banks of exynos5420 pin-controller 3 */
800 EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00),
802 EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpa2", 0x08),
806 EXYNOS_PIN_BANK_EINTG(8, 0x0C0, "gpb3", 0x18),
808 EXYNOS_PIN_BANK_EINTG(8, 0x100, "gph0", 0x20),
811 /* pin banks of exynos5420 pin-controller 4 */
843 * four gpio/pin-mux/pinconfig controllers.
847 /* pin-controller instance 0 data */
856 /* pin-controller instance 1 data */
864 /* pin-controller instance 2 data */
872 /* pin-controller instance 3 data */
880 /* pin-controller instance 4 data */