pinctrl/renesas/pfc-r8a779g0.c

16 #define CFG_FLAGS (SH_PFC_PIN_CFG_DRIVE_STRENGTH | SH_PFC_PIN_CFG_PULL_UP_DOWN)  macro
19 	PORT_GP_CFG_19(0,	fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE_18_33),	\
20 	PORT_GP_CFG_23(1,	fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE_18_33),	\
21 	PORT_GP_CFG_1(1, 23,	fn, sfx, CFG_FLAGS),					\
22 	PORT_GP_CFG_1(1, 24,	fn, sfx, CFG_FLAGS),					\
23 	PORT_GP_CFG_1(1, 25,	fn, sfx, CFG_FLAGS),					\
24 	PORT_GP_CFG_1(1, 26,	fn, sfx, CFG_FLAGS),					\
25 	PORT_GP_CFG_1(1, 27,	fn, sfx, CFG_FLAGS),					\
26 	PORT_GP_CFG_1(1, 28,	fn, sfx, CFG_FLAGS),					\
27 	PORT_GP_CFG_20(2,	fn, sfx, CFG_FLAGS),					\
28 	PORT_GP_CFG_13(3,	fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE_18_33),	\
29 	PORT_GP_CFG_1(3, 13,	fn, sfx, CFG_FLAGS),					\
30 	PORT_GP_CFG_1(3, 14,	fn, sfx, CFG_FLAGS),					\
31 	PORT_GP_CFG_1(3, 15,	fn, sfx, CFG_FLAGS),					\
32 	PORT_GP_CFG_1(3, 16,	fn, sfx, CFG_FLAGS),					\
33 	PORT_GP_CFG_1(3, 17,	fn, sfx, CFG_FLAGS),					\
34 	PORT_GP_CFG_1(3, 18,	fn, sfx, CFG_FLAGS),					\
35 	PORT_GP_CFG_1(3, 19,	fn, sfx, CFG_FLAGS),					\
36 	PORT_GP_CFG_1(3, 20,	fn, sfx, CFG_FLAGS),					\
37 	PORT_GP_CFG_1(3, 21,	fn, sfx, CFG_FLAGS),					\
38 	PORT_GP_CFG_1(3, 22,	fn, sfx, CFG_FLAGS),					\
39 	PORT_GP_CFG_1(3, 23,	fn, sfx, CFG_FLAGS),					\
40 	PORT_GP_CFG_1(3, 24,	fn, sfx, CFG_FLAGS),					\
41 	PORT_GP_CFG_1(3, 25,	fn, sfx, CFG_FLAGS),					\
42 	PORT_GP_CFG_1(3, 26,	fn, sfx, CFG_FLAGS),					\
43 	PORT_GP_CFG_1(3, 27,	fn, sfx, CFG_FLAGS),					\
44 	PORT_GP_CFG_1(3, 28,	fn, sfx, CFG_FLAGS),					\
45 	PORT_GP_CFG_1(3, 29,	fn, sfx, CFG_FLAGS),					\
46 	PORT_GP_CFG_25(4,	fn, sfx, CFG_FLAGS),					\
47 	PORT_GP_CFG_21(5,	fn, sfx, CFG_FLAGS),					\
48 	PORT_GP_CFG_21(6,	fn, sfx, CFG_FLAGS),					\
49 	PORT_GP_CFG_21(7,	fn, sfx, CFG_FLAGS),					\
50 	PORT_GP_CFG_14(8,	fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE_18_33)