Lines Matching +full:pfc +full:- +full:r8a7795
1 // SPDX-License-Identifier: GPL-2.0
8 * Copyright (C) 2009 - 2012 Paul Mundt
11 #define DRV_NAME "sh-pfc"
30 static int sh_pfc_map_resources(struct sh_pfc *pfc, in sh_pfc_map_resources() argument
47 return -EINVAL; in sh_pfc_map_resources()
54 windows = devm_kcalloc(pfc->dev, num_windows, sizeof(*windows), in sh_pfc_map_resources()
57 return -ENOMEM; in sh_pfc_map_resources()
59 pfc->num_windows = num_windows; in sh_pfc_map_resources()
60 pfc->windows = windows; in sh_pfc_map_resources()
63 irqs = devm_kcalloc(pfc->dev, num_irqs, sizeof(*irqs), in sh_pfc_map_resources()
66 return -ENOMEM; in sh_pfc_map_resources()
68 pfc->num_irqs = num_irqs; in sh_pfc_map_resources()
69 pfc->irqs = irqs; in sh_pfc_map_resources()
74 windows->virt = devm_platform_get_and_ioremap_resource(pdev, i, &res); in sh_pfc_map_resources()
75 if (IS_ERR(windows->virt)) in sh_pfc_map_resources()
76 return -ENOMEM; in sh_pfc_map_resources()
77 windows->phys = res->start; in sh_pfc_map_resources()
78 windows->size = resource_size(res); in sh_pfc_map_resources()
87 static void __iomem *sh_pfc_phys_to_virt(struct sh_pfc *pfc, u32 reg) in sh_pfc_phys_to_virt() argument
94 for (i = 0; i < pfc->num_windows; i++) { in sh_pfc_phys_to_virt()
95 window = pfc->windows + i; in sh_pfc_phys_to_virt()
97 if (address < window->phys) in sh_pfc_phys_to_virt()
100 if (address >= (window->phys + window->size)) in sh_pfc_phys_to_virt()
103 return window->virt + (address - window->phys); in sh_pfc_phys_to_virt()
110 int sh_pfc_get_pin_index(struct sh_pfc *pfc, unsigned int pin) in sh_pfc_get_pin_index() argument
115 for (i = 0, offset = 0; i < pfc->nr_ranges; ++i) { in sh_pfc_get_pin_index()
116 const struct sh_pfc_pin_range *range = &pfc->ranges[i]; in sh_pfc_get_pin_index()
118 if (pin <= range->end) in sh_pfc_get_pin_index()
119 return pin >= range->start in sh_pfc_get_pin_index()
120 ? offset + pin - range->start : -1; in sh_pfc_get_pin_index()
122 offset += range->end - range->start + 1; in sh_pfc_get_pin_index()
125 return -EINVAL; in sh_pfc_get_pin_index()
130 if (enum_id < r->begin) in sh_pfc_enum_in_range()
133 if (enum_id > r->end) in sh_pfc_enum_in_range()
172 u32 sh_pfc_read(struct sh_pfc *pfc, u32 reg) in sh_pfc_read() argument
174 return sh_pfc_read_raw_reg(sh_pfc_phys_to_virt(pfc, reg), 32); in sh_pfc_read()
177 static void sh_pfc_unlock_reg(struct sh_pfc *pfc, u32 reg, u32 data) in sh_pfc_unlock_reg() argument
181 if (!pfc->info->unlock_reg) in sh_pfc_unlock_reg()
184 if (pfc->info->unlock_reg >= 0x80000000UL) in sh_pfc_unlock_reg()
185 unlock = pfc->info->unlock_reg; in sh_pfc_unlock_reg()
188 unlock = reg & ~pfc->info->unlock_reg; in sh_pfc_unlock_reg()
190 sh_pfc_write_raw_reg(sh_pfc_phys_to_virt(pfc, unlock), 32, ~data); in sh_pfc_unlock_reg()
193 void sh_pfc_write(struct sh_pfc *pfc, u32 reg, u32 data) in sh_pfc_write() argument
195 sh_pfc_unlock_reg(pfc, reg, data); in sh_pfc_write()
196 sh_pfc_write_raw_reg(sh_pfc_phys_to_virt(pfc, reg), 32, data); in sh_pfc_write()
199 static void sh_pfc_config_reg_helper(struct sh_pfc *pfc, in sh_pfc_config_reg_helper() argument
207 *mapped_regp = sh_pfc_phys_to_virt(pfc, crp->reg); in sh_pfc_config_reg_helper()
209 if (crp->field_width) { in sh_pfc_config_reg_helper()
210 *maskp = (1 << crp->field_width) - 1; in sh_pfc_config_reg_helper()
211 *posp = crp->reg_width - ((in_pos + 1) * crp->field_width); in sh_pfc_config_reg_helper()
213 *maskp = (1 << crp->var_field_width[in_pos]) - 1; in sh_pfc_config_reg_helper()
214 *posp = crp->reg_width; in sh_pfc_config_reg_helper()
216 *posp -= abs(crp->var_field_width[k]); in sh_pfc_config_reg_helper()
220 static void sh_pfc_write_config_reg(struct sh_pfc *pfc, in sh_pfc_write_config_reg() argument
228 sh_pfc_config_reg_helper(pfc, crp, field, &mapped_reg, &mask, &pos); in sh_pfc_write_config_reg()
230 dev_dbg(pfc->dev, "write_reg addr = %x, value = 0x%x, field = %u, " in sh_pfc_write_config_reg()
232 crp->reg, value, field, crp->reg_width, hweight32(mask)); in sh_pfc_write_config_reg()
237 data = sh_pfc_read_raw_reg(mapped_reg, crp->reg_width); in sh_pfc_write_config_reg()
241 sh_pfc_unlock_reg(pfc, crp->reg, data); in sh_pfc_write_config_reg()
242 sh_pfc_write_raw_reg(mapped_reg, crp->reg_width, data); in sh_pfc_write_config_reg()
245 static int sh_pfc_get_config_reg(struct sh_pfc *pfc, u16 enum_id, in sh_pfc_get_config_reg() argument
253 pfc->info->cfg_regs + k; in sh_pfc_get_config_reg()
254 unsigned int r_width = config_reg->reg_width; in sh_pfc_get_config_reg()
255 unsigned int f_width = config_reg->field_width; in sh_pfc_get_config_reg()
271 curr_width = abs(config_reg->var_field_width[m]); in sh_pfc_get_config_reg()
272 if (config_reg->var_field_width[m] < 0) in sh_pfc_get_config_reg()
278 if (config_reg->enum_ids[pos + n] == enum_id) { in sh_pfc_get_config_reg()
290 return -EINVAL; in sh_pfc_get_config_reg()
293 static int sh_pfc_mark_to_enum(struct sh_pfc *pfc, u16 mark, int pos, in sh_pfc_mark_to_enum() argument
296 const u16 *data = pfc->info->pinmux_data; in sh_pfc_mark_to_enum()
304 for (k = 0; k < pfc->info->pinmux_data_size; k++) { in sh_pfc_mark_to_enum()
311 dev_err(pfc->dev, "cannot locate data/mark enum_id for mark %d\n", in sh_pfc_mark_to_enum()
313 return -EINVAL; in sh_pfc_mark_to_enum()
316 int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type) in sh_pfc_config_mux() argument
329 range = &pfc->info->output; in sh_pfc_config_mux()
333 range = &pfc->info->input; in sh_pfc_config_mux()
338 return -EINVAL; in sh_pfc_config_mux()
350 pos = sh_pfc_mark_to_enum(pfc, mark, pos, &enum_id); in sh_pfc_config_mux()
361 in_range = sh_pfc_enum_in_range(enum_id, &pfc->info->function); in sh_pfc_config_mux()
376 * input-only or output-only pins without in sh_pfc_config_mux()
379 if (in_range && enum_id == range->force) in sh_pfc_config_mux()
388 ret = sh_pfc_get_config_reg(pfc, enum_id, &cr, &field, &value); in sh_pfc_config_mux()
392 sh_pfc_write_config_reg(pfc, cr, field, value); in sh_pfc_config_mux()
398 static int sh_pfc_init_ranges(struct sh_pfc *pfc) in sh_pfc_init_ranges() argument
404 if (pfc->info->pins[0].pin == (u16)-1) { in sh_pfc_init_ranges()
405 /* Pin number -1 denotes that the SoC doesn't report pin numbers in sh_pfc_init_ranges()
409 pfc->nr_ranges = 1; in sh_pfc_init_ranges()
410 pfc->ranges = devm_kzalloc(pfc->dev, sizeof(*pfc->ranges), in sh_pfc_init_ranges()
412 if (pfc->ranges == NULL) in sh_pfc_init_ranges()
413 return -ENOMEM; in sh_pfc_init_ranges()
415 pfc->ranges->start = 0; in sh_pfc_init_ranges()
416 pfc->ranges->end = pfc->info->nr_pins - 1; in sh_pfc_init_ranges()
417 pfc->nr_gpio_pins = pfc->info->nr_pins; in sh_pfc_init_ranges()
422 /* Count, allocate and fill the ranges. The PFC SoC data pins array must in sh_pfc_init_ranges()
426 for (i = 1, nr_ranges = 1; i < pfc->info->nr_pins; ++i) { in sh_pfc_init_ranges()
427 if (pfc->info->pins[i-1].pin != pfc->info->pins[i].pin - 1) in sh_pfc_init_ranges()
431 pfc->nr_ranges = nr_ranges; in sh_pfc_init_ranges()
432 pfc->ranges = devm_kcalloc(pfc->dev, nr_ranges, sizeof(*pfc->ranges), in sh_pfc_init_ranges()
434 if (pfc->ranges == NULL) in sh_pfc_init_ranges()
435 return -ENOMEM; in sh_pfc_init_ranges()
437 range = pfc->ranges; in sh_pfc_init_ranges()
438 range->start = pfc->info->pins[0].pin; in sh_pfc_init_ranges()
440 for (i = 1; i < pfc->info->nr_pins; ++i) { in sh_pfc_init_ranges()
441 if (pfc->info->pins[i-1].pin == pfc->info->pins[i].pin - 1) in sh_pfc_init_ranges()
444 range->end = pfc->info->pins[i-1].pin; in sh_pfc_init_ranges()
445 if (!(pfc->info->pins[i-1].configs & SH_PFC_PIN_CFG_NO_GPIO)) in sh_pfc_init_ranges()
446 pfc->nr_gpio_pins = range->end + 1; in sh_pfc_init_ranges()
449 range->start = pfc->info->pins[i].pin; in sh_pfc_init_ranges()
452 range->end = pfc->info->pins[i-1].pin; in sh_pfc_init_ranges()
453 if (!(pfc->info->pins[i-1].configs & SH_PFC_PIN_CFG_NO_GPIO)) in sh_pfc_init_ranges()
454 pfc->nr_gpio_pins = range->end + 1; in sh_pfc_init_ranges()
463 .compatible = "renesas,pfc-emev2",
469 .compatible = "renesas,pfc-r8a73a4",
475 .compatible = "renesas,pfc-r8a7740",
481 .compatible = "renesas,pfc-r8a7742",
487 .compatible = "renesas,pfc-r8a7743",
493 .compatible = "renesas,pfc-r8a7744",
499 .compatible = "renesas,pfc-r8a7745",
505 .compatible = "renesas,pfc-r8a77470",
511 .compatible = "renesas,pfc-r8a774a1",
517 .compatible = "renesas,pfc-r8a774b1",
523 .compatible = "renesas,pfc-r8a774c0",
529 .compatible = "renesas,pfc-r8a774e1",
535 .compatible = "renesas,pfc-r8a7778",
541 .compatible = "renesas,pfc-r8a7779",
547 .compatible = "renesas,pfc-r8a7790",
553 .compatible = "renesas,pfc-r8a7791",
559 .compatible = "renesas,pfc-r8a7792",
565 .compatible = "renesas,pfc-r8a7793",
571 .compatible = "renesas,pfc-r8a7794",
577 .compatible = "renesas,pfc-r8a7795",
583 .compatible = "renesas,pfc-r8a7796",
589 .compatible = "renesas,pfc-r8a77961",
595 .compatible = "renesas,pfc-r8a77965",
601 .compatible = "renesas,pfc-r8a77970",
607 .compatible = "renesas,pfc-r8a77980",
613 .compatible = "renesas,pfc-r8a77990",
619 .compatible = "renesas,pfc-r8a77995",
625 .compatible = "renesas,pfc-r8a779a0",
631 .compatible = "renesas,pfc-r8a779f0",
637 .compatible = "renesas,pfc-r8a779g0",
643 .compatible = "renesas,pfc-sh73a0",
652 static void sh_pfc_nop_reg(struct sh_pfc *pfc, u32 reg, unsigned int idx) in sh_pfc_nop_reg() argument
656 static void sh_pfc_save_reg(struct sh_pfc *pfc, u32 reg, unsigned int idx) in sh_pfc_save_reg() argument
658 pfc->saved_regs[idx] = sh_pfc_read(pfc, reg); in sh_pfc_save_reg()
661 static void sh_pfc_restore_reg(struct sh_pfc *pfc, u32 reg, unsigned int idx) in sh_pfc_restore_reg() argument
663 sh_pfc_write(pfc, reg, pfc->saved_regs[idx]); in sh_pfc_restore_reg()
666 static unsigned int sh_pfc_walk_regs(struct sh_pfc *pfc, in sh_pfc_walk_regs() argument
667 void (*do_reg)(struct sh_pfc *pfc, u32 reg, unsigned int idx)) in sh_pfc_walk_regs() argument
671 if (pfc->info->cfg_regs) in sh_pfc_walk_regs()
672 for (i = 0; pfc->info->cfg_regs[i].reg; i++) in sh_pfc_walk_regs()
673 do_reg(pfc, pfc->info->cfg_regs[i].reg, n++); in sh_pfc_walk_regs()
675 if (pfc->info->drive_regs) in sh_pfc_walk_regs()
676 for (i = 0; pfc->info->drive_regs[i].reg; i++) in sh_pfc_walk_regs()
677 do_reg(pfc, pfc->info->drive_regs[i].reg, n++); in sh_pfc_walk_regs()
679 if (pfc->info->bias_regs) in sh_pfc_walk_regs()
680 for (i = 0; pfc->info->bias_regs[i].puen || in sh_pfc_walk_regs()
681 pfc->info->bias_regs[i].pud; i++) { in sh_pfc_walk_regs()
682 if (pfc->info->bias_regs[i].puen) in sh_pfc_walk_regs()
683 do_reg(pfc, pfc->info->bias_regs[i].puen, n++); in sh_pfc_walk_regs()
684 if (pfc->info->bias_regs[i].pud) in sh_pfc_walk_regs()
685 do_reg(pfc, pfc->info->bias_regs[i].pud, n++); in sh_pfc_walk_regs()
688 if (pfc->info->ioctrl_regs) in sh_pfc_walk_regs()
689 for (i = 0; pfc->info->ioctrl_regs[i].reg; i++) in sh_pfc_walk_regs()
690 do_reg(pfc, pfc->info->ioctrl_regs[i].reg, n++); in sh_pfc_walk_regs()
695 static int sh_pfc_suspend_init(struct sh_pfc *pfc) in sh_pfc_suspend_init() argument
703 n = sh_pfc_walk_regs(pfc, sh_pfc_nop_reg); in sh_pfc_suspend_init()
707 pfc->saved_regs = devm_kmalloc_array(pfc->dev, n, in sh_pfc_suspend_init()
708 sizeof(*pfc->saved_regs), in sh_pfc_suspend_init()
710 if (!pfc->saved_regs) in sh_pfc_suspend_init()
711 return -ENOMEM; in sh_pfc_suspend_init()
713 dev_dbg(pfc->dev, "Allocated space to save %u regs\n", n); in sh_pfc_suspend_init()
719 struct sh_pfc *pfc = dev_get_drvdata(dev); in sh_pfc_suspend_noirq() local
721 if (pfc->saved_regs) in sh_pfc_suspend_noirq()
722 sh_pfc_walk_regs(pfc, sh_pfc_save_reg); in sh_pfc_suspend_noirq()
728 struct sh_pfc *pfc = dev_get_drvdata(dev); in sh_pfc_resume_noirq() local
730 if (pfc->saved_regs) in sh_pfc_resume_noirq()
731 sh_pfc_walk_regs(pfc, sh_pfc_restore_reg); in sh_pfc_resume_noirq()
736 static int sh_pfc_suspend_init(struct sh_pfc *pfc) { return 0; } in sh_pfc_suspend_init() argument
829 return -EINVAL; in sh_pfc_check_enum()
856 const char *drvname = info->name; in sh_pfc_find_pin()
862 for (i = 0; i < info->nr_pins; i++) { in sh_pfc_find_pin()
863 if (pin == info->pins[i].pin) in sh_pfc_find_pin()
864 return &info->pins[i]; in sh_pfc_find_pin()
877 sh_pfc_check_reg(drvname, cfg_reg->reg, in sh_pfc_check_cfg_reg()
878 GENMASK(cfg_reg->reg_width - 1, 0)); in sh_pfc_check_cfg_reg()
880 if (cfg_reg->field_width) { in sh_pfc_check_cfg_reg()
881 fw = cfg_reg->field_width; in sh_pfc_check_cfg_reg()
882 n = (cfg_reg->reg_width / fw) << fw; in sh_pfc_check_cfg_reg()
884 if (is0s(&cfg_reg->enum_ids[i], 1 << fw)) in sh_pfc_check_cfg_reg()
888 if ((r << fw) * sizeof(u16) > cfg_reg->reg_width / fw) in sh_pfc_check_cfg_reg()
889 sh_pfc_warn("reg 0x%x can be described with variable-width reserved fields\n", in sh_pfc_check_cfg_reg()
890 cfg_reg->reg); in sh_pfc_check_cfg_reg()
896 for (i = 0, n = 0, rw = 0; (fw = cfg_reg->var_field_width[i]); i++) { in sh_pfc_check_cfg_reg()
898 rw += -fw; in sh_pfc_check_cfg_reg()
900 if (is0s(&cfg_reg->enum_ids[n], 1 << fw)) in sh_pfc_check_cfg_reg()
902 cfg_reg->reg, rw, rw + fw - 1); in sh_pfc_check_cfg_reg()
908 if (rw != cfg_reg->reg_width) in sh_pfc_check_cfg_reg()
910 cfg_reg->reg, rw, cfg_reg->reg_width); in sh_pfc_check_cfg_reg()
912 if (n != cfg_reg->nr_enum_ids) { in sh_pfc_check_cfg_reg()
914 cfg_reg->reg, cfg_reg->nr_enum_ids, n); in sh_pfc_check_cfg_reg()
915 n = cfg_reg->nr_enum_ids; in sh_pfc_check_cfg_reg()
919 sh_pfc_check_reg_enums(drvname, cfg_reg->reg, cfg_reg->enum_ids, n); in sh_pfc_check_cfg_reg()
925 const char *drvname = info->name; in sh_pfc_check_drive_reg()
929 for (i = 0; i < ARRAY_SIZE(drive->fields); i++) { in sh_pfc_check_drive_reg()
930 const struct pinmux_drive_reg_field *field = &drive->fields[i]; in sh_pfc_check_drive_reg()
932 if (!field->pin && !field->offset && !field->size) in sh_pfc_check_drive_reg()
935 sh_pfc_check_reg(info->name, drive->reg, in sh_pfc_check_drive_reg()
936 GENMASK(field->offset + field->size - 1, in sh_pfc_check_drive_reg()
937 field->offset)); in sh_pfc_check_drive_reg()
939 pin = sh_pfc_find_pin(info, drive->reg, field->pin); in sh_pfc_check_drive_reg()
940 if (pin && !(pin->configs & SH_PFC_PIN_CFG_DRIVE_STRENGTH)) in sh_pfc_check_drive_reg()
942 drive->reg, i, pin->name); in sh_pfc_check_drive_reg()
949 const char *drvname = info->name; in sh_pfc_check_bias_reg()
954 for (i = 0, bits = 0; i < ARRAY_SIZE(bias->pins); i++) in sh_pfc_check_bias_reg()
955 if (bias->pins[i] != SH_PFC_PIN_NONE) in sh_pfc_check_bias_reg()
958 if (bias->puen) in sh_pfc_check_bias_reg()
959 sh_pfc_check_reg(info->name, bias->puen, bits); in sh_pfc_check_bias_reg()
960 if (bias->pud) in sh_pfc_check_bias_reg()
961 sh_pfc_check_reg(info->name, bias->pud, bits); in sh_pfc_check_bias_reg()
962 for (i = 0; i < ARRAY_SIZE(bias->pins); i++) { in sh_pfc_check_bias_reg()
963 pin = sh_pfc_find_pin(info, bias->puen, bias->pins[i]); in sh_pfc_check_bias_reg()
967 if (bias->puen && bias->pud) { in sh_pfc_check_bias_reg()
969 * Pull-enable and pull-up/down control registers in sh_pfc_check_bias_reg()
970 * As some SoCs have pins that support only pull-up in sh_pfc_check_bias_reg()
971 * or pull-down, we just check for one of them in sh_pfc_check_bias_reg()
973 if (!(pin->configs & SH_PFC_PIN_CFG_PULL_UP_DOWN)) in sh_pfc_check_bias_reg()
975 bias->puen, i, pin->name); in sh_pfc_check_bias_reg()
976 } else if (bias->puen) { in sh_pfc_check_bias_reg()
977 /* Pull-up control register only */ in sh_pfc_check_bias_reg()
978 if (!(pin->configs & SH_PFC_PIN_CFG_PULL_UP)) in sh_pfc_check_bias_reg()
980 bias->puen, i, pin->name); in sh_pfc_check_bias_reg()
981 } else if (bias->pud) { in sh_pfc_check_bias_reg()
982 /* Pull-down control register only */ in sh_pfc_check_bias_reg()
983 if (!(pin->configs & SH_PFC_PIN_CFG_PULL_DOWN)) in sh_pfc_check_bias_reg()
985 bias->pud, i, pin->name); in sh_pfc_check_bias_reg()
997 if (same_name(a->name, b->name)) in sh_pfc_compare_groups()
998 sh_pfc_err("group %s: name conflict\n", a->name); in sh_pfc_compare_groups()
1000 if (a->nr_pins > b->nr_pins) in sh_pfc_compare_groups()
1003 len = a->nr_pins * sizeof(a->pins[0]); in sh_pfc_compare_groups()
1004 for (i = 0; i <= b->nr_pins - a->nr_pins; i++) { in sh_pfc_compare_groups()
1005 if (a->pins == b->pins + i || a->mux == b->mux + i || in sh_pfc_compare_groups()
1006 memcmp(a->pins, b->pins + i, len) || in sh_pfc_compare_groups()
1007 memcmp(a->mux, b->mux + i, len)) in sh_pfc_compare_groups()
1010 if (a->nr_pins == b->nr_pins) in sh_pfc_compare_groups()
1012 a->name, b->name); in sh_pfc_compare_groups()
1014 sh_pfc_warn("group %s is a subset of %s\n", a->name, in sh_pfc_compare_groups()
1015 b->name); in sh_pfc_compare_groups()
1021 const struct pinmux_drive_reg *drive_regs = info->drive_regs; in sh_pfc_check_info()
1022 #define drive_nfields ARRAY_SIZE(drive_regs->fields) in sh_pfc_check_info()
1027 const struct pinmux_bias_reg *bias_regs = info->bias_regs; in sh_pfc_check_info()
1028 #define bias_npins ARRAY_SIZE(bias_regs->pins) in sh_pfc_check_info()
1034 const char *drvname = info->name; in sh_pfc_check_info()
1046 for (i = 0; i < info->nr_pins; i++) { in sh_pfc_check_info()
1047 const struct sh_pfc_pin *pin = &info->pins[i]; in sh_pfc_check_info()
1050 if (!pin->name) { in sh_pfc_check_info()
1055 const struct sh_pfc_pin *pin2 = &info->pins[j]; in sh_pfc_check_info()
1057 if (same_name(pin->name, pin2->name)) in sh_pfc_check_info()
1059 pin->name); in sh_pfc_check_info()
1061 if (pin->pin != (u16)-1 && pin->pin == pin2->pin) in sh_pfc_check_info()
1063 pin->name, pin2->name, pin->pin); in sh_pfc_check_info()
1065 if (pin->enum_id && pin->enum_id == pin2->enum_id) in sh_pfc_check_info()
1067 pin->name, pin2->name, in sh_pfc_check_info()
1068 pin->enum_id); in sh_pfc_check_info()
1071 if (pin->configs & SH_PFC_PIN_CFG_PULL_UP_DOWN) { in sh_pfc_check_info()
1072 if (!info->ops || !info->ops->get_bias || in sh_pfc_check_info()
1073 !info->ops->set_bias) in sh_pfc_check_info()
1077 (!info->ops || !info->ops->pin_to_portcr)) in sh_pfc_check_info()
1081 if ((pin->configs & SH_PFC_PIN_CFG_PULL_UP_DOWN) && bias_regs) { in sh_pfc_check_info()
1083 rcar_pin_to_bias_reg(info, pin->pin, &x); in sh_pfc_check_info()
1086 ((pin->configs & SH_PFC_PIN_CFG_PULL_UP) && in sh_pfc_check_info()
1087 !bias_reg->puen)) in sh_pfc_check_info()
1089 pin->name); in sh_pfc_check_info()
1092 ((pin->configs & SH_PFC_PIN_CFG_PULL_DOWN) && in sh_pfc_check_info()
1093 !bias_reg->pud)) in sh_pfc_check_info()
1095 pin->name); in sh_pfc_check_info()
1098 if (pin->configs & SH_PFC_PIN_CFG_DRIVE_STRENGTH) { in sh_pfc_check_info()
1108 if (drive_field(j).pin == pin->pin) in sh_pfc_check_info()
1114 pin->name); in sh_pfc_check_info()
1118 if (pin->configs & SH_PFC_PIN_CFG_IO_VOLTAGE_MASK) { in sh_pfc_check_info()
1119 if (!info->ops || !info->ops->pin_to_pocctrl) in sh_pfc_check_info()
1121 else if (info->ops->pin_to_pocctrl(pin->pin, &x) < 0) in sh_pfc_check_info()
1123 pin->name); in sh_pfc_check_info()
1124 } else if (info->ops && info->ops->pin_to_pocctrl && in sh_pfc_check_info()
1125 info->ops->pin_to_pocctrl(pin->pin, &x) >= 0) { in sh_pfc_check_info()
1127 pin->name); in sh_pfc_check_info()
1132 refcnts = kcalloc(info->nr_groups, sizeof(*refcnts), GFP_KERNEL); in sh_pfc_check_info()
1136 for (i = 0; i < info->nr_functions; i++) { in sh_pfc_check_info()
1137 const struct sh_pfc_function *func = &info->functions[i]; in sh_pfc_check_info()
1139 if (!func->name) { in sh_pfc_check_info()
1144 if (same_name(func->name, info->functions[j].name)) in sh_pfc_check_info()
1146 func->name); in sh_pfc_check_info()
1148 for (j = 0; j < func->nr_groups; j++) { in sh_pfc_check_info()
1149 for (k = 0; k < info->nr_groups; k++) { in sh_pfc_check_info()
1150 if (same_name(func->groups[j], in sh_pfc_check_info()
1151 info->groups[k].name)) { in sh_pfc_check_info()
1157 if (k == info->nr_groups) in sh_pfc_check_info()
1159 func->name, func->groups[j]); in sh_pfc_check_info()
1163 for (i = 0; i < info->nr_groups; i++) { in sh_pfc_check_info()
1164 const struct sh_pfc_pin_group *group = &info->groups[i]; in sh_pfc_check_info()
1166 if (!group->name) { in sh_pfc_check_info()
1171 sh_pfc_compare_groups(drvname, group, &info->groups[j]); in sh_pfc_check_info()
1174 sh_pfc_err("orphan group %s\n", group->name); in sh_pfc_check_info()
1177 group->name, refcnts[i]); in sh_pfc_check_info()
1183 for (i = 0; info->cfg_regs && info->cfg_regs[i].reg; i++) in sh_pfc_check_info()
1184 sh_pfc_check_cfg_reg(drvname, &info->cfg_regs[i]); in sh_pfc_check_info()
1229 for (i = 0; info->ioctrl_regs && info->ioctrl_regs[i].reg; i++) in sh_pfc_check_info()
1230 sh_pfc_check_reg(drvname, info->ioctrl_regs[i].reg, U32_MAX); in sh_pfc_check_info()
1233 for (i = 0; info->data_regs && info->data_regs[i].reg; i++) { in sh_pfc_check_info()
1234 sh_pfc_check_reg(drvname, info->data_regs[i].reg, in sh_pfc_check_info()
1235 GENMASK(info->data_regs[i].reg_width - 1, 0)); in sh_pfc_check_info()
1236 sh_pfc_check_reg_enums(drvname, info->data_regs[i].reg, in sh_pfc_check_info()
1237 info->data_regs[i].enum_ids, in sh_pfc_check_info()
1238 info->data_regs[i].reg_width); in sh_pfc_check_info()
1243 for (i = 0; i < info->nr_func_gpios; i++) { in sh_pfc_check_info()
1244 const struct pinmux_func *func = &info->func_gpios[i]; in sh_pfc_check_info()
1246 if (!func->name) { in sh_pfc_check_info()
1251 if (same_name(func->name, info->func_gpios[j].name)) in sh_pfc_check_info()
1253 func->name); in sh_pfc_check_info()
1255 if (sh_pfc_check_enum(drvname, func->enum_id)) in sh_pfc_check_info()
1256 sh_pfc_err("%s enum_id %u conflict\n", func->name, in sh_pfc_check_info()
1257 func->enum_id); in sh_pfc_check_info()
1267 !of_find_matching_node(NULL, pdrv->driver.of_match_table)) in sh_pfc_check_driver()
1282 for (i = 0; pdrv->id_table[i].name[0]; i++) in sh_pfc_check_driver()
1283 sh_pfc_check_info((void *)pdrv->id_table[i].driver_data); in sh_pfc_check_driver()
1286 for (i = 0; pdrv->driver.of_match_table[i].compatible[0]; i++) in sh_pfc_check_driver()
1287 sh_pfc_check_info(pdrv->driver.of_match_table[i].data); in sh_pfc_check_driver()
1305 struct sh_pfc *pfc; in sh_pfc_probe() local
1308 if (pdev->dev.of_node) in sh_pfc_probe()
1309 info = of_device_get_match_data(&pdev->dev); in sh_pfc_probe()
1311 info = (const void *)platform_get_device_id(pdev)->driver_data; in sh_pfc_probe()
1313 pfc = devm_kzalloc(&pdev->dev, sizeof(*pfc), GFP_KERNEL); in sh_pfc_probe()
1314 if (pfc == NULL) in sh_pfc_probe()
1315 return -ENOMEM; in sh_pfc_probe()
1317 pfc->info = info; in sh_pfc_probe()
1318 pfc->dev = &pdev->dev; in sh_pfc_probe()
1320 ret = sh_pfc_map_resources(pfc, pdev); in sh_pfc_probe()
1324 spin_lock_init(&pfc->lock); in sh_pfc_probe()
1326 if (info->ops && info->ops->init) { in sh_pfc_probe()
1327 ret = info->ops->init(pfc); in sh_pfc_probe()
1331 /* .init() may have overridden pfc->info */ in sh_pfc_probe()
1332 info = pfc->info; in sh_pfc_probe()
1335 ret = sh_pfc_suspend_init(pfc); in sh_pfc_probe()
1343 ret = sh_pfc_init_ranges(pfc); in sh_pfc_probe()
1350 ret = sh_pfc_register_pinctrl(pfc); in sh_pfc_probe()
1358 ret = sh_pfc_register_gpiochip(pfc); in sh_pfc_probe()
1362 * PFC state as it is, given that there are already in sh_pfc_probe()
1365 dev_notice(pfc->dev, "failed to init GPIO chip, ignoring...\n"); in sh_pfc_probe()
1369 platform_set_drvdata(pdev, pfc); in sh_pfc_probe()
1371 dev_info(pfc->dev, "%s support registered\n", info->name); in sh_pfc_probe()
1378 { "pfc-sh7203", (kernel_ulong_t)&sh7203_pinmux_info },
1381 { "pfc-sh7264", (kernel_ulong_t)&sh7264_pinmux_info },
1384 { "pfc-sh7269", (kernel_ulong_t)&sh7269_pinmux_info },
1387 { "pfc-sh7720", (kernel_ulong_t)&sh7720_pinmux_info },
1390 { "pfc-sh7722", (kernel_ulong_t)&sh7722_pinmux_info },
1393 { "pfc-sh7723", (kernel_ulong_t)&sh7723_pinmux_info },
1396 { "pfc-sh7724", (kernel_ulong_t)&sh7724_pinmux_info },
1399 { "pfc-sh7734", (kernel_ulong_t)&sh7734_pinmux_info },
1402 { "pfc-sh7757", (kernel_ulong_t)&sh7757_pinmux_info },
1405 { "pfc-sh7785", (kernel_ulong_t)&sh7785_pinmux_info },
1408 { "pfc-sh7786", (kernel_ulong_t)&sh7786_pinmux_info },
1411 { "pfc-shx3", (kernel_ulong_t)&shx3_pinmux_info },