drivers/pinctrl/pinctrl-tb10x.c

28 #define TB10X_PORT5 (128)  macro
89 	PINCTRL_PIN(TB10X_PORT5 +  0, "PC_CE1N"),
90 	PINCTRL_PIN(TB10X_PORT5 +  1, "PC_CE2N"),
91 	PINCTRL_PIN(TB10X_PORT5 +  2, "PC_REGN"),
92 	PINCTRL_PIN(TB10X_PORT5 +  3, "PC_INPACKN"),
93 	PINCTRL_PIN(TB10X_PORT5 +  4, "PC_OEN"),
94 	PINCTRL_PIN(TB10X_PORT5 +  5, "PC_WEN"),
95 	PINCTRL_PIN(TB10X_PORT5 +  6, "PC_IORDN"),
96 	PINCTRL_PIN(TB10X_PORT5 +  7, "PC_IOWRN"),
97 	PINCTRL_PIN(TB10X_PORT5 +  8, "PC_RDYIRQN"),
98 	PINCTRL_PIN(TB10X_PORT5 +  9, "PC_WAITN"),
99 	PINCTRL_PIN(TB10X_PORT5 + 10, "PC_A0"),
100 	PINCTRL_PIN(TB10X_PORT5 + 11, "PC_A1"),
101 	PINCTRL_PIN(TB10X_PORT5 + 12, "PC_A2"),
102 	PINCTRL_PIN(TB10X_PORT5 + 13, "PC_A3"),
103 	PINCTRL_PIN(TB10X_PORT5 + 14, "PC_A4"),
104 	PINCTRL_PIN(TB10X_PORT5 + 15, "PC_A5"),
105 	PINCTRL_PIN(TB10X_PORT5 + 16, "PC_A6"),
106 	PINCTRL_PIN(TB10X_PORT5 + 17, "PC_A7"),
107 	PINCTRL_PIN(TB10X_PORT5 + 18, "PC_A8"),
108 	PINCTRL_PIN(TB10X_PORT5 + 19, "PC_A9"),
109 	PINCTRL_PIN(TB10X_PORT5 + 20, "PC_A10"),
110 	PINCTRL_PIN(TB10X_PORT5 + 21, "PC_A11"),
111 	PINCTRL_PIN(TB10X_PORT5 + 22, "PC_A12"),
112 	PINCTRL_PIN(TB10X_PORT5 + 23, "PC_A13"),
113 	PINCTRL_PIN(TB10X_PORT5 + 24, "PC_A14"),
114 	PINCTRL_PIN(TB10X_PORT5 + 25, "PC_D0"),
115 	PINCTRL_PIN(TB10X_PORT5 + 26, "PC_D1"),
116 	PINCTRL_PIN(TB10X_PORT5 + 27, "PC_D2"),
117 	PINCTRL_PIN(TB10X_PORT5 + 28, "PC_D3"),
118 	PINCTRL_PIN(TB10X_PORT5 + 29, "PC_D4"),
119 	PINCTRL_PIN(TB10X_PORT5 + 30, "PC_D5"),
120 	PINCTRL_PIN(TB10X_PORT5 + 31, "PC_D6"),
121 	PINCTRL_PIN(TB10X_PORT5 + 32, "PC_D7"),
122 	PINCTRL_PIN(TB10X_PORT5 + 33, "PC_MOSTRT"),
123 	PINCTRL_PIN(TB10X_PORT5 + 34, "PC_MOVAL"),
124 	PINCTRL_PIN(TB10X_PORT5 + 35, "PC_MDO0"),
125 	PINCTRL_PIN(TB10X_PORT5 + 36, "PC_MDO1"),
126 	PINCTRL_PIN(TB10X_PORT5 + 37, "PC_MDO2"),
127 	PINCTRL_PIN(TB10X_PORT5 + 38, "PC_MDO3"),
128 	PINCTRL_PIN(TB10X_PORT5 + 39, "PC_MDO4"),
129 	PINCTRL_PIN(TB10X_PORT5 + 40, "PC_MDO5"),
130 	PINCTRL_PIN(TB10X_PORT5 + 41, "PC_MDO6"),
131 	PINCTRL_PIN(TB10X_PORT5 + 42, "PC_MDO7"),
132 	PINCTRL_PIN(TB10X_PORT5 + 43, "PC_MISTRT"),
133 	PINCTRL_PIN(TB10X_PORT5 + 44, "PC_MIVAL"),
134 	PINCTRL_PIN(TB10X_PORT5 + 45, "PC_MDI0"),
135 	PINCTRL_PIN(TB10X_PORT5 + 46, "PC_MDI1"),
136 	PINCTRL_PIN(TB10X_PORT5 + 47, "PC_MDI2"),
137 	PINCTRL_PIN(TB10X_PORT5 + 48, "PC_MDI3"),
138 	PINCTRL_PIN(TB10X_PORT5 + 49, "PC_MDI4"),
139 	PINCTRL_PIN(TB10X_PORT5 + 50, "PC_MDI5"),
140 	PINCTRL_PIN(TB10X_PORT5 + 51, "PC_MDI6"),
141 	PINCTRL_PIN(TB10X_PORT5 + 52, "PC_MDI7"),
142 	PINCTRL_PIN(TB10X_PORT5 + 53, "PC_MICLK"),
304 static const unsigned gpioj_pins[] = {	TB10X_PORT5 + 0, TB10X_PORT5 + 1,
305 					TB10X_PORT5 + 2, TB10X_PORT5 + 3,
306 					TB10X_PORT5 + 4, TB10X_PORT5 + 5,
307 					TB10X_PORT5 + 6, TB10X_PORT5 + 7,
308 					TB10X_PORT5 + 8, TB10X_PORT5 + 9,
309 					TB10X_PORT5 + 10, TB10X_PORT5 + 11,
310 					TB10X_PORT5 + 12, TB10X_PORT5 + 13,
311 					TB10X_PORT5 + 14, TB10X_PORT5 + 15,
312 					TB10X_PORT5 + 16, TB10X_PORT5 + 17,
313 					TB10X_PORT5 + 18, TB10X_PORT5 + 19,
314 					TB10X_PORT5 + 20, TB10X_PORT5 + 21,
315 					TB10X_PORT5 + 22, TB10X_PORT5 + 23,
316 					TB10X_PORT5 + 24, TB10X_PORT5 + 25,
317 					TB10X_PORT5 + 26, TB10X_PORT5 + 27,
318 					TB10X_PORT5 + 28, TB10X_PORT5 + 29,
319 					TB10X_PORT5 + 30, TB10X_PORT5 + 31};
320 static const unsigned gpiok_pins[] = {	TB10X_PORT5 + 32, TB10X_PORT5 + 33,
321 					TB10X_PORT5 + 34, TB10X_PORT5 + 35,
322 					TB10X_PORT5 + 36, TB10X_PORT5 + 37,
323 					TB10X_PORT5 + 38, TB10X_PORT5 + 39,
324 					TB10X_PORT5 + 40, TB10X_PORT5 + 41,
325 					TB10X_PORT5 + 42, TB10X_PORT5 + 43,
326 					TB10X_PORT5 + 44, TB10X_PORT5 + 45,
327 					TB10X_PORT5 + 46, TB10X_PORT5 + 47,
328 					TB10X_PORT5 + 48, TB10X_PORT5 + 49,
329 					TB10X_PORT5 + 50, TB10X_PORT5 + 51,
330 					TB10X_PORT5 + 52, TB10X_PORT5 + 53};
331 static const unsigned ciplus_pins[] = {	TB10X_PORT5 + 0, TB10X_PORT5 + 1,
332 					TB10X_PORT5 + 2, TB10X_PORT5 + 3,
333 					TB10X_PORT5 + 4, TB10X_PORT5 + 5,
334 					TB10X_PORT5 + 6, TB10X_PORT5 + 7,
335 					TB10X_PORT5 + 8, TB10X_PORT5 + 9,
336 					TB10X_PORT5 + 10, TB10X_PORT5 + 11,
337 					TB10X_PORT5 + 12, TB10X_PORT5 + 13,
338 					TB10X_PORT5 + 14, TB10X_PORT5 + 15,
339 					TB10X_PORT5 + 16, TB10X_PORT5 + 17,
340 					TB10X_PORT5 + 18, TB10X_PORT5 + 19,
341 					TB10X_PORT5 + 20, TB10X_PORT5 + 21,
342 					TB10X_PORT5 + 22, TB10X_PORT5 + 23,
343 					TB10X_PORT5 + 24, TB10X_PORT5 + 25,
344 					TB10X_PORT5 + 26, TB10X_PORT5 + 27,
345 					TB10X_PORT5 + 28, TB10X_PORT5 + 29,
346 					TB10X_PORT5 + 30, TB10X_PORT5 + 31,
347 					TB10X_PORT5 + 32, TB10X_PORT5 + 33,
348 					TB10X_PORT5 + 34, TB10X_PORT5 + 35,
349 					TB10X_PORT5 + 36, TB10X_PORT5 + 37,
350 					TB10X_PORT5 + 38, TB10X_PORT5 + 39,
351 					TB10X_PORT5 + 40, TB10X_PORT5 + 41,
352 					TB10X_PORT5 + 42, TB10X_PORT5 + 43,
353 					TB10X_PORT5 + 44, TB10X_PORT5 + 45,
354 					TB10X_PORT5 + 46, TB10X_PORT5 + 47,
355 					TB10X_PORT5 + 48, TB10X_PORT5 + 49,
356 					TB10X_PORT5 + 50, TB10X_PORT5 + 51,
357 					TB10X_PORT5 + 52, TB10X_PORT5 + 53};
358 static const unsigned mcard_pins[] = {	TB10X_PORT5 + 3, TB10X_PORT5 + 10,
359 					TB10X_PORT5 + 11, TB10X_PORT5 + 12,
360 					TB10X_PORT5 + 22, TB10X_PORT5 + 23,
361 					TB10X_PORT5 + 33, TB10X_PORT5 + 35,
362 					TB10X_PORT5 + 36, TB10X_PORT5 + 37,
363 					TB10X_PORT5 + 38, TB10X_PORT5 + 39,
364 					TB10X_PORT5 + 40, TB10X_PORT5 + 41,
365 					TB10X_PORT5 + 42, TB10X_PORT5 + 43,
366 					TB10X_PORT5 + 45, TB10X_PORT5 + 46,
367 					TB10X_PORT5 + 47, TB10X_PORT5 + 48,
368 					TB10X_PORT5 + 49, TB10X_PORT5 + 50,
369 					TB10X_PORT5 + 51, TB10X_PORT5 + 52,
370 					TB10X_PORT5 + 53};
371 static const unsigned stc0_pins[] = {	TB10X_PORT5 + 34, TB10X_PORT5 + 35,
372 					TB10X_PORT5 + 36, TB10X_PORT5 + 37,
373 					TB10X_PORT5 + 38, TB10X_PORT5 + 39,
374 					TB10X_PORT5 + 40};
375 static const unsigned stc1_pins[] = {	TB10X_PORT5 + 25, TB10X_PORT5 + 26,
376 					TB10X_PORT5 + 27, TB10X_PORT5 + 28,
377 					TB10X_PORT5 + 29, TB10X_PORT5 + 30,
378 					TB10X_PORT5 + 44};