117 	void __iomem *base1;  member
890 	unsigned int val = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_gpio_invert()
899 	keembay_write_reg(val, kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_gpio_invert()
904 	unsigned int val = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_gpio_restore_default()
907 	keembay_write_reg(val, kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_gpio_restore_default()
919 	val = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_request_gpio()
951 	val = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_set_mux()
953 	keembay_write_reg(val, kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_set_mux()
960 	unsigned int val = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_pinconf_get_pull()
968 	unsigned int val = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_pinconf_set_pull()
971 	keembay_write_reg(val, kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_pinconf_set_pull()
978 	unsigned int val = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_pinconf_get_drive()
990 	unsigned int val = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_pinconf_set_drive()
995 	keembay_write_reg(val, kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_pinconf_set_drive()
1002 	unsigned int val = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_pinconf_get_slew_rate()
1010 	unsigned int val = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_pinconf_set_slew_rate()
1017 	keembay_write_reg(val, kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_pinconf_set_slew_rate()
1024 	unsigned int val = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_pinconf_get_schmitt()
1032 	unsigned int val = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_pinconf_set_schmitt()
1039 	keembay_write_reg(val, kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_pinconf_set_schmitt()
1185 	val = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_gpio_get()
1208 	unsigned int val = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_gpio_get_direction()
1218 	val = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_gpio_set_direction_in()
1220 	keembay_write_reg(val, kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_gpio_set_direction_in()
1231 	val = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_gpio_set_direction_out()
1233 	keembay_write_reg(val, kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_gpio_set_direction_out()
1261 	reg = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_INT_CFG, src);  in keembay_gpio_irq_handler()
1294 	val = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_INT_CFG, src);  in keembay_gpio_clear_irq()
1297 	keembay_write_reg(val, kpc->base1 + KEEMBAY_GPIO_INT_CFG, src);  in keembay_gpio_clear_irq()
1313 	unsigned long val = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_INT_CFG, src);  in keembay_find_free_slot()
1331 		if (!keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_INT_CFG, src) ||  in keembay_find_free_src()
1347 	reg = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_INT_CFG, src);  in keembay_gpio_set_irq()
1349 	keembay_write_reg(reg, kpc->base1 + KEEMBAY_GPIO_INT_CFG, src);  in keembay_gpio_set_irq()
1405 		reg = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_INT_CFG, src);  in keembay_gpio_irq_disable()
1676 	kpc->base1 = devm_platform_ioremap_resource(pdev, 1);  in keembay_pinctrl_probe()
1677 	if (IS_ERR(kpc->base1))  in keembay_pinctrl_probe()
1678 		return PTR_ERR(kpc->base1);  in keembay_pinctrl_probe()