Lines Matching +full:off +full:- +full:chip
1 // SPDX-License-Identifier: GPL-2.0-only
27 #include <linux/pinctrl/pinconf-generic.h>
82 { "irq-gpios", &cy8c95x0_irq_gpios, 1, ACPI_GPIO_QUIRK_ABSOLUTE_NUMBER },
94 ret = acpi_dev_gpio_irq_get_by(ACPI_COMPANION(dev), "irq-gpios", 0); in cy8c95x0_acpi_get_irq()
107 * Since first controller (gpio-sch.c) and second
108 * (gpio-dwapb.c) are at the fixed bases, we may safely
126 * struct cy8c95x0_pinctrl - driver data
137 * @nport: Number of Gports in this chip
138 * @gpio_chip: gpiolib chip
144 * @name: Chip controller name
310 static int cy8c95x0_pinmux_direction(struct cy8c95x0_pinctrl *chip,
313 static inline u8 cypress_get_port(struct cy8c95x0_pinctrl *chip, unsigned int pin) in cypress_get_port() argument
319 static int cypress_get_pin_mask(struct cy8c95x0_pinctrl *chip, unsigned int pin) in cypress_get_pin_mask() argument
410 static int cy8c95x0_write_regs_mask(struct cy8c95x0_pinctrl *chip, int reg, in cy8c95x0_write_regs_mask() argument
417 int i, off = 0; in cy8c95x0_write_regs_mask() local
421 bitmap_andnot(tmask, mask, chip->shiftmask, MAX_LINE); in cy8c95x0_write_regs_mask()
423 bitmap_replace(tmask, tmask, mask, chip->shiftmask, BANK_SZ * 3); in cy8c95x0_write_regs_mask()
425 bitmap_andnot(tval, val, chip->shiftmask, MAX_LINE); in cy8c95x0_write_regs_mask()
427 bitmap_replace(tval, tval, val, chip->shiftmask, BANK_SZ * 3); in cy8c95x0_write_regs_mask()
429 mutex_lock(&chip->i2c_lock); in cy8c95x0_write_regs_mask()
430 for (i = 0; i < chip->nport; i++) { in cy8c95x0_write_regs_mask()
449 ret = regmap_write(chip->regmap, CY8C95X0_PORTSEL, i); in cy8c95x0_write_regs_mask()
452 off = reg; in cy8c95x0_write_regs_mask()
458 off = reg + i; in cy8c95x0_write_regs_mask()
461 ret = -EINVAL; in cy8c95x0_write_regs_mask()
467 ret = regmap_update_bits(chip->regmap, off, bits, write_val); in cy8c95x0_write_regs_mask()
472 mutex_unlock(&chip->i2c_lock); in cy8c95x0_write_regs_mask()
475 dev_err(chip->dev, "failed writing register %d: err %d\n", off, ret); in cy8c95x0_write_regs_mask()
480 static int cy8c95x0_read_regs_mask(struct cy8c95x0_pinctrl *chip, int reg, in cy8c95x0_read_regs_mask() argument
488 int i, off = 0; in cy8c95x0_read_regs_mask() local
492 bitmap_andnot(tmask, mask, chip->shiftmask, MAX_LINE); in cy8c95x0_read_regs_mask()
494 bitmap_replace(tmask, tmask, mask, chip->shiftmask, BANK_SZ * 3); in cy8c95x0_read_regs_mask()
496 bitmap_andnot(tval, val, chip->shiftmask, MAX_LINE); in cy8c95x0_read_regs_mask()
498 bitmap_replace(tval, tval, val, chip->shiftmask, BANK_SZ * 3); in cy8c95x0_read_regs_mask()
500 mutex_lock(&chip->i2c_lock); in cy8c95x0_read_regs_mask()
501 for (i = 0; i < chip->nport; i++) { in cy8c95x0_read_regs_mask()
520 ret = regmap_write(chip->regmap, CY8C95X0_PORTSEL, i); in cy8c95x0_read_regs_mask()
523 off = reg; in cy8c95x0_read_regs_mask()
529 off = reg + i; in cy8c95x0_read_regs_mask()
532 ret = -EINVAL; in cy8c95x0_read_regs_mask()
536 ret = regmap_read(chip->regmap, off, &read_val); in cy8c95x0_read_regs_mask()
547 bitmap_replace(val, tmp, tval, chip->shiftmask, MAX_LINE); in cy8c95x0_read_regs_mask()
550 mutex_unlock(&chip->i2c_lock); in cy8c95x0_read_regs_mask()
553 dev_err(chip->dev, "failed reading register %d: err %d\n", off, ret); in cy8c95x0_read_regs_mask()
558 static int cy8c95x0_gpio_direction_input(struct gpio_chip *gc, unsigned int off) in cy8c95x0_gpio_direction_input() argument
560 return pinctrl_gpio_direction_input(gc->base + off); in cy8c95x0_gpio_direction_input()
564 unsigned int off, int val) in cy8c95x0_gpio_direction_output() argument
566 struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc); in cy8c95x0_gpio_direction_output() local
567 u8 port = cypress_get_port(chip, off); in cy8c95x0_gpio_direction_output()
569 u8 bit = cypress_get_pin_mask(chip, off); in cy8c95x0_gpio_direction_output()
573 ret = regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0); in cy8c95x0_gpio_direction_output()
577 return pinctrl_gpio_direction_output(gc->base + off); in cy8c95x0_gpio_direction_output()
580 static int cy8c95x0_gpio_get_value(struct gpio_chip *gc, unsigned int off) in cy8c95x0_gpio_get_value() argument
582 struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc); in cy8c95x0_gpio_get_value() local
583 u8 inreg = CY8C95X0_INPUT_(cypress_get_port(chip, off)); in cy8c95x0_gpio_get_value()
584 u8 bit = cypress_get_pin_mask(chip, off); in cy8c95x0_gpio_get_value()
588 ret = regmap_read(chip->regmap, inreg, ®_val); in cy8c95x0_gpio_get_value()
602 static void cy8c95x0_gpio_set_value(struct gpio_chip *gc, unsigned int off, in cy8c95x0_gpio_set_value() argument
605 struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc); in cy8c95x0_gpio_set_value() local
606 u8 outreg = CY8C95X0_OUTPUT_(cypress_get_port(chip, off)); in cy8c95x0_gpio_set_value()
607 u8 bit = cypress_get_pin_mask(chip, off); in cy8c95x0_gpio_set_value()
609 regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0); in cy8c95x0_gpio_set_value()
612 static int cy8c95x0_gpio_get_direction(struct gpio_chip *gc, unsigned int off) in cy8c95x0_gpio_get_direction() argument
614 struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc); in cy8c95x0_gpio_get_direction() local
615 u8 port = cypress_get_port(chip, off); in cy8c95x0_gpio_get_direction()
616 u8 bit = cypress_get_pin_mask(chip, off); in cy8c95x0_gpio_get_direction()
620 mutex_lock(&chip->i2c_lock); in cy8c95x0_gpio_get_direction()
622 ret = regmap_write(chip->regmap, CY8C95X0_PORTSEL, port); in cy8c95x0_gpio_get_direction()
626 ret = regmap_read(chip->regmap, CY8C95X0_DIRECTION, ®_val); in cy8c95x0_gpio_get_direction()
630 mutex_unlock(&chip->i2c_lock); in cy8c95x0_gpio_get_direction()
637 mutex_unlock(&chip->i2c_lock); in cy8c95x0_gpio_get_direction()
641 static int cy8c95x0_gpio_get_pincfg(struct cy8c95x0_pinctrl *chip, in cy8c95x0_gpio_get_pincfg() argument
642 unsigned int off, in cy8c95x0_gpio_get_pincfg() argument
646 u8 port = cypress_get_port(chip, off); in cy8c95x0_gpio_get_pincfg()
647 u8 bit = cypress_get_pin_mask(chip, off); in cy8c95x0_gpio_get_pincfg()
653 mutex_lock(&chip->i2c_lock); in cy8c95x0_gpio_get_pincfg()
656 ret = regmap_write(chip->regmap, CY8C95X0_PORTSEL, port); in cy8c95x0_gpio_get_pincfg()
707 ret = -ENOTSUPP; in cy8c95x0_gpio_get_pincfg()
714 ret = regmap_read(chip->regmap, reg, ®_val); in cy8c95x0_gpio_get_pincfg()
722 mutex_unlock(&chip->i2c_lock); in cy8c95x0_gpio_get_pincfg()
727 static int cy8c95x0_gpio_set_pincfg(struct cy8c95x0_pinctrl *chip, in cy8c95x0_gpio_set_pincfg() argument
728 unsigned int off, in cy8c95x0_gpio_set_pincfg() argument
731 u8 port = cypress_get_port(chip, off); in cy8c95x0_gpio_set_pincfg()
732 u8 bit = cypress_get_pin_mask(chip, off); in cy8c95x0_gpio_set_pincfg()
738 mutex_lock(&chip->i2c_lock); in cy8c95x0_gpio_set_pincfg()
741 ret = regmap_write(chip->regmap, CY8C95X0_PORTSEL, port); in cy8c95x0_gpio_set_pincfg()
747 __clear_bit(off, chip->push_pull); in cy8c95x0_gpio_set_pincfg()
751 __clear_bit(off, chip->push_pull); in cy8c95x0_gpio_set_pincfg()
755 __clear_bit(off, chip->push_pull); in cy8c95x0_gpio_set_pincfg()
759 __clear_bit(off, chip->push_pull); in cy8c95x0_gpio_set_pincfg()
763 __clear_bit(off, chip->push_pull); in cy8c95x0_gpio_set_pincfg()
767 __set_bit(off, chip->push_pull); in cy8c95x0_gpio_set_pincfg()
774 ret = cy8c95x0_pinmux_direction(chip, off, !arg); in cy8c95x0_gpio_set_pincfg()
777 ret = cy8c95x0_pinmux_direction(chip, off, arg); in cy8c95x0_gpio_set_pincfg()
780 ret = -ENOTSUPP; in cy8c95x0_gpio_set_pincfg()
787 ret = regmap_write_bits(chip->regmap, reg, bit, bit); in cy8c95x0_gpio_set_pincfg()
790 mutex_unlock(&chip->i2c_lock); in cy8c95x0_gpio_set_pincfg()
797 struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc); in cy8c95x0_gpio_get_multiple() local
799 return cy8c95x0_read_regs_mask(chip, CY8C95X0_INPUT, bits, mask); in cy8c95x0_gpio_get_multiple()
805 struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc); in cy8c95x0_gpio_set_multiple() local
807 cy8c95x0_write_regs_mask(chip, CY8C95X0_OUTPUT, bits, mask); in cy8c95x0_gpio_set_multiple()
812 struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc); in cy8c95x0_add_pin_ranges() local
813 struct device *dev = chip->dev; in cy8c95x0_add_pin_ranges()
816 ret = gpiochip_add_pin_range(gc, dev_name(dev), 0, 0, chip->tpin); in cy8c95x0_add_pin_ranges()
823 static int cy8c95x0_setup_gpiochip(struct cy8c95x0_pinctrl *chip) in cy8c95x0_setup_gpiochip() argument
825 struct gpio_chip *gc = &chip->gpio_chip; in cy8c95x0_setup_gpiochip()
827 gc->request = gpiochip_generic_request; in cy8c95x0_setup_gpiochip()
828 gc->free = gpiochip_generic_free; in cy8c95x0_setup_gpiochip()
829 gc->direction_input = cy8c95x0_gpio_direction_input; in cy8c95x0_setup_gpiochip()
830 gc->direction_output = cy8c95x0_gpio_direction_output; in cy8c95x0_setup_gpiochip()
831 gc->get = cy8c95x0_gpio_get_value; in cy8c95x0_setup_gpiochip()
832 gc->set = cy8c95x0_gpio_set_value; in cy8c95x0_setup_gpiochip()
833 gc->get_direction = cy8c95x0_gpio_get_direction; in cy8c95x0_setup_gpiochip()
834 gc->get_multiple = cy8c95x0_gpio_get_multiple; in cy8c95x0_setup_gpiochip()
835 gc->set_multiple = cy8c95x0_gpio_set_multiple; in cy8c95x0_setup_gpiochip()
836 gc->set_config = gpiochip_generic_config; in cy8c95x0_setup_gpiochip()
837 gc->can_sleep = true; in cy8c95x0_setup_gpiochip()
838 gc->add_pin_ranges = cy8c95x0_add_pin_ranges; in cy8c95x0_setup_gpiochip()
840 gc->base = -1; in cy8c95x0_setup_gpiochip()
841 gc->ngpio = chip->tpin; in cy8c95x0_setup_gpiochip()
843 gc->parent = chip->dev; in cy8c95x0_setup_gpiochip()
844 gc->owner = THIS_MODULE; in cy8c95x0_setup_gpiochip()
845 gc->names = NULL; in cy8c95x0_setup_gpiochip()
847 gc->label = dev_name(chip->dev); in cy8c95x0_setup_gpiochip()
849 return devm_gpiochip_add_data(chip->dev, gc, chip); in cy8c95x0_setup_gpiochip()
855 struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc); in cy8c95x0_irq_mask() local
858 set_bit(hwirq, chip->irq_mask); in cy8c95x0_irq_mask()
865 struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc); in cy8c95x0_irq_unmask() local
869 clear_bit(hwirq, chip->irq_mask); in cy8c95x0_irq_unmask()
875 struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc); in cy8c95x0_irq_bus_lock() local
877 mutex_lock(&chip->irq_lock); in cy8c95x0_irq_bus_lock()
883 struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc); in cy8c95x0_irq_bus_sync_unlock() local
890 cy8c95x0_write_regs_mask(chip, CY8C95X0_INTMASK, chip->irq_mask, ones); in cy8c95x0_irq_bus_sync_unlock()
893 cy8c95x0_read_regs_mask(chip, CY8C95X0_DIRECTION, reg_direction, chip->irq_mask); in cy8c95x0_irq_bus_sync_unlock()
894 bitmap_or(irq_mask, chip->irq_mask, reg_direction, MAX_LINE); in cy8c95x0_irq_bus_sync_unlock()
898 cy8c95x0_write_regs_mask(chip, CY8C95X0_DIRECTION, ones, irq_mask); in cy8c95x0_irq_bus_sync_unlock()
900 mutex_unlock(&chip->irq_lock); in cy8c95x0_irq_bus_sync_unlock()
906 struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc); in cy8c95x0_irq_set_type() local
923 dev_err(chip->dev, "irq %d: unsupported type %d\n", d->irq, type); in cy8c95x0_irq_set_type()
924 return -EINVAL; in cy8c95x0_irq_set_type()
927 assign_bit(hwirq, chip->irq_trig_fall, trig_type & IRQ_TYPE_EDGE_FALLING); in cy8c95x0_irq_set_type()
928 assign_bit(hwirq, chip->irq_trig_raise, trig_type & IRQ_TYPE_EDGE_RISING); in cy8c95x0_irq_set_type()
929 assign_bit(hwirq, chip->irq_trig_low, type == IRQ_TYPE_LEVEL_LOW); in cy8c95x0_irq_set_type()
930 assign_bit(hwirq, chip->irq_trig_high, type == IRQ_TYPE_LEVEL_HIGH); in cy8c95x0_irq_set_type()
938 struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc); in cy8c95x0_irq_shutdown() local
941 clear_bit(hwirq, chip->irq_trig_raise); in cy8c95x0_irq_shutdown()
942 clear_bit(hwirq, chip->irq_trig_fall); in cy8c95x0_irq_shutdown()
943 clear_bit(hwirq, chip->irq_trig_low); in cy8c95x0_irq_shutdown()
944 clear_bit(hwirq, chip->irq_trig_high); in cy8c95x0_irq_shutdown()
948 .name = "cy8c95x0-irq",
959 static bool cy8c95x0_irq_pending(struct cy8c95x0_pinctrl *chip, unsigned long *pending) in cy8c95x0_irq_pending() argument
969 if (cy8c95x0_read_regs_mask(chip, CY8C95X0_INTSTATUS, trigger, ones)) in cy8c95x0_irq_pending()
973 if (cy8c95x0_read_regs_mask(chip, CY8C95X0_INPUT, cur_stat, trigger)) in cy8c95x0_irq_pending()
977 bitmap_replace(new_stat, chip->irq_trig_fall, chip->irq_trig_raise, in cy8c95x0_irq_pending()
987 struct cy8c95x0_pinctrl *chip = devid; in cy8c95x0_irq_handler() local
988 struct gpio_chip *gc = &chip->gpio_chip; in cy8c95x0_irq_handler()
993 ret = cy8c95x0_irq_pending(chip, pending); in cy8c95x0_irq_handler()
1000 nested_irq = irq_find_mapping(gc->irq.domain, level); in cy8c95x0_irq_handler()
1003 dev_warn_ratelimited(gc->parent, "unmapped interrupt %d\n", level); in cy8c95x0_irq_handler()
1007 if (test_bit(level, chip->irq_trig_low)) in cy8c95x0_irq_handler()
1010 else if (test_bit(level, chip->irq_trig_high)) in cy8c95x0_irq_handler()
1024 struct cy8c95x0_pinctrl *chip = pinctrl_dev_get_drvdata(pctldev); in cy8c95x0_pinctrl_get_groups_count() local
1026 return chip->tpin; in cy8c95x0_pinctrl_get_groups_count()
1056 struct cy8c95x0_pinctrl *chip = pinctrl_dev_get_drvdata(pctldev); in cy8c95x0_pin_dbg_show() local
1063 if (cy8c95x0_read_regs_mask(chip, CY8C95X0_PWMSEL, pwm, mask)) { in cy8c95x0_pin_dbg_show()
1096 struct cy8c95x0_pinctrl *chip = pinctrl_dev_get_drvdata(pctldev); in cy8c95x0_get_function_groups() local
1099 *num_groups = chip->tpin; in cy8c95x0_get_function_groups()
1103 static int cy8c95x0_set_mode(struct cy8c95x0_pinctrl *chip, unsigned int off, bool mode) in cy8c95x0_set_mode() argument
1105 u8 port = cypress_get_port(chip, off); in cy8c95x0_set_mode()
1106 u8 bit = cypress_get_pin_mask(chip, off); in cy8c95x0_set_mode()
1110 ret = regmap_write(chip->regmap, CY8C95X0_PORTSEL, port); in cy8c95x0_set_mode()
1114 return regmap_write_bits(chip->regmap, CY8C95X0_PWMSEL, bit, mode ? bit : 0); in cy8c95x0_set_mode()
1117 static int cy8c95x0_pinmux_mode(struct cy8c95x0_pinctrl *chip, in cy8c95x0_pinmux_mode() argument
1120 u8 port = cypress_get_port(chip, group); in cy8c95x0_pinmux_mode()
1121 u8 bit = cypress_get_pin_mask(chip, group); in cy8c95x0_pinmux_mode()
1124 ret = cy8c95x0_set_mode(chip, group, selector); in cy8c95x0_pinmux_mode()
1132 ret = regmap_write_bits(chip->regmap, CY8C95X0_DIRECTION, bit, bit); in cy8c95x0_pinmux_mode()
1136 return regmap_write_bits(chip->regmap, CY8C95X0_OUTPUT_(port), bit, bit); in cy8c95x0_pinmux_mode()
1142 struct cy8c95x0_pinctrl *chip = pinctrl_dev_get_drvdata(pctldev); in cy8c95x0_set_mux() local
1145 mutex_lock(&chip->i2c_lock); in cy8c95x0_set_mux()
1146 ret = cy8c95x0_pinmux_mode(chip, selector, group); in cy8c95x0_set_mux()
1147 mutex_unlock(&chip->i2c_lock); in cy8c95x0_set_mux()
1156 struct cy8c95x0_pinctrl *chip = pinctrl_dev_get_drvdata(pctldev); in cy8c95x0_gpio_request_enable() local
1159 mutex_lock(&chip->i2c_lock); in cy8c95x0_gpio_request_enable()
1160 ret = cy8c95x0_set_mode(chip, pin, false); in cy8c95x0_gpio_request_enable()
1161 mutex_unlock(&chip->i2c_lock); in cy8c95x0_gpio_request_enable()
1166 static int cy8c95x0_pinmux_direction(struct cy8c95x0_pinctrl *chip, in cy8c95x0_pinmux_direction() argument
1169 u8 port = cypress_get_port(chip, pin); in cy8c95x0_pinmux_direction()
1170 u8 bit = cypress_get_pin_mask(chip, pin); in cy8c95x0_pinmux_direction()
1174 ret = regmap_write(chip->regmap, CY8C95X0_PORTSEL, port); in cy8c95x0_pinmux_direction()
1179 ret = regmap_write_bits(chip->regmap, CY8C95X0_DIRECTION, bit, input ? bit : 0); in cy8c95x0_pinmux_direction()
1185 * the direction register isn't sufficient in Push-Pull mode. in cy8c95x0_pinmux_direction()
1187 if (input && test_bit(pin, chip->push_pull)) { in cy8c95x0_pinmux_direction()
1188 ret = regmap_write_bits(chip->regmap, CY8C95X0_DRV_HIZ, bit, bit); in cy8c95x0_pinmux_direction()
1192 __clear_bit(pin, chip->push_pull); in cy8c95x0_pinmux_direction()
1202 struct cy8c95x0_pinctrl *chip = pinctrl_dev_get_drvdata(pctldev); in cy8c95x0_gpio_set_direction() local
1205 mutex_lock(&chip->i2c_lock); in cy8c95x0_gpio_set_direction()
1206 ret = cy8c95x0_pinmux_direction(chip, pin, input); in cy8c95x0_gpio_set_direction()
1207 mutex_unlock(&chip->i2c_lock); in cy8c95x0_gpio_set_direction()
1225 struct cy8c95x0_pinctrl *chip = pinctrl_dev_get_drvdata(pctldev); in cy8c95x0_pinconf_get() local
1227 return cy8c95x0_gpio_get_pincfg(chip, pin, config); in cy8c95x0_pinconf_get()
1233 struct cy8c95x0_pinctrl *chip = pinctrl_dev_get_drvdata(pctldev); in cy8c95x0_pinconf_set() local
1238 ret = cy8c95x0_gpio_set_pincfg(chip, pin, configs[i]); in cy8c95x0_pinconf_set()
1252 static int cy8c95x0_irq_setup(struct cy8c95x0_pinctrl *chip, int irq) in cy8c95x0_irq_setup() argument
1254 struct gpio_irq_chip *girq = &chip->gpio_chip.irq; in cy8c95x0_irq_setup()
1258 mutex_init(&chip->irq_lock); in cy8c95x0_irq_setup()
1263 ret = cy8c95x0_irq_pending(chip, pending_irqs); in cy8c95x0_irq_setup()
1265 dev_err(chip->dev, "failed to clear irq status register\n"); in cy8c95x0_irq_setup()
1270 bitmap_fill(chip->irq_mask, MAX_LINE); in cy8c95x0_irq_setup()
1275 girq->parent_handler = NULL; in cy8c95x0_irq_setup()
1276 girq->num_parents = 0; in cy8c95x0_irq_setup()
1277 girq->parents = NULL; in cy8c95x0_irq_setup()
1278 girq->default_type = IRQ_TYPE_NONE; in cy8c95x0_irq_setup()
1279 girq->handler = handle_simple_irq; in cy8c95x0_irq_setup()
1280 girq->threaded = true; in cy8c95x0_irq_setup()
1282 ret = devm_request_threaded_irq(chip->dev, irq, in cy8c95x0_irq_setup()
1285 dev_name(chip->dev), chip); in cy8c95x0_irq_setup()
1287 dev_err(chip->dev, "failed to request irq %d\n", irq); in cy8c95x0_irq_setup()
1290 dev_info(chip->dev, "Registered threaded IRQ\n"); in cy8c95x0_irq_setup()
1295 static int cy8c95x0_setup_pinctrl(struct cy8c95x0_pinctrl *chip) in cy8c95x0_setup_pinctrl() argument
1297 struct pinctrl_desc *pd = &chip->pinctrl_desc; in cy8c95x0_setup_pinctrl()
1299 pd->pctlops = &cy8c95x0_pinctrl_ops; in cy8c95x0_setup_pinctrl()
1300 pd->confops = &cy8c95x0_pinconf_ops; in cy8c95x0_setup_pinctrl()
1301 pd->pmxops = &cy8c95x0_pmxops; in cy8c95x0_setup_pinctrl()
1302 pd->name = dev_name(chip->dev); in cy8c95x0_setup_pinctrl()
1303 pd->pins = cy8c9560_pins; in cy8c95x0_setup_pinctrl()
1304 pd->npins = chip->tpin; in cy8c95x0_setup_pinctrl()
1305 pd->owner = THIS_MODULE; in cy8c95x0_setup_pinctrl()
1307 chip->pctldev = devm_pinctrl_register(chip->dev, pd, chip); in cy8c95x0_setup_pinctrl()
1308 if (IS_ERR(chip->pctldev)) in cy8c95x0_setup_pinctrl()
1309 return dev_err_probe(chip->dev, PTR_ERR(chip->pctldev), in cy8c95x0_setup_pinctrl()
1318 struct i2c_adapter *adapter = client->adapter; in cy8c95x0_detect()
1323 return -ENODEV; in cy8c95x0_detect()
1339 return -ENODEV; in cy8c95x0_detect()
1342 dev_info(&client->dev, "Found a %s chip at 0x%02x.\n", name, client->addr); in cy8c95x0_detect()
1343 strscpy(info->type, name, I2C_NAME_SIZE); in cy8c95x0_detect()
1350 struct cy8c95x0_pinctrl *chip; in cy8c95x0_probe() local
1354 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); in cy8c95x0_probe()
1355 if (!chip) in cy8c95x0_probe()
1356 return -ENOMEM; in cy8c95x0_probe()
1358 chip->dev = &client->dev; in cy8c95x0_probe()
1361 chip->driver_data = (unsigned long)device_get_match_data(&client->dev); in cy8c95x0_probe()
1362 if (!chip->driver_data) in cy8c95x0_probe()
1363 chip->driver_data = i2c_match_id(cy8c95x0_id, client)->driver_data; in cy8c95x0_probe()
1364 if (!chip->driver_data) in cy8c95x0_probe()
1365 return -ENODEV; in cy8c95x0_probe()
1367 i2c_set_clientdata(client, chip); in cy8c95x0_probe()
1369 chip->tpin = chip->driver_data & CY8C95X0_GPIO_MASK; in cy8c95x0_probe()
1370 chip->nport = DIV_ROUND_UP(CY8C95X0_PIN_TO_OFFSET(chip->tpin), BANK_SZ); in cy8c95x0_probe()
1372 switch (chip->tpin) { in cy8c95x0_probe()
1374 strscpy(chip->name, cy8c95x0_id[0].name, I2C_NAME_SIZE); in cy8c95x0_probe()
1377 strscpy(chip->name, cy8c95x0_id[1].name, I2C_NAME_SIZE); in cy8c95x0_probe()
1380 strscpy(chip->name, cy8c95x0_id[2].name, I2C_NAME_SIZE); in cy8c95x0_probe()
1383 return -ENODEV; in cy8c95x0_probe()
1386 reg = devm_regulator_get(&client->dev, "vdd"); in cy8c95x0_probe()
1388 if (PTR_ERR(reg) == -EPROBE_DEFER) in cy8c95x0_probe()
1389 return -EPROBE_DEFER; in cy8c95x0_probe()
1393 dev_err(&client->dev, "failed to enable regulator vdd: %d\n", ret); in cy8c95x0_probe()
1396 chip->regulator = reg; in cy8c95x0_probe()
1399 /* bring the chip out of reset if reset pin is provided */ in cy8c95x0_probe()
1400 chip->gpio_reset = devm_gpiod_get_optional(&client->dev, "reset", GPIOD_OUT_HIGH); in cy8c95x0_probe()
1401 if (IS_ERR(chip->gpio_reset)) { in cy8c95x0_probe()
1402 ret = dev_err_probe(chip->dev, PTR_ERR(chip->gpio_reset), in cy8c95x0_probe()
1405 } else if (chip->gpio_reset) { in cy8c95x0_probe()
1407 gpiod_set_value_cansleep(chip->gpio_reset, 0); in cy8c95x0_probe()
1410 gpiod_set_consumer_name(chip->gpio_reset, "CY8C95X0 RESET"); in cy8c95x0_probe()
1413 chip->regmap = devm_regmap_init_i2c(client, &cy8c95x0_i2c_regmap); in cy8c95x0_probe()
1414 if (IS_ERR(chip->regmap)) { in cy8c95x0_probe()
1415 ret = PTR_ERR(chip->regmap); in cy8c95x0_probe()
1419 bitmap_zero(chip->push_pull, MAX_LINE); in cy8c95x0_probe()
1420 bitmap_zero(chip->shiftmask, MAX_LINE); in cy8c95x0_probe()
1421 bitmap_set(chip->shiftmask, 0, 20); in cy8c95x0_probe()
1422 mutex_init(&chip->i2c_lock); in cy8c95x0_probe()
1425 ret = cy8c95x0_acpi_get_irq(&client->dev); in cy8c95x0_probe()
1427 client->irq = ret; in cy8c95x0_probe()
1430 if (client->irq) { in cy8c95x0_probe()
1431 ret = cy8c95x0_irq_setup(chip, client->irq); in cy8c95x0_probe()
1436 ret = cy8c95x0_setup_pinctrl(chip); in cy8c95x0_probe()
1440 ret = cy8c95x0_setup_gpiochip(chip); in cy8c95x0_probe()
1447 if (!IS_ERR_OR_NULL(chip->regulator)) in cy8c95x0_probe()
1448 regulator_disable(chip->regulator); in cy8c95x0_probe()
1454 struct cy8c95x0_pinctrl *chip = i2c_get_clientdata(client); in cy8c95x0_remove() local
1456 if (!IS_ERR_OR_NULL(chip->regulator)) in cy8c95x0_remove()
1457 regulator_disable(chip->regulator); in cy8c95x0_remove()
1468 .name = "cy8c95x0-pinctrl",