Lines Matching +full:data +full:- +full:pins
1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2017-2022 NXP
7 * Copyright 2015-2016 Freescale Semiconductor, Inc.
28 #include "../pinctrl-utils.h"
29 #include "pinctrl-s32.h"
88 * @gpio_configs: Saved configurations for GPIO pins
109 unsigned int mem_regions = ipctl->info->soc_data->mem_regions; in s32_get_region()
113 pin_range = ipctl->regions[i].pin_range; in s32_get_region()
114 if (pin >= pin_range->start && pin <= pin_range->end) in s32_get_region()
115 return &ipctl->regions[i]; in s32_get_region()
124 return s32_get_region(pctldev, pin) ? 0 : -EINVAL; in s32_check_pin()
135 return -EINVAL; in s32_regmap_read()
137 offset = (pin - region->pin_range->start) * in s32_regmap_read()
138 regmap_get_reg_stride(region->map); in s32_regmap_read()
140 return regmap_read(region->map, offset, val); in s32_regmap_read()
152 return -EINVAL; in s32_regmap_write()
154 offset = (pin - region->pin_range->start) * in s32_regmap_write()
155 regmap_get_reg_stride(region->map); in s32_regmap_write()
157 return regmap_write(region->map, offset, val); in s32_regmap_write()
169 return -EINVAL; in s32_regmap_update()
171 offset = (pin - region->pin_range->start) * in s32_regmap_update()
172 regmap_get_reg_stride(region->map); in s32_regmap_update()
174 return regmap_update_bits(region->map, offset, mask, val); in s32_regmap_update()
180 const struct s32_pinctrl_soc_info *info = ipctl->info; in s32_get_groups_count()
182 return info->ngroups; in s32_get_groups_count()
189 const struct s32_pinctrl_soc_info *info = ipctl->info; in s32_get_group_name()
191 return info->groups[selector].data.name; in s32_get_group_name()
195 unsigned int selector, const unsigned int **pins, in s32_get_group_pins() argument
199 const struct s32_pinctrl_soc_info *info = ipctl->info; in s32_get_group_pins()
201 *pins = info->groups[selector].data.pins; in s32_get_group_pins()
202 *npins = info->groups[selector].data.npins; in s32_get_group_pins()
210 seq_printf(s, "%s", dev_name(pctldev->dev)); in s32_pin_dbg_show()
221 struct device *dev = ipctl->dev; in s32_dt_group_node_to_map()
230 return -EINVAL; in s32_dt_group_node_to_map()
248 np->name, func_name); in s32_dt_group_node_to_map()
254 num_maps, np->name, cfgs, n_cfgs, in s32_dt_group_node_to_map()
281 np_config->name); in s32_dt_node_to_map()
308 const struct s32_pinctrl_soc_info *info = ipctl->info; in s32_pmx_set()
316 grp = &info->groups[group]; in s32_pmx_set()
318 dev_dbg(ipctl->dev, "set mux for function %s group %s\n", in s32_pmx_set()
319 info->functions[selector].name, grp->data.name); in s32_pmx_set()
322 for (i = 0; i < grp->data.npins; i++) { in s32_pmx_set()
323 if (s32_check_pin(pctldev, grp->data.pins[i]) != 0) { in s32_pmx_set()
324 dev_err(info->dev, "invalid pin: %u in group: %u\n", in s32_pmx_set()
325 grp->data.pins[i], group); in s32_pmx_set()
326 return -EINVAL; in s32_pmx_set()
330 for (i = 0, ret = 0; i < grp->data.npins && !ret; i++) { in s32_pmx_set()
331 ret = s32_regmap_update(pctldev, grp->data.pins[i], in s32_pmx_set()
332 S32_MSCR_SSS_MASK, grp->pin_sss[i]); in s32_pmx_set()
334 dev_err(info->dev, "Failed to set pin %u\n", in s32_pmx_set()
335 grp->data.pins[i]); in s32_pmx_set()
346 const struct s32_pinctrl_soc_info *info = ipctl->info; in s32_pmx_get_funcs_count()
348 return info->nfunctions; in s32_pmx_get_funcs_count()
355 const struct s32_pinctrl_soc_info *info = ipctl->info; in s32_pmx_get_func_name()
357 return info->functions[selector].name; in s32_pmx_get_func_name()
366 const struct s32_pinctrl_soc_info *info = ipctl->info; in s32_pmx_get_groups()
368 *groups = info->functions[selector].groups; in s32_pmx_get_groups()
369 *num_groups = info->functions[selector].ngroups; in s32_pmx_get_groups()
391 return -ENOMEM; in s32_pmx_gpio_request_enable()
393 gpio_pin->pin_id = offset; in s32_pmx_gpio_request_enable()
394 gpio_pin->config = config; in s32_pmx_gpio_request_enable()
396 spin_lock_irqsave(&ipctl->gpio_configs_lock, flags); in s32_pmx_gpio_request_enable()
397 list_add(&gpio_pin->list, &ipctl->gpio_configs); in s32_pmx_gpio_request_enable()
398 spin_unlock_irqrestore(&ipctl->gpio_configs_lock, flags); in s32_pmx_gpio_request_enable()
415 spin_lock_irqsave(&ipctl->gpio_configs_lock, flags); in s32_pmx_gpio_disable_free()
417 list_for_each_entry_safe(gpio_pin, tmp, &ipctl->gpio_configs, list) { in s32_pmx_gpio_disable_free()
418 if (gpio_pin->pin_id == offset) { in s32_pmx_gpio_disable_free()
419 ret = s32_regmap_write(pctldev, gpio_pin->pin_id, in s32_pmx_gpio_disable_free()
420 gpio_pin->config); in s32_pmx_gpio_disable_free()
424 list_del(&gpio_pin->list); in s32_pmx_gpio_disable_free()
431 spin_unlock_irqrestore(&ipctl->gpio_configs_lock, flags); in s32_pmx_gpio_disable_free()
463 /* Set the reserved elements as -1 */
464 static const int support_slew[] = {208, -1, -1, -1, 166, 150, 133, 83};
476 return -EINVAL; in s32_get_slew_regval()
512 /* All pins are persistent over suspend */ in s32_parse_pincfg()
551 return -EOPNOTSUPP; in s32_parse_pincfg()
570 dev_dbg(ipctl->dev, "pinconf set pin %s with %u configs\n", in s32_pinconf_mscr_update()
582 dev_dbg(ipctl->dev, "update: pin %u cfg 0x%x\n", pin_id, config); in s32_pinconf_mscr_update()
606 const struct s32_pinctrl_soc_info *info = ipctl->info; in s32_pconf_group_set()
610 grp = &info->groups[selector]; in s32_pconf_group_set()
611 for (i = 0; i < grp->data.npins; i++) { in s32_pconf_group_set()
612 ret = s32_pinconf_mscr_update(pctldev, grp->data.pins[i], in s32_pconf_group_set()
638 const struct s32_pinctrl_soc_info *info = ipctl->info; in s32_pinconf_group_dbg_show()
645 grp = &info->groups[selector]; in s32_pinconf_group_dbg_show()
646 for (i = 0; i < grp->data.npins; i++) { in s32_pinconf_group_dbg_show()
647 name = pin_get_name(pctldev, grp->data.pins[i]); in s32_pinconf_group_dbg_show()
648 ret = s32_regmap_read(pctldev, grp->data.pins[i], &config); in s32_pinconf_group_dbg_show()
667 const struct pin_desc *pd = pin_desc_get(ipctl->pctl, pin); in s32_pinctrl_should_save()
676 if (pd->mux_owner || pd->gpio_owner) in s32_pinctrl_should_save()
687 const struct s32_pinctrl_soc_info *info = ipctl->info; in s32_pinctrl_suspend()
688 struct s32_pinctrl_context *saved_context = &ipctl->saved_context; in s32_pinctrl_suspend()
693 for (i = 0; i < info->soc_data->npins; i++) { in s32_pinctrl_suspend()
694 pin = &info->soc_data->pins[i]; in s32_pinctrl_suspend()
696 if (!s32_pinctrl_should_save(ipctl, pin->number)) in s32_pinctrl_suspend()
699 ret = s32_regmap_read(ipctl->pctl, pin->number, &config); in s32_pinctrl_suspend()
701 return -EINVAL; in s32_pinctrl_suspend()
703 saved_context->pads[i] = config; in s32_pinctrl_suspend()
713 const struct s32_pinctrl_soc_info *info = ipctl->info; in s32_pinctrl_resume()
715 struct s32_pinctrl_context *saved_context = &ipctl->saved_context; in s32_pinctrl_resume()
718 for (i = 0; i < info->soc_data->npins; i++) { in s32_pinctrl_resume()
719 pin = &info->soc_data->pins[i]; in s32_pinctrl_resume()
721 if (!s32_pinctrl_should_save(ipctl, pin->number)) in s32_pinctrl_resume()
724 ret = s32_regmap_write(ipctl->pctl, pin->number, in s32_pinctrl_resume()
725 saved_context->pads[i]); in s32_pinctrl_resume()
739 unsigned int *pins, *sss; in s32_pinctrl_parse_groups() local
743 dev = info->dev; in s32_pinctrl_parse_groups()
748 grp->data.name = np->name; in s32_pinctrl_parse_groups()
753 grp->data.name); in s32_pinctrl_parse_groups()
754 return -EINVAL; in s32_pinctrl_parse_groups()
757 dev_err(dev, "The group %s has no pins.\n", grp->data.name); in s32_pinctrl_parse_groups()
758 return -EINVAL; in s32_pinctrl_parse_groups()
761 grp->data.npins = npins; in s32_pinctrl_parse_groups()
763 pins = devm_kcalloc(info->dev, npins, sizeof(*pins), GFP_KERNEL); in s32_pinctrl_parse_groups()
764 sss = devm_kcalloc(info->dev, npins, sizeof(*sss), GFP_KERNEL); in s32_pinctrl_parse_groups()
765 if (!pins || !sss) in s32_pinctrl_parse_groups()
766 return -ENOMEM; in s32_pinctrl_parse_groups()
770 pins[i] = get_pin_no(pinmux); in s32_pinctrl_parse_groups()
773 dev_dbg(info->dev, "pin: 0x%x, sss: 0x%x", pins[i], sss[i]); in s32_pinctrl_parse_groups()
777 grp->data.pins = pins; in s32_pinctrl_parse_groups()
778 grp->pin_sss = sss; in s32_pinctrl_parse_groups()
794 dev_dbg(info->dev, "parse function(%u): %pOFn\n", index, np); in s32_pinctrl_parse_functions()
796 func = &info->functions[index]; in s32_pinctrl_parse_functions()
799 func->name = np->name; in s32_pinctrl_parse_functions()
800 func->ngroups = of_get_child_count(np); in s32_pinctrl_parse_functions()
801 if (func->ngroups == 0) { in s32_pinctrl_parse_functions()
802 dev_err(info->dev, "no groups defined in %pOF\n", np); in s32_pinctrl_parse_functions()
803 return -EINVAL; in s32_pinctrl_parse_functions()
806 groups = devm_kcalloc(info->dev, func->ngroups, in s32_pinctrl_parse_functions()
807 sizeof(*func->groups), GFP_KERNEL); in s32_pinctrl_parse_functions()
809 return -ENOMEM; in s32_pinctrl_parse_functions()
812 groups[i] = child->name; in s32_pinctrl_parse_functions()
813 grp = &info->groups[info->grp_index++]; in s32_pinctrl_parse_functions()
822 func->groups = groups; in s32_pinctrl_parse_functions()
830 struct s32_pinctrl_soc_info *info = ipctl->info; in s32_pinctrl_probe_dt()
831 struct device_node *np = pdev->dev.of_node; in s32_pinctrl_probe_dt()
836 unsigned int mem_regions = info->soc_data->mem_regions; in s32_pinctrl_probe_dt()
842 return -ENODEV; in s32_pinctrl_probe_dt()
845 dev_err(&pdev->dev, "mem_regions is invalid: %u\n", mem_regions); in s32_pinctrl_probe_dt()
846 return -EINVAL; in s32_pinctrl_probe_dt()
849 ipctl->regions = devm_kcalloc(&pdev->dev, mem_regions, in s32_pinctrl_probe_dt()
850 sizeof(*ipctl->regions), GFP_KERNEL); in s32_pinctrl_probe_dt()
851 if (!ipctl->regions) in s32_pinctrl_probe_dt()
852 return -ENOMEM; in s32_pinctrl_probe_dt()
859 snprintf(ipctl->regions[i].name, in s32_pinctrl_probe_dt()
860 sizeof(ipctl->regions[i].name), "map%u", i); in s32_pinctrl_probe_dt()
862 s32_regmap_config.name = ipctl->regions[i].name; in s32_pinctrl_probe_dt()
863 s32_regmap_config.max_register = resource_size(res) - in s32_pinctrl_probe_dt()
866 map = devm_regmap_init_mmio(&pdev->dev, base, in s32_pinctrl_probe_dt()
869 dev_err(&pdev->dev, "Failed to init regmap[%u]\n", i); in s32_pinctrl_probe_dt()
873 ipctl->regions[i].map = map; in s32_pinctrl_probe_dt()
874 ipctl->regions[i].pin_range = &info->soc_data->mem_pin_ranges[i]; in s32_pinctrl_probe_dt()
879 dev_err(&pdev->dev, "no functions defined\n"); in s32_pinctrl_probe_dt()
880 return -EINVAL; in s32_pinctrl_probe_dt()
883 info->nfunctions = nfuncs; in s32_pinctrl_probe_dt()
884 info->functions = devm_kcalloc(&pdev->dev, nfuncs, in s32_pinctrl_probe_dt()
885 sizeof(*info->functions), GFP_KERNEL); in s32_pinctrl_probe_dt()
886 if (!info->functions) in s32_pinctrl_probe_dt()
887 return -ENOMEM; in s32_pinctrl_probe_dt()
889 info->ngroups = 0; in s32_pinctrl_probe_dt()
891 info->ngroups += of_get_child_count(child); in s32_pinctrl_probe_dt()
893 info->groups = devm_kcalloc(&pdev->dev, info->ngroups, in s32_pinctrl_probe_dt()
894 sizeof(*info->groups), GFP_KERNEL); in s32_pinctrl_probe_dt()
895 if (!info->groups) in s32_pinctrl_probe_dt()
896 return -ENOMEM; in s32_pinctrl_probe_dt()
921 if (!soc_data || !soc_data->pins || !soc_data->npins) { in s32_pinctrl_probe()
922 dev_err(&pdev->dev, "wrong pinctrl info\n"); in s32_pinctrl_probe()
923 return -EINVAL; in s32_pinctrl_probe()
926 info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL); in s32_pinctrl_probe()
928 return -ENOMEM; in s32_pinctrl_probe()
930 info->soc_data = soc_data; in s32_pinctrl_probe()
931 info->dev = &pdev->dev; in s32_pinctrl_probe()
934 ipctl = devm_kzalloc(&pdev->dev, sizeof(*ipctl), GFP_KERNEL); in s32_pinctrl_probe()
936 return -ENOMEM; in s32_pinctrl_probe()
938 ipctl->info = info; in s32_pinctrl_probe()
939 ipctl->dev = info->dev; in s32_pinctrl_probe()
942 INIT_LIST_HEAD(&ipctl->gpio_configs); in s32_pinctrl_probe()
943 spin_lock_init(&ipctl->gpio_configs_lock); in s32_pinctrl_probe()
946 devm_kmalloc(&pdev->dev, sizeof(*s32_pinctrl_desc), GFP_KERNEL); in s32_pinctrl_probe()
948 return -ENOMEM; in s32_pinctrl_probe()
950 s32_pinctrl_desc->name = dev_name(&pdev->dev); in s32_pinctrl_probe()
951 s32_pinctrl_desc->pins = info->soc_data->pins; in s32_pinctrl_probe()
952 s32_pinctrl_desc->npins = info->soc_data->npins; in s32_pinctrl_probe()
953 s32_pinctrl_desc->pctlops = &s32_pctrl_ops; in s32_pinctrl_probe()
954 s32_pinctrl_desc->pmxops = &s32_pmx_ops; in s32_pinctrl_probe()
955 s32_pinctrl_desc->confops = &s32_pinconf_ops; in s32_pinctrl_probe()
956 s32_pinctrl_desc->owner = THIS_MODULE; in s32_pinctrl_probe()
960 dev_err(&pdev->dev, "fail to probe dt properties\n"); in s32_pinctrl_probe()
964 ipctl->pctl = devm_pinctrl_register(&pdev->dev, s32_pinctrl_desc, in s32_pinctrl_probe()
966 if (IS_ERR(ipctl->pctl)) in s32_pinctrl_probe()
967 return dev_err_probe(&pdev->dev, PTR_ERR(ipctl->pctl), in s32_pinctrl_probe()
971 saved_context = &ipctl->saved_context; in s32_pinctrl_probe()
972 saved_context->pads = in s32_pinctrl_probe()
973 devm_kcalloc(&pdev->dev, info->soc_data->npins, in s32_pinctrl_probe()
974 sizeof(*saved_context->pads), in s32_pinctrl_probe()
976 if (!saved_context->pads) in s32_pinctrl_probe()
977 return -ENOMEM; in s32_pinctrl_probe()
980 dev_info(&pdev->dev, "initialized s32 pinctrl driver\n"); in s32_pinctrl_probe()