Lines Matching refs:PRCM_IDX_GPIOCR1
983 PRCM_GPIOCR_ALTCX(23, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE_CLK_a */
984 true, PRCM_IDX_GPIOCR1, 7, /* SBAG_CLK_a */
988 PRCM_GPIOCR_ALTCX(24, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE or U2_RXD ??? */
989 true, PRCM_IDX_GPIOCR1, 7, /* SBAG_VAL_a */
990 true, PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */
993 PRCM_GPIOCR_ALTCX(25, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE_DAT_a[0] */
994 true, PRCM_IDX_GPIOCR1, 7, /* SBAG_D_a[0] */
998 PRCM_GPIOCR_ALTCX(26, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE_DAT_a[1] */
999 true, PRCM_IDX_GPIOCR1, 7, /* SBAG_D_a[1] */
1003 PRCM_GPIOCR_ALTCX(27, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE_DAT_a[2] */
1004 true, PRCM_IDX_GPIOCR1, 7, /* SBAG_D_a[2] */
1008 PRCM_GPIOCR_ALTCX(28, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE_DAT_a[3] */
1009 true, PRCM_IDX_GPIOCR1, 7, /* SBAG_D_a[3] */
1015 true, PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */
1020 true, PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */
1025 true, PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */
1030 true, PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */
1033 PRCM_GPIOCR_ALTCX(68, true, PRCM_IDX_GPIOCR1, 18, /* REMAP_SELECT_ON */
1038 PRCM_GPIOCR_ALTCX(69, true, PRCM_IDX_GPIOCR1, 18, /* REMAP_SELECT_ON */
1043 PRCM_GPIOCR_ALTCX(70, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D23 */
1045 true, PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */
1046 true, PRCM_IDX_GPIOCR1, 8 /* SBAG_CLK */
1048 PRCM_GPIOCR_ALTCX(71, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D22 */
1050 true, PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */
1051 true, PRCM_IDX_GPIOCR1, 8 /* SBAG_D3 */
1053 PRCM_GPIOCR_ALTCX(72, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D21 */
1055 true, PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */
1056 true, PRCM_IDX_GPIOCR1, 8 /* SBAG_D2 */
1058 PRCM_GPIOCR_ALTCX(73, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D20 */
1060 true, PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */
1061 true, PRCM_IDX_GPIOCR1, 8 /* SBAG_D1 */
1063 PRCM_GPIOCR_ALTCX(74, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D19 */
1065 true, PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */
1066 true, PRCM_IDX_GPIOCR1, 8 /* SBAG_D0 */
1068 PRCM_GPIOCR_ALTCX(75, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D18 */
1070 true, PRCM_IDX_GPIOCR1, 0, /* DBG_UARTMOD_CMD0 */
1073 PRCM_GPIOCR_ALTCX(76, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D17 */
1075 true, PRCM_IDX_GPIOCR1, 0, /* DBG_UARTMOD_CMD0 */
1078 PRCM_GPIOCR_ALTCX(77, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D16 */
1081 true, PRCM_IDX_GPIOCR1, 8 /* SBAG_VAL */
1083 PRCM_GPIOCR_ALTCX(86, true, PRCM_IDX_GPIOCR1, 12, /* KP_O3 */
1088 PRCM_GPIOCR_ALTCX(87, true, PRCM_IDX_GPIOCR1, 12, /* KP_O2 */
1093 PRCM_GPIOCR_ALTCX(88, true, PRCM_IDX_GPIOCR1, 12, /* KP_I3 */
1098 PRCM_GPIOCR_ALTCX(89, true, PRCM_IDX_GPIOCR1, 12, /* KP_I2 */
1103 PRCM_GPIOCR_ALTCX(90, true, PRCM_IDX_GPIOCR1, 12, /* KP_O1 */
1108 PRCM_GPIOCR_ALTCX(91, true, PRCM_IDX_GPIOCR1, 12, /* KP_O0 */
1113 PRCM_GPIOCR_ALTCX(92, true, PRCM_IDX_GPIOCR1, 12, /* KP_I1 */
1118 PRCM_GPIOCR_ALTCX(93, true, PRCM_IDX_GPIOCR1, 12, /* KP_I0 */
1134 true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_CTL */
1135 true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1136 true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS17 */
1138 PRCM_GPIOCR_ALTCX(152, true, PRCM_IDX_GPIOCR1, 4, /* Hx_CLK */
1139 true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_CLK */
1140 true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1141 true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS16 */
1143 PRCM_GPIOCR_ALTCX(153, true, PRCM_IDX_GPIOCR1, 1, /* UARTMOD_CMD1 */
1144 true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D15 */
1145 true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
1146 true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS15 */
1148 PRCM_GPIOCR_ALTCX(154, true, PRCM_IDX_GPIOCR1, 1, /* UARTMOD_CMD1 */
1149 true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D14 */
1150 true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
1151 true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS14 */
1153 PRCM_GPIOCR_ALTCX(155, true, PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */
1154 true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D13 */
1155 true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
1156 true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS13 */
1158 PRCM_GPIOCR_ALTCX(156, true, PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */
1159 true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D12 */
1160 true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
1161 true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS12 */
1163 PRCM_GPIOCR_ALTCX(157, true, PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */
1164 true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D11 */
1165 true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
1166 true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS11 */
1168 PRCM_GPIOCR_ALTCX(158, true, PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */
1169 true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D10 */
1170 true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
1171 true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS10 */
1173 PRCM_GPIOCR_ALTCX(159, true, PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */
1174 true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D9 */
1175 true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
1176 true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS9 */
1179 true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D8 */
1180 true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
1181 true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS8 */
1183 PRCM_GPIOCR_ALTCX(161, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO7 */
1184 true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D7 */
1185 true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1186 true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS7 */
1188 PRCM_GPIOCR_ALTCX(162, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO6 */
1189 true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D6 */
1190 true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1191 true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS6 */
1193 PRCM_GPIOCR_ALTCX(163, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO5 */
1194 true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D5 */
1195 true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1196 true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS5 */
1198 PRCM_GPIOCR_ALTCX(164, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO4 */
1199 true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D4 */
1200 true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1201 true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS4 */
1203 PRCM_GPIOCR_ALTCX(165, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO3 */
1204 true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D3 */
1205 true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1206 true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS3 */
1208 PRCM_GPIOCR_ALTCX(166, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO2 */
1209 true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D2 */
1210 true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1211 true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS2 */
1213 PRCM_GPIOCR_ALTCX(167, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO1 */
1214 true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D1 */
1215 true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1216 true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS1 */
1218 PRCM_GPIOCR_ALTCX(168, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO0 */
1219 true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D0 */
1220 true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1221 true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS0 */
1233 PRCM_GPIOCR_ALTCX(215, true, PRCM_IDX_GPIOCR1, 23, /* SPI2_TXD */
1238 PRCM_GPIOCR_ALTCX(216, true, PRCM_IDX_GPIOCR1, 23, /* SPI2_FRM */
1243 PRCM_GPIOCR_ALTCX(217, true, PRCM_IDX_GPIOCR1, 23, /* SPI2_CLK */
1248 PRCM_GPIOCR_ALTCX(218, true, PRCM_IDX_GPIOCR1, 23, /* SPI2_RXD */
1256 [PRCM_IDX_GPIOCR1] = 0x138,