pinctrl/mediatek/pinctrl-mtk-common.h

1 /* SPDX-License-Identifier: GPL-2.0-only */
12 #include <linux/pinctrl/pinconf-generic.h>
14 #include "mtk-eint.h"
61 #define SET_ADDR(x, y)  (x + (y->devdata->port_align))
62 #define CLR_ADDR(x, y)  (x + (y->devdata->port_align << 1))
71  * struct mtk_drv_group_desc - Provide driving group data.
96  * struct mtk_pin_drv_grp - Provide each pin driving info.
119  * - For special pins' pull up/down setting which resides in same register
121  * @offset: The offset of special pull up/down setting register.
122  * @pupd_bit: The pull up/down bit in this register.
123  * @r0_bit: The r0 bit of pull resistor.
124  * @r1_bit: The r1 bit of pull resistor.
144  * struct mtk_pin_ies_set - For special pins' ies and smt setting.
190  * struct mtk_pinctrl_devdata - Provide HW GPIO related data.
196  * @spec_ies: Special pin setting for input enable
198  * @spec_pupd: Special pull up/down setting
202  * @spec_pull_set: Each SoC may have special pins for pull up/down setting,
203  *  these pins' pull setting are very different, they have separate pull
204  *  up/down bit, R0 and R1 resistor bit, so they need special pull setting.
206  *  return non-zero value.
207  * @spec_ies_smt_set: Some pins are irregular, their input enable and smt
209  * means when user set smt, input enable is set at the same time. So they
211  * return 0, otherwise return non-zero value.
224  * @pullen_offset: The pull-up/pull-down enable register offset.
227  * @type1_start: Some chips have two base addresses for pull select register,
260 			bool enable, bool isup);