Lines Matching +full:soc +full:- +full:dependent
1 /* SPDX-License-Identifier: GPL-2.0 */
26 * struct intel_pingroup - Description about group of pins
38 * struct intel_function - Description about a function
48 * struct intel_padgroup - Hardware pad group information
67 * enum - Special treatment for GPIO base in pad group
74 INTEL_GPIO_BASE_ZERO = -2,
75 INTEL_GPIO_BASE_NOMAP = -1,
80 * struct intel_community - Intel pin community description
100 * @pad_map: Optional non-linear mapping of the pads
145 #define __INTEL_COMMUNITY(b, s, e, g, n, gs, gn, soc) \ argument
148 .padown_offset = soc ## _PAD_OWN, \
149 .padcfglock_offset = soc ## _PADCFGLOCK, \
150 .hostown_offset = soc ## _HOSTSW_OWN, \
151 .is_offset = soc ## _GPI_IS, \
152 .ie_offset = soc ## _GPI_IE, \
156 .npins = ((e) - (s) + 1), \
161 #define INTEL_COMMUNITY_GPPS(b, s, e, g, soc) \ argument
162 __INTEL_COMMUNITY(b, s, e, g, ARRAY_SIZE(g), 0, 0, soc)
164 #define INTEL_COMMUNITY_SIZE(b, s, e, gs, gn, soc) \ argument
165 __INTEL_COMMUNITY(b, s, e, NULL, 0, gs, gn, soc)
168 * PIN_GROUP - Declare a pin group
192 * struct intel_pinctrl_soc_data - Intel pin controller per-SoC configuration
224 * struct intel_pinctrl_context - context to be saved during suspend-resume
225 * @pads: Opaque context per pad (driver dependent)
226 * @communities: Opaque context per community (driver dependent)
234 * struct intel_pinctrl - Intel pinctrl private structure
240 * @soc: SoC/PCH specific pin configuration data
252 const struct intel_pinctrl_soc_data *soc; member