Lines Matching refs:VPO12_DESC

1121 #define VPO12_DESC	{ ASPEED_IP_SCU, SCU94, GENMASK(1, 0), 1, 0 }  macro
1173 SIG_EXPR_DECL_SINGLE(VPODE, VPO12, U21_DESC, VPO12_DESC);
1174 SIG_EXPR_DECL_SINGLE(VPODE, VPO24, U21_DESC, VPO12_DESC);
1188 SIG_EXPR_DECL_SINGLE(VPOHS, VPO12, T19_DESC, VPO12_DESC);
1203 SIG_EXPR_DECL_SINGLE(VPOVS, VPO12, V22_DESC, VPO12_DESC);
1218 SIG_EXPR_DECL_SINGLE(VPOCLK, VPO12, U20_DESC, VPO12_DESC);
1596 SIG_EXPR_DECL_SINGLE(VPOB0, VPO12, R22_DESC, VPO12_DESC);
1611 SIG_EXPR_DECL_SINGLE(VPOB1, VPO12, P18_DESC, VPO12_DESC);
1626 SIG_EXPR_DECL_SINGLE(VPOB2, VPO12, P19_DESC, VPO12_DESC);
1641 SIG_EXPR_DECL_SINGLE(VPOB3, VPO12, P20_DESC, VPO12_DESC);
1656 SIG_EXPR_DECL_SINGLE(VPOB4, VPO12, P21_DESC, VPO12_DESC);
1671 SIG_EXPR_DECL_SINGLE(VPOB5, VPO12, P22_DESC, VPO12_DESC);
1686 SIG_EXPR_DECL_SINGLE(VPOB6, VPO12, M19_DESC, VPO12_DESC);
1701 SIG_EXPR_DECL_SINGLE(VPOB7, VPO12, M20_DESC, VPO12_DESC);
1716 SIG_EXPR_DECL_SINGLE(VPOG0, VPO12, M21_DESC, VPO12_DESC);
1731 SIG_EXPR_DECL_SINGLE(VPOG1, VPO12, M22_DESC, VPO12_DESC);
1746 SIG_EXPR_DECL_SINGLE(VPOG2, VPO12, L18_DESC, VPO12_DESC);
1761 SIG_EXPR_DECL_SINGLE(VPOG3, VPO12, L19_DESC, VPO12_DESC);