536 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM);  in tegra186_utmi_enable_phy_wake()
543 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM);  in tegra186_utmi_enable_phy_wake()
561 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM);  in tegra186_utmi_disable_phy_wake()
568 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM);  in tegra186_utmi_disable_phy_wake()
622 	padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL1);  in tegra186_utmi_bias_pad_power_on()
628 	padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL0);  in tegra186_utmi_bias_pad_power_on()
634 	padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL1);  in tegra186_utmi_bias_pad_power_on()
648 		padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL1);  in tegra186_utmi_bias_pad_power_on()
657 		padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL2);  in tegra186_utmi_bias_pad_power_on()
684 	padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL1);  in tegra186_utmi_bias_pad_power_off()
689 		padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL2);  in tegra186_utmi_bias_pad_power_off()
722 	padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index));  in tegra186_utmi_pad_power_on()
726 	padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index));  in tegra186_utmi_pad_power_on()
743 	padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index));  in tegra186_utmi_pad_power_down()
747 	padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index));  in tegra186_utmi_pad_power_down()
771 	padctl_writel(padctl, value, USB2_VBUS_ID);  in tegra186_xusb_padctl_vbus_override()
788 			padctl_writel(padctl, value, USB2_VBUS_ID);  in tegra186_xusb_padctl_id_override()
801 	padctl_writel(padctl, value, USB2_VBUS_ID);  in tegra186_xusb_padctl_id_override()
865 	padctl_writel(padctl, value, XUSB_PADCTL_USB2_PAD_MUX);  in tegra186_utmi_phy_power_on()
879 	padctl_writel(padctl, value, XUSB_PADCTL_USB2_PORT_CAP);  in tegra186_utmi_phy_power_on()
902 	padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index));  in tegra186_utmi_phy_power_on()
909 	padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index));  in tegra186_utmi_phy_power_on()
1115 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1);  in tegra186_usb3_enable_phy_sleepwalk()
1121 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1);  in tegra186_usb3_enable_phy_sleepwalk()
1140 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1);  in tegra186_usb3_disable_phy_sleepwalk()
1146 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1);  in tegra186_usb3_disable_phy_sleepwalk()
1164 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM);  in tegra186_usb3_enable_phy_wake()
1171 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM);  in tegra186_usb3_enable_phy_wake()
1189 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM);  in tegra186_usb3_disable_phy_wake()
1196 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM);  in tegra186_usb3_disable_phy_wake()
1285 	padctl_writel(padctl, value, XUSB_PADCTL_SS_PORT_CAP);  in tegra186_usb3_phy_power_on()
1293 		padctl_writel(padctl, value, XUSB_PADCTL_SS_PORT_CFG);  in tegra186_usb3_phy_power_on()
1298 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1);  in tegra186_usb3_phy_power_on()
1304 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1);  in tegra186_usb3_phy_power_on()
1310 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1);  in tegra186_usb3_phy_power_on()
1336 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1);  in tegra186_usb3_phy_power_off()
1342 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1);  in tegra186_usb3_phy_power_off()
1348 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1);  in tegra186_usb3_phy_power_off()
1513 	padctl_writel(padctl, priv->context.usb2_pad_mux, XUSB_PADCTL_USB2_PAD_MUX);  in tegra186_xusb_padctl_restore()
1514 	padctl_writel(padctl, priv->context.usb2_port_cap, XUSB_PADCTL_USB2_PORT_CAP);  in tegra186_xusb_padctl_restore()
1515 	padctl_writel(padctl, priv->context.ss_port_cap, XUSB_PADCTL_SS_PORT_CAP);  in tegra186_xusb_padctl_restore()
1516 	padctl_writel(padctl, priv->context.vbus_id, USB2_VBUS_ID);  in tegra186_xusb_padctl_restore()