365 static inline void miphy28lp_set_reset(struct miphy28lp_phy *miphy_phy)  in miphy28lp_set_reset()  argument
367 	void __iomem *base = miphy_phy->base;  in miphy28lp_set_reset()
379 	if (miphy_phy->type == PHY_TYPE_PCIE) {  in miphy28lp_set_reset()
388 static inline void miphy28lp_pll_calibration(struct miphy28lp_phy *miphy_phy,  in miphy28lp_pll_calibration()  argument
391 	void __iomem *base = miphy_phy->base;  in miphy28lp_pll_calibration()
412 	if (miphy_phy->type != PHY_TYPE_SATA)  in miphy28lp_pll_calibration()
417 	if (miphy_phy->type == PHY_TYPE_USB3) {  in miphy28lp_pll_calibration()
430 static inline void miphy28lp_sata_config_gen(struct miphy28lp_phy *miphy_phy)  in miphy28lp_sata_config_gen()  argument
432 	void __iomem *base = miphy_phy->base;  in miphy28lp_sata_config_gen()
457 static inline void miphy28lp_pcie_config_gen(struct miphy28lp_phy *miphy_phy)  in miphy28lp_pcie_config_gen()  argument
459 	void __iomem *base = miphy_phy->base;  in miphy28lp_pcie_config_gen()
486 static inline int miphy28lp_wait_compensation(struct miphy28lp_phy *miphy_phy)  in miphy28lp_wait_compensation()  argument
491 	return readb_relaxed_poll_timeout(miphy_phy->base + MIPHY_COMP_FSM_6,  in miphy28lp_wait_compensation()
496 static inline int miphy28lp_compensation(struct miphy28lp_phy *miphy_phy,  in miphy28lp_compensation()  argument
499 	void __iomem *base = miphy_phy->base;  in miphy28lp_compensation()
509 	if (miphy_phy->type == PHY_TYPE_PCIE)  in miphy28lp_compensation()
519 	if (miphy_phy->type == PHY_TYPE_PCIE)  in miphy28lp_compensation()
520 		return miphy28lp_wait_compensation(miphy_phy);  in miphy28lp_compensation()
525 static inline void miphy28_usb3_miphy_reset(struct miphy28lp_phy *miphy_phy)  in miphy28_usb3_miphy_reset()  argument
527 	void __iomem *base = miphy_phy->base;  in miphy28_usb3_miphy_reset()
553 static void miphy_sata_tune_ssc(struct miphy28lp_phy *miphy_phy)  in miphy_sata_tune_ssc()  argument
555 	void __iomem *base = miphy_phy->base;  in miphy_sata_tune_ssc()
591 static void miphy_pcie_tune_ssc(struct miphy28lp_phy *miphy_phy)  in miphy_pcie_tune_ssc()  argument
593 	void __iomem *base = miphy_phy->base;  in miphy_pcie_tune_ssc()
631 static inline void miphy_tune_tx_impedance(struct miphy28lp_phy *miphy_phy)  in miphy_tune_tx_impedance()  argument
634 	writeb_relaxed(0x02, miphy_phy->base + MIPHY_COMP_POSTP);  in miphy_tune_tx_impedance()
637 static inline int miphy28lp_configure_sata(struct miphy28lp_phy *miphy_phy)  in miphy28lp_configure_sata()  argument
639 	void __iomem *base = miphy_phy->base;  in miphy28lp_configure_sata()
644 	miphy28lp_set_reset(miphy_phy);  in miphy28lp_configure_sata()
647 	miphy28lp_pll_calibration(miphy_phy, &sata_pll_ratio);  in miphy28lp_configure_sata()
650 	miphy28lp_sata_config_gen(miphy_phy);  in miphy28lp_configure_sata()
661 	err = miphy28lp_compensation(miphy_phy, &sata_pll_ratio);  in miphy28lp_configure_sata()
665 	if (miphy_phy->px_rx_pol_inv) {  in miphy28lp_configure_sata()
667 		val = readb_relaxed(miphy_phy->base + MIPHY_CONTROL);  in miphy28lp_configure_sata()
669 		writeb_relaxed(val, miphy_phy->base + MIPHY_CONTROL);  in miphy28lp_configure_sata()
672 	if (miphy_phy->ssc)  in miphy28lp_configure_sata()
673 		miphy_sata_tune_ssc(miphy_phy);  in miphy28lp_configure_sata()
675 	if (miphy_phy->tx_impedance)  in miphy28lp_configure_sata()
676 		miphy_tune_tx_impedance(miphy_phy);  in miphy28lp_configure_sata()
681 static inline int miphy28lp_configure_pcie(struct miphy28lp_phy *miphy_phy)  in miphy28lp_configure_pcie()  argument
683 	void __iomem *base = miphy_phy->base;  in miphy28lp_configure_pcie()
687 	miphy28lp_set_reset(miphy_phy);  in miphy28lp_configure_pcie()
690 	miphy28lp_pll_calibration(miphy_phy, &pcie_pll_ratio);  in miphy28lp_configure_pcie()
693 	miphy28lp_pcie_config_gen(miphy_phy);  in miphy28lp_configure_pcie()
704 	err = miphy28lp_compensation(miphy_phy, &pcie_pll_ratio);  in miphy28lp_configure_pcie()
708 	if (miphy_phy->ssc)  in miphy28lp_configure_pcie()
709 		miphy_pcie_tune_ssc(miphy_phy);  in miphy28lp_configure_pcie()
711 	if (miphy_phy->tx_impedance)  in miphy28lp_configure_pcie()
712 		miphy_tune_tx_impedance(miphy_phy);  in miphy28lp_configure_pcie()
718 static inline void miphy28lp_configure_usb3(struct miphy28lp_phy *miphy_phy)  in miphy28lp_configure_usb3()  argument
720 	void __iomem *base = miphy_phy->base;  in miphy28lp_configure_usb3()
724 	miphy28lp_set_reset(miphy_phy);  in miphy28lp_configure_usb3()
727 	miphy28lp_pll_calibration(miphy_phy, &usb3_pll_ratio);  in miphy28lp_configure_usb3()
796 	miphy28_usb3_miphy_reset(miphy_phy);  in miphy28lp_configure_usb3()
799 static inline int miphy_is_ready(struct miphy28lp_phy *miphy_phy)  in miphy_is_ready()  argument
808 	if (miphy_phy->type == PHY_TYPE_SATA)  in miphy_is_ready()
811 	return readb_relaxed_poll_timeout(miphy_phy->base + MIPHY_STATUS_1,  in miphy_is_ready()
816 static int miphy_osc_is_ready(struct miphy28lp_phy *miphy_phy)  in miphy_osc_is_ready()  argument
818 	struct miphy28lp_dev *miphy_dev = miphy_phy->phydev;  in miphy_osc_is_ready()
821 	if (!miphy_phy->osc_rdy)  in miphy_osc_is_ready()
824 	if (!miphy_phy->syscfg_reg[SYSCFG_STATUS])  in miphy_osc_is_ready()
828 					miphy_phy->syscfg_reg[SYSCFG_STATUS],  in miphy_osc_is_ready()
866 static int miphy28lp_setup(struct miphy28lp_phy *miphy_phy, u32 miphy_val)  in miphy28lp_setup()  argument
869 	struct miphy28lp_dev *miphy_dev = miphy_phy->phydev;  in miphy28lp_setup()
871 	if (!miphy_phy->syscfg_reg[SYSCFG_CTRL])  in miphy28lp_setup()
874 	err = reset_control_assert(miphy_phy->miphy_rst);  in miphy28lp_setup()
880 	if (miphy_phy->osc_force_ext)  in miphy28lp_setup()
884 			   miphy_phy->syscfg_reg[SYSCFG_CTRL],  in miphy28lp_setup()
887 	err = reset_control_deassert(miphy_phy->miphy_rst);  in miphy28lp_setup()
893 	return miphy_osc_is_ready(miphy_phy);  in miphy28lp_setup()
896 static int miphy28lp_init_sata(struct miphy28lp_phy *miphy_phy)  in miphy28lp_init_sata()  argument
898 	struct miphy28lp_dev *miphy_dev = miphy_phy->phydev;  in miphy28lp_init_sata()
901 	if ((!miphy_phy->syscfg_reg[SYSCFG_SATA]) ||  in miphy28lp_init_sata()
902 			(!miphy_phy->syscfg_reg[SYSCFG_PCI]) ||  in miphy28lp_init_sata()
903 			(!miphy_phy->base))  in miphy28lp_init_sata()
906 	dev_info(miphy_dev->dev, "sata-up mode, addr 0x%p\n", miphy_phy->base);  in miphy28lp_init_sata()
909 	sata_conf |= ((miphy_phy->sata_gen - SATA_GEN1) << SATA_SPDMODE);  in miphy28lp_init_sata()
912 			   miphy_phy->syscfg_reg[SYSCFG_SATA],  in miphy28lp_init_sata()
915 	regmap_update_bits(miphy_dev->regmap, miphy_phy->syscfg_reg[SYSCFG_PCI],  in miphy28lp_init_sata()
919 	err = miphy28lp_setup(miphy_phy, MIPHY_CTRL_DEFAULT);  in miphy28lp_init_sata()
927 	miphy28lp_configure_sata(miphy_phy);  in miphy28lp_init_sata()
929 	return miphy_is_ready(miphy_phy);  in miphy28lp_init_sata()
932 static int miphy28lp_init_pcie(struct miphy28lp_phy *miphy_phy)  in miphy28lp_init_pcie()  argument
934 	struct miphy28lp_dev *miphy_dev = miphy_phy->phydev;  in miphy28lp_init_pcie()
937 	if ((!miphy_phy->syscfg_reg[SYSCFG_SATA]) ||  in miphy28lp_init_pcie()
938 			(!miphy_phy->syscfg_reg[SYSCFG_PCI])  in miphy28lp_init_pcie()
939 		|| (!miphy_phy->base) || (!miphy_phy->pipebase))  in miphy28lp_init_pcie()
942 	dev_info(miphy_dev->dev, "pcie-up mode, addr 0x%p\n", miphy_phy->base);  in miphy28lp_init_pcie()
946 			   miphy_phy->syscfg_reg[SYSCFG_SATA],  in miphy28lp_init_pcie()
949 	regmap_update_bits(miphy_dev->regmap, miphy_phy->syscfg_reg[SYSCFG_PCI],  in miphy28lp_init_pcie()
953 	err = miphy28lp_setup(miphy_phy, MIPHY_CTRL_DEFAULT);  in miphy28lp_init_pcie()
961 	err = miphy28lp_configure_pcie(miphy_phy);  in miphy28lp_init_pcie()
966 	writeb_relaxed(0x68, miphy_phy->pipebase + 0x104); /* Rise_0 */  in miphy28lp_init_pcie()
967 	writeb_relaxed(0x61, miphy_phy->pipebase + 0x105); /* Rise_1 */  in miphy28lp_init_pcie()
968 	writeb_relaxed(0x68, miphy_phy->pipebase + 0x108); /* Fall_0 */  in miphy28lp_init_pcie()
969 	writeb_relaxed(0x61, miphy_phy->pipebase + 0x109); /* Fall-1 */  in miphy28lp_init_pcie()
970 	writeb_relaxed(0x68, miphy_phy->pipebase + 0x10c); /* Threshold_0 */  in miphy28lp_init_pcie()
971 	writeb_relaxed(0x60, miphy_phy->pipebase + 0x10d); /* Threshold_1 */  in miphy28lp_init_pcie()
974 	return miphy_is_ready(miphy_phy);  in miphy28lp_init_pcie()
977 static int miphy28lp_init_usb3(struct miphy28lp_phy *miphy_phy)  in miphy28lp_init_usb3()  argument
979 	struct miphy28lp_dev *miphy_dev = miphy_phy->phydev;  in miphy28lp_init_usb3()
982 	if ((!miphy_phy->base) || (!miphy_phy->pipebase))  in miphy28lp_init_usb3()
985 	dev_info(miphy_dev->dev, "usb3-up mode, addr 0x%p\n", miphy_phy->base);  in miphy28lp_init_usb3()
988 	err = miphy28lp_setup(miphy_phy, MIPHY_CTRL_SYNC_D_EN);  in miphy28lp_init_usb3()
995 	miphy28lp_configure_usb3(miphy_phy);  in miphy28lp_init_usb3()
998 	writeb_relaxed(0x68, miphy_phy->pipebase + 0x23);  in miphy28lp_init_usb3()
999 	writeb_relaxed(0x61, miphy_phy->pipebase + 0x24);  in miphy28lp_init_usb3()
1000 	writeb_relaxed(0x68, miphy_phy->pipebase + 0x26);  in miphy28lp_init_usb3()
1001 	writeb_relaxed(0x61, miphy_phy->pipebase + 0x27);  in miphy28lp_init_usb3()
1002 	writeb_relaxed(0x18, miphy_phy->pipebase + 0x29);  in miphy28lp_init_usb3()
1003 	writeb_relaxed(0x61, miphy_phy->pipebase + 0x2a);  in miphy28lp_init_usb3()
1006 	writeb_relaxed(0X67, miphy_phy->pipebase + 0x68);  in miphy28lp_init_usb3()
1007 	writeb_relaxed(0x0d, miphy_phy->pipebase + 0x69);  in miphy28lp_init_usb3()
1008 	writeb_relaxed(0X67, miphy_phy->pipebase + 0x6a);  in miphy28lp_init_usb3()
1009 	writeb_relaxed(0X0d, miphy_phy->pipebase + 0x6b);  in miphy28lp_init_usb3()
1010 	writeb_relaxed(0X67, miphy_phy->pipebase + 0x6c);  in miphy28lp_init_usb3()
1011 	writeb_relaxed(0X0d, miphy_phy->pipebase + 0x6d);  in miphy28lp_init_usb3()
1012 	writeb_relaxed(0X67, miphy_phy->pipebase + 0x6e);  in miphy28lp_init_usb3()
1013 	writeb_relaxed(0X0d, miphy_phy->pipebase + 0x6f);  in miphy28lp_init_usb3()
1015 	return miphy_is_ready(miphy_phy);  in miphy28lp_init_usb3()
1020 	struct miphy28lp_phy *miphy_phy = phy_get_drvdata(phy);  in miphy28lp_init()  local
1021 	struct miphy28lp_dev *miphy_dev = miphy_phy->phydev;  in miphy28lp_init()
1026 	switch (miphy_phy->type) {  in miphy28lp_init()
1029 		ret = miphy28lp_init_sata(miphy_phy);  in miphy28lp_init()
1032 		ret = miphy28lp_init_pcie(miphy_phy);  in miphy28lp_init()
1035 		ret = miphy28lp_init_usb3(miphy_phy);  in miphy28lp_init()
1047 static int miphy28lp_get_addr(struct miphy28lp_phy *miphy_phy)  in miphy28lp_get_addr()  argument
1049 	struct miphy28lp_dev *miphy_dev = miphy_phy->phydev;  in miphy28lp_get_addr()
1050 	struct device_node *phynode = miphy_phy->phy->dev.of_node;  in miphy28lp_get_addr()
1053 	if ((miphy_phy->type != PHY_TYPE_SATA) &&  in miphy28lp_get_addr()
1054 	    (miphy_phy->type != PHY_TYPE_PCIE) &&  in miphy28lp_get_addr()
1055 	    (miphy_phy->type != PHY_TYPE_USB3)) {  in miphy28lp_get_addr()
1060 			PHY_TYPE_name[miphy_phy->type - PHY_TYPE_SATA],  in miphy28lp_get_addr()
1061 			&miphy_phy->base);  in miphy28lp_get_addr()
1065 	if ((miphy_phy->type == PHY_TYPE_PCIE) ||  in miphy28lp_get_addr()
1066 	    (miphy_phy->type == PHY_TYPE_USB3)) {  in miphy28lp_get_addr()
1068 					     &miphy_phy->pipebase);  in miphy28lp_get_addr()
1080 	struct miphy28lp_phy *miphy_phy = NULL;  in miphy28lp_xlate()  local
1091 			miphy_phy = miphy_dev->phys[index];  in miphy28lp_xlate()
1095 	if (!miphy_phy) {  in miphy28lp_xlate()
1100 	miphy_phy->type = args->args[0];  in miphy28lp_xlate()
1102 	ret = miphy28lp_get_addr(miphy_phy);  in miphy28lp_xlate()
1106 	return miphy_phy->phy;  in miphy28lp_xlate()
1115 				  struct miphy28lp_phy *miphy_phy)  in miphy28lp_probe_resets()  argument
1117 	struct miphy28lp_dev *miphy_dev = miphy_phy->phydev;  in miphy28lp_probe_resets()
1120 	miphy_phy->miphy_rst =  in miphy28lp_probe_resets()
1123 	if (IS_ERR(miphy_phy->miphy_rst)) {  in miphy28lp_probe_resets()
1126 		return PTR_ERR(miphy_phy->miphy_rst);  in miphy28lp_probe_resets()
1129 	err = reset_control_deassert(miphy_phy->miphy_rst);  in miphy28lp_probe_resets()
1139 			      struct miphy28lp_phy *miphy_phy)  in miphy28lp_of_probe()  argument
1144 	miphy_phy->osc_force_ext =  in miphy28lp_of_probe()
1147 	miphy_phy->osc_rdy = of_property_read_bool(np, "st,osc-rdy");  in miphy28lp_of_probe()
1149 	miphy_phy->px_rx_pol_inv =  in miphy28lp_of_probe()
1152 	miphy_phy->ssc = of_property_read_bool(np, "st,ssc-on");  in miphy28lp_of_probe()
1154 	miphy_phy->tx_impedance =  in miphy28lp_of_probe()
1157 	of_property_read_u32(np, "st,sata-gen", &miphy_phy->sata_gen);  in miphy28lp_of_probe()
1158 	if (!miphy_phy->sata_gen)  in miphy28lp_of_probe()
1159 		miphy_phy->sata_gen = SATA_GEN1;  in miphy28lp_of_probe()
1163 			miphy_phy->syscfg_reg[i] = ctrlreg;  in miphy28lp_of_probe()
1200 		struct miphy28lp_phy *miphy_phy;  in miphy28lp_probe()  local
1202 		miphy_phy = devm_kzalloc(&pdev->dev, sizeof(*miphy_phy),  in miphy28lp_probe()
1204 		if (!miphy_phy) {  in miphy28lp_probe()
1209 		miphy_dev->phys[port] = miphy_phy;  in miphy28lp_probe()
1221 		ret = miphy28lp_of_probe(child, miphy_phy);  in miphy28lp_probe()