284 static void phy_update_bits(struct inno_dsidphy *inno,  in phy_update_bits()  function
381 	phy_update_bits(inno, REGISTER_PART_LVDS, 0x03,  in inno_dsidphy_mipi_mode_enable()
384 	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x03,  in inno_dsidphy_mipi_mode_enable()
386 	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x03,  in inno_dsidphy_mipi_mode_enable()
388 	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x04,  in inno_dsidphy_mipi_mode_enable()
391 		phy_update_bits(inno, REGISTER_PART_ANALOG, 0x08,  in inno_dsidphy_mipi_mode_enable()
393 		phy_update_bits(inno, REGISTER_PART_ANALOG, 0x0b,  in inno_dsidphy_mipi_mode_enable()
398 	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x01,  in inno_dsidphy_mipi_mode_enable()
402 	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x01,  in inno_dsidphy_mipi_mode_enable()
405 	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x01,  in inno_dsidphy_mipi_mode_enable()
408 	phy_update_bits(inno, REGISTER_PART_DIGITAL, 0x00,  in inno_dsidphy_mipi_mode_enable()
411 	phy_update_bits(inno, REGISTER_PART_DIGITAL, 0x00,  in inno_dsidphy_mipi_mode_enable()
486 		phy_update_bits(inno, i, 0x05, T_LPX_CNT_MASK,  in inno_dsidphy_mipi_mode_enable()
488 		phy_update_bits(inno, i, 0x06, T_HS_PREPARE_CNT_MASK,  in inno_dsidphy_mipi_mode_enable()
491 			phy_update_bits(inno, i, 0x06, T_HS_ZERO_CNT_HI_MASK,  in inno_dsidphy_mipi_mode_enable()
493 		phy_update_bits(inno, i, 0x07, T_HS_ZERO_CNT_LO_MASK,  in inno_dsidphy_mipi_mode_enable()
495 		phy_update_bits(inno, i, 0x08, T_HS_TRAIL_CNT_MASK,  in inno_dsidphy_mipi_mode_enable()
498 			phy_update_bits(inno, i, 0x11, T_HS_EXIT_CNT_HI_MASK,  in inno_dsidphy_mipi_mode_enable()
500 		phy_update_bits(inno, i, 0x09, T_HS_EXIT_CNT_LO_MASK,  in inno_dsidphy_mipi_mode_enable()
503 			phy_update_bits(inno, i, 0x10, T_CLK_POST_CNT_HI_MASK,  in inno_dsidphy_mipi_mode_enable()
505 		phy_update_bits(inno, i, 0x0a, T_CLK_POST_CNT_LO_MASK,  in inno_dsidphy_mipi_mode_enable()
507 		phy_update_bits(inno, i, 0x0e, T_CLK_PRE_CNT_MASK,  in inno_dsidphy_mipi_mode_enable()
509 		phy_update_bits(inno, i, 0x0c, T_WAKEUP_CNT_HI_MASK,  in inno_dsidphy_mipi_mode_enable()
511 		phy_update_bits(inno, i, 0x0d, T_WAKEUP_CNT_LO_MASK,  in inno_dsidphy_mipi_mode_enable()
513 		phy_update_bits(inno, i, 0x10, T_TA_GO_CNT_MASK,  in inno_dsidphy_mipi_mode_enable()
515 		phy_update_bits(inno, i, 0x11, T_TA_SURE_CNT_MASK,  in inno_dsidphy_mipi_mode_enable()
517 		phy_update_bits(inno, i, 0x12, T_TA_WAIT_CNT_MASK,  in inno_dsidphy_mipi_mode_enable()
522 	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x00,  in inno_dsidphy_mipi_mode_enable()
533 	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x08,  in inno_dsidphy_lvds_mode_enable()
539 	phy_update_bits(inno, REGISTER_PART_LVDS, 0x03,  in inno_dsidphy_lvds_mode_enable()
542 	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x03,  in inno_dsidphy_lvds_mode_enable()
544 	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x03,  in inno_dsidphy_lvds_mode_enable()
546 	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x04,  in inno_dsidphy_lvds_mode_enable()
548 	phy_update_bits(inno, REGISTER_PART_LVDS, 0x08, 0xff, 0xfc);  in inno_dsidphy_lvds_mode_enable()
550 	phy_update_bits(inno, REGISTER_PART_LVDS, 0x0b,  in inno_dsidphy_lvds_mode_enable()
557 	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x1e,  in inno_dsidphy_lvds_mode_enable()
561 	phy_update_bits(inno, REGISTER_PART_LVDS, 0x00,  in inno_dsidphy_lvds_mode_enable()
565 	phy_update_bits(inno, REGISTER_PART_LVDS, 0x00,  in inno_dsidphy_lvds_mode_enable()
569 	phy_update_bits(inno, REGISTER_PART_LVDS, 0x01,  in inno_dsidphy_lvds_mode_enable()
573 	phy_update_bits(inno, REGISTER_PART_LVDS, 0x0b,  in inno_dsidphy_lvds_mode_enable()
588 	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x00,  in inno_dsidphy_power_on()
591 	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x00,  in inno_dsidphy_power_on()
612 	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x00, LANE_EN_MASK, 0);  in inno_dsidphy_power_off()
613 	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x01,  in inno_dsidphy_power_off()
616 	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x00,  in inno_dsidphy_power_off()
618 	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x00,  in inno_dsidphy_power_off()
621 	phy_update_bits(inno, REGISTER_PART_LVDS, 0x0b, LVDS_LANE_EN_MASK, 0);  in inno_dsidphy_power_off()
622 	phy_update_bits(inno, REGISTER_PART_LVDS, 0x01,  in inno_dsidphy_power_off()
625 	phy_update_bits(inno, REGISTER_PART_LVDS, 0x0b,  in inno_dsidphy_power_off()