Lines Matching refs:RXTX_REG127
451 #define RXTX_REG127 0x0fe macro
1104 serdes_rd(ctx, lane, RXTX_REG127, &val); in xgene_phy_sata_cfg_lanes()
1106 serdes_wr(ctx, lane, RXTX_REG127, val); in xgene_phy_sata_cfg_lanes()
1372 serdes_setbits(ctx, lane, RXTX_REG127, in xgene_phy_force_lat_summer_cal()
1379 serdes_clrbits(ctx, lane, RXTX_REG127, in xgene_phy_force_lat_summer_cal()
1388 serdes_setbits(ctx, lane, RXTX_REG127, in xgene_phy_force_lat_summer_cal()
1395 serdes_clrbits(ctx, lane, RXTX_REG127, in xgene_phy_force_lat_summer_cal()
1512 serdes_rd(ctx, lane, RXTX_REG127, &val); in xgene_phy_gen_avg_val()
1517 serdes_wr(ctx, lane, RXTX_REG127, val); in xgene_phy_gen_avg_val()
1565 serdes_rd(ctx, lane, RXTX_REG127, &val); in xgene_phy_gen_avg_val()
1568 serdes_wr(ctx, lane, RXTX_REG127, val); in xgene_phy_gen_avg_val()