695 	struct mtk_phy_instance *instance)  in hs_slew_rate_calibrate()  argument
697 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in hs_slew_rate_calibrate()
709 	if (instance->eye_src)  in hs_slew_rate_calibrate()
724 		tmp |= FIELD_PREP(P2F_RG_MONCLK_SEL, instance->index >> 1);  in hs_slew_rate_calibrate()
753 		instance->index, fm_out, calibration_val,  in hs_slew_rate_calibrate()
765 	struct mtk_phy_instance *instance)  in u3_phy_instance_init()  argument
767 	struct u3phy_banks *u3_banks = &instance->u3_banks;  in u3_phy_instance_init()
793 	dev_dbg(tphy->dev, "%s(%d)\n", __func__, instance->index);  in u3_phy_instance_init()
797 	struct mtk_phy_instance *instance)  in u2_phy_pll_26m_set()  argument
799 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in u2_phy_pll_26m_set()
816 	struct mtk_phy_instance *instance)  in u2_phy_instance_init()  argument
818 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in u2_phy_instance_init()
820 	u32 index = instance->index;  in u2_phy_instance_init()
856 	u2_phy_pll_26m_set(tphy, instance);  in u2_phy_instance_init()
862 	struct mtk_phy_instance *instance)  in u2_phy_instance_power_on()  argument
864 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in u2_phy_instance_power_on()
866 	u32 index = instance->index;  in u2_phy_instance_power_on()
884 	struct mtk_phy_instance *instance)  in u2_phy_instance_power_off()  argument
886 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in u2_phy_instance_power_off()
888 	u32 index = instance->index;  in u2_phy_instance_power_off()
907 	struct mtk_phy_instance *instance)  in u2_phy_instance_exit()  argument
909 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in u2_phy_instance_exit()
911 	u32 index = instance->index;  in u2_phy_instance_exit()
921 				     struct mtk_phy_instance *instance,  in u2_phy_instance_set_mode()  argument
924 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in u2_phy_instance_set_mode()
946 	struct mtk_phy_instance *instance)  in pcie_phy_instance_init()  argument
948 	struct u3phy_banks *u3_banks = &instance->u3_banks;  in pcie_phy_instance_init()
992 	dev_dbg(tphy->dev, "%s(%d)\n", __func__, instance->index);  in pcie_phy_instance_init()
996 	struct mtk_phy_instance *instance)  in pcie_phy_instance_power_on()  argument
998 	struct u3phy_banks *bank = &instance->u3_banks;  in pcie_phy_instance_power_on()
1008 	struct mtk_phy_instance *instance)  in pcie_phy_instance_power_off()  argument
1011 	struct u3phy_banks *bank = &instance->u3_banks;  in pcie_phy_instance_power_off()
1021 	struct mtk_phy_instance *instance)  in sata_phy_instance_init()  argument
1023 	struct u3phy_banks *u3_banks = &instance->u3_banks;  in sata_phy_instance_init()
1062 	dev_dbg(tphy->dev, "%s(%d)\n", __func__, instance->index);  in sata_phy_instance_init()
1066 			      struct mtk_phy_instance *instance)  in phy_v1_banks_init()  argument
1068 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in phy_v1_banks_init()
1069 	struct u3phy_banks *u3_banks = &instance->u3_banks;  in phy_v1_banks_init()
1071 	switch (instance->type) {  in phy_v1_banks_init()
1075 		u2_banks->com = instance->port_base + SSUSB_SIFSLV_V1_U2PHY_COM;  in phy_v1_banks_init()
1081 		u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V1_U3PHYD;  in phy_v1_banks_init()
1082 		u3_banks->phya = instance->port_base + SSUSB_SIFSLV_V1_U3PHYA;  in phy_v1_banks_init()
1085 		u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V1_U3PHYD;  in phy_v1_banks_init()
1094 			      struct mtk_phy_instance *instance)  in phy_v2_banks_init()  argument
1096 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in phy_v2_banks_init()
1097 	struct u3phy_banks *u3_banks = &instance->u3_banks;  in phy_v2_banks_init()
1099 	switch (instance->type) {  in phy_v2_banks_init()
1101 		u2_banks->misc = instance->port_base + SSUSB_SIFSLV_V2_MISC;  in phy_v2_banks_init()
1102 		u2_banks->fmreg = instance->port_base + SSUSB_SIFSLV_V2_U2FREQ;  in phy_v2_banks_init()
1103 		u2_banks->com = instance->port_base + SSUSB_SIFSLV_V2_U2PHY_COM;  in phy_v2_banks_init()
1107 		u3_banks->spllc = instance->port_base + SSUSB_SIFSLV_V2_SPLLC;  in phy_v2_banks_init()
1108 		u3_banks->chip = instance->port_base + SSUSB_SIFSLV_V2_CHIP;  in phy_v2_banks_init()
1109 		u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V2_U3PHYD;  in phy_v2_banks_init()
1110 		u3_banks->phya = instance->port_base + SSUSB_SIFSLV_V2_U3PHYA;  in phy_v2_banks_init()
1119 				struct mtk_phy_instance *instance)  in phy_parse_property()  argument
1121 	struct device *dev = &instance->phy->dev;  in phy_parse_property()
1123 	if (instance->type != PHY_TYPE_USB2)  in phy_parse_property()
1126 	instance->bc12_en = device_property_read_bool(dev, "mediatek,bc12");  in phy_parse_property()
1128 				 &instance->eye_src);  in phy_parse_property()
1130 				 &instance->eye_vrt);  in phy_parse_property()
1132 				 &instance->eye_term);  in phy_parse_property()
1134 				 &instance->intr);  in phy_parse_property()
1136 				 &instance->discth);  in phy_parse_property()
1138 				 &instance->pre_emphasis);  in phy_parse_property()
1140 		instance->bc12_en, instance->eye_src,  in phy_parse_property()
1141 		instance->eye_vrt, instance->eye_term,  in phy_parse_property()
1142 		instance->intr, instance->discth);  in phy_parse_property()
1143 	dev_dbg(dev, "pre-emp:%d\n", instance->pre_emphasis);  in phy_parse_property()
1147 			     struct mtk_phy_instance *instance)  in u2_phy_props_set()  argument
1149 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in u2_phy_props_set()
1152 	if (instance->bc12_en) /* BC1.2 path Enable */  in u2_phy_props_set()
1155 	if (tphy->pdata->version < MTK_PHY_V3 && instance->eye_src)  in u2_phy_props_set()
1157 				     instance->eye_src);  in u2_phy_props_set()
1159 	if (instance->eye_vrt)  in u2_phy_props_set()
1161 				     instance->eye_vrt);  in u2_phy_props_set()
1163 	if (instance->eye_term)  in u2_phy_props_set()
1165 				     instance->eye_term);  in u2_phy_props_set()
1167 	if (instance->intr) {  in u2_phy_props_set()
1173 				     instance->intr);  in u2_phy_props_set()
1176 	if (instance->discth)  in u2_phy_props_set()
1178 				     instance->discth);  in u2_phy_props_set()
1180 	if (instance->pre_emphasis)  in u2_phy_props_set()
1182 				     instance->pre_emphasis);  in u2_phy_props_set()
1186 static int phy_type_syscon_get(struct mtk_phy_instance *instance,  in phy_type_syscon_get()  argument
1201 	instance->type_sw_reg = args.args[0];  in phy_type_syscon_get()
1202 	instance->type_sw_index = args.args[1] & 0x3; /* <=3 */  in phy_type_syscon_get()
1203 	instance->type_sw = syscon_node_to_regmap(args.np);  in phy_type_syscon_get()
1205 	dev_info(&instance->phy->dev, "type_sw - reg %#x, index %d\n",  in phy_type_syscon_get()
1206 		 instance->type_sw_reg, instance->type_sw_index);  in phy_type_syscon_get()
1208 	return PTR_ERR_OR_ZERO(instance->type_sw);  in phy_type_syscon_get()
1211 static int phy_type_set(struct mtk_phy_instance *instance)  in phy_type_set()  argument
1216 	if (!instance->type_sw)  in phy_type_set()
1219 	switch (instance->type) {  in phy_type_set()
1237 	offset = instance->type_sw_index * BITS_PER_BYTE;  in phy_type_set()
1238 	regmap_update_bits(instance->type_sw, instance->type_sw_reg,  in phy_type_set()
1244 static int phy_efuse_get(struct mtk_tphy *tphy, struct mtk_phy_instance *instance)  in phy_efuse_get()  argument
1246 	struct device *dev = &instance->phy->dev;  in phy_efuse_get()
1251 		instance->efuse_sw_en = 0;  in phy_efuse_get()
1256 	instance->efuse_sw_en = device_property_read_bool(dev, "nvmem-cells");  in phy_efuse_get()
1257 	if (!instance->efuse_sw_en)  in phy_efuse_get()
1260 	switch (instance->type) {  in phy_efuse_get()
1262 		ret = nvmem_cell_read_variable_le_u32(dev, "intr", &instance->efuse_intr);  in phy_efuse_get()
1269 		if (!instance->efuse_intr) {  in phy_efuse_get()
1271 			instance->efuse_sw_en = 0;  in phy_efuse_get()
1275 		dev_dbg(dev, "u2 efuse - intr %x\n", instance->efuse_intr);  in phy_efuse_get()
1280 		ret = nvmem_cell_read_variable_le_u32(dev, "intr", &instance->efuse_intr);  in phy_efuse_get()
1286 		ret = nvmem_cell_read_variable_le_u32(dev, "rx_imp", &instance->efuse_rx_imp);  in phy_efuse_get()
1292 		ret = nvmem_cell_read_variable_le_u32(dev, "tx_imp", &instance->efuse_tx_imp);  in phy_efuse_get()
1299 		if (!instance->efuse_intr &&  in phy_efuse_get()
1300 		    !instance->efuse_rx_imp &&  in phy_efuse_get()
1301 		    !instance->efuse_tx_imp) {  in phy_efuse_get()
1303 			instance->efuse_sw_en = 0;  in phy_efuse_get()
1308 			instance->efuse_intr, instance->efuse_rx_imp,instance->efuse_tx_imp);  in phy_efuse_get()
1311 		dev_err(dev, "no sw efuse for type %d\n", instance->type);  in phy_efuse_get()
1318 static void phy_efuse_set(struct mtk_phy_instance *instance)  in phy_efuse_set()  argument
1320 	struct device *dev = &instance->phy->dev;  in phy_efuse_set()
1321 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in phy_efuse_set()
1322 	struct u3phy_banks *u3_banks = &instance->u3_banks;  in phy_efuse_set()
1324 	if (!instance->efuse_sw_en)  in phy_efuse_set()
1327 	switch (instance->type) {  in phy_efuse_set()
1332 				     instance->efuse_intr);  in phy_efuse_set()
1339 				    instance->efuse_tx_imp);  in phy_efuse_set()
1343 				    instance->efuse_rx_imp);  in phy_efuse_set()
1347 				    instance->efuse_intr);  in phy_efuse_set()
1350 		dev_warn(dev, "no sw efuse for type %d\n", instance->type);  in phy_efuse_set()
1357 	struct mtk_phy_instance *instance = phy_get_drvdata(phy);  in mtk_phy_init()  local
1361 	ret = clk_bulk_prepare_enable(TPHY_CLKS_CNT, instance->clks);  in mtk_phy_init()
1365 	phy_efuse_set(instance);  in mtk_phy_init()
1367 	switch (instance->type) {  in mtk_phy_init()
1369 		u2_phy_instance_init(tphy, instance);  in mtk_phy_init()
1370 		u2_phy_props_set(tphy, instance);  in mtk_phy_init()
1373 		u3_phy_instance_init(tphy, instance);  in mtk_phy_init()
1376 		pcie_phy_instance_init(tphy, instance);  in mtk_phy_init()
1379 		sata_phy_instance_init(tphy, instance);  in mtk_phy_init()
1386 		clk_bulk_disable_unprepare(TPHY_CLKS_CNT, instance->clks);  in mtk_phy_init()
1395 	struct mtk_phy_instance *instance = phy_get_drvdata(phy);  in mtk_phy_power_on()  local
1398 	if (instance->type == PHY_TYPE_USB2) {  in mtk_phy_power_on()
1399 		u2_phy_instance_power_on(tphy, instance);  in mtk_phy_power_on()
1400 		hs_slew_rate_calibrate(tphy, instance);  in mtk_phy_power_on()
1401 	} else if (instance->type == PHY_TYPE_PCIE) {  in mtk_phy_power_on()
1402 		pcie_phy_instance_power_on(tphy, instance);  in mtk_phy_power_on()
1410 	struct mtk_phy_instance *instance = phy_get_drvdata(phy);  in mtk_phy_power_off()  local
1413 	if (instance->type == PHY_TYPE_USB2)  in mtk_phy_power_off()
1414 		u2_phy_instance_power_off(tphy, instance);  in mtk_phy_power_off()
1415 	else if (instance->type == PHY_TYPE_PCIE)  in mtk_phy_power_off()
1416 		pcie_phy_instance_power_off(tphy, instance);  in mtk_phy_power_off()
1423 	struct mtk_phy_instance *instance = phy_get_drvdata(phy);  in mtk_phy_exit()  local
1426 	if (instance->type == PHY_TYPE_USB2)  in mtk_phy_exit()
1427 		u2_phy_instance_exit(tphy, instance);  in mtk_phy_exit()
1429 	clk_bulk_disable_unprepare(TPHY_CLKS_CNT, instance->clks);  in mtk_phy_exit()
1435 	struct mtk_phy_instance *instance = phy_get_drvdata(phy);  in mtk_phy_set_mode()  local
1438 	if (instance->type == PHY_TYPE_USB2)  in mtk_phy_set_mode()
1439 		u2_phy_instance_set_mode(tphy, instance, mode);  in mtk_phy_set_mode()
1448 	struct mtk_phy_instance *instance = NULL;  in mtk_phy_xlate()  local
1460 			instance = tphy->phys[index];  in mtk_phy_xlate()
1464 	if (!instance) {  in mtk_phy_xlate()
1469 	instance->type = args->args[0];  in mtk_phy_xlate()
1470 	if (!(instance->type == PHY_TYPE_USB2 ||  in mtk_phy_xlate()
1471 	      instance->type == PHY_TYPE_USB3 ||  in mtk_phy_xlate()
1472 	      instance->type == PHY_TYPE_PCIE ||  in mtk_phy_xlate()
1473 	      instance->type == PHY_TYPE_SATA ||  in mtk_phy_xlate()
1474 	      instance->type == PHY_TYPE_SGMII)) {  in mtk_phy_xlate()
1475 		dev_err(dev, "unsupported device type: %d\n", instance->type);  in mtk_phy_xlate()
1481 		phy_v1_banks_init(tphy, instance);  in mtk_phy_xlate()
1485 		phy_v2_banks_init(tphy, instance);  in mtk_phy_xlate()
1492 	ret = phy_efuse_get(tphy, instance);  in mtk_phy_xlate()
1496 	phy_parse_property(tphy, instance);  in mtk_phy_xlate()
1497 	phy_type_set(instance);  in mtk_phy_xlate()
1498 	phy_debugfs_init(instance);  in mtk_phy_xlate()
1500 	return instance->phy;  in mtk_phy_xlate()
1602 		struct mtk_phy_instance *instance;  in mtk_tphy_probe()  local
1607 		instance = devm_kzalloc(dev, sizeof(*instance), GFP_KERNEL);  in mtk_tphy_probe()
1608 		if (!instance) {  in mtk_tphy_probe()
1613 		tphy->phys[port] = instance;  in mtk_tphy_probe()
1630 		instance->port_base = devm_ioremap_resource(subdev, &res);  in mtk_tphy_probe()
1631 		if (IS_ERR(instance->port_base)) {  in mtk_tphy_probe()
1632 			retval = PTR_ERR(instance->port_base);  in mtk_tphy_probe()
1636 		instance->phy = phy;  in mtk_tphy_probe()
1637 		instance->index = port;  in mtk_tphy_probe()
1638 		phy_set_drvdata(phy, instance);  in mtk_tphy_probe()
1641 		clks = instance->clks;  in mtk_tphy_probe()
1648 		retval = phy_type_syscon_get(instance, child_np);  in mtk_tphy_probe()