124 	struct mtk_mipi_tx *mipi_tx = mtk_mipi_tx_from_clk_hw(hw);  in mtk_mipi_tx_pll_prepare()  local
125 	void __iomem *base = mipi_tx->regs;  in mtk_mipi_tx_pll_prepare()
129 	dev_dbg(mipi_tx->dev, "prepare: %u Hz\n", mipi_tx->data_rate);  in mtk_mipi_tx_pll_prepare()
131 	if (mipi_tx->data_rate >= 500000000) {  in mtk_mipi_tx_pll_prepare()
135 	} else if (mipi_tx->data_rate >= 250000000) {  in mtk_mipi_tx_pll_prepare()
139 	} else if (mipi_tx->data_rate >= 125000000) {  in mtk_mipi_tx_pll_prepare()
143 	} else if (mipi_tx->data_rate > 62000000) {  in mtk_mipi_tx_pll_prepare()
147 	} else if (mipi_tx->data_rate >= 50000000) {  in mtk_mipi_tx_pll_prepare()
196 	pcw = div_u64(((u64)mipi_tx->data_rate * 2 * txdiv) << 24, 26000000);  in mtk_mipi_tx_pll_prepare()
209 			     mipi_tx->driver_data->mppll_preserve);  in mtk_mipi_tx_pll_prepare()
216 	struct mtk_mipi_tx *mipi_tx = mtk_mipi_tx_from_clk_hw(hw);  in mtk_mipi_tx_pll_unprepare()  local
217 	void __iomem *base = mipi_tx->regs;  in mtk_mipi_tx_pll_unprepare()
219 	dev_dbg(mipi_tx->dev, "unprepare\n");  in mtk_mipi_tx_pll_unprepare()
256 	struct mtk_mipi_tx *mipi_tx = phy_get_drvdata(phy);  in mtk_mipi_tx_power_on_signal()  local
261 		mtk_phy_set_bits(mipi_tx->regs + reg, RG_DSI_LNTx_LDOOUT_EN);  in mtk_mipi_tx_power_on_signal()
263 	mtk_phy_clear_bits(mipi_tx->regs + MIPITX_DSI_TOP_CON,  in mtk_mipi_tx_power_on_signal()
269 	struct mtk_mipi_tx *mipi_tx = phy_get_drvdata(phy);  in mtk_mipi_tx_power_off_signal()  local
272 	mtk_phy_set_bits(mipi_tx->regs + MIPITX_DSI_TOP_CON,  in mtk_mipi_tx_power_off_signal()
277 		mtk_phy_clear_bits(mipi_tx->regs + reg, RG_DSI_LNTx_LDOOUT_EN);  in mtk_mipi_tx_power_off_signal()