Lines Matching refs:id
270 unsigned id; member
342 regmap_read(priv->regmap, MVEBU_COMPHY_CONF1(lane->id), &val); in mvebu_comphy_ethernet_init_reset()
345 regmap_write(priv->regmap, MVEBU_COMPHY_CONF1(lane->id), val); in mvebu_comphy_ethernet_init_reset()
348 val = readl(priv->base + MVEBU_COMPHY_SERDES_CFG0(lane->id)); in mvebu_comphy_ethernet_init_reset()
381 lane->id); in mvebu_comphy_ethernet_init_reset()
385 writel(val, priv->base + MVEBU_COMPHY_SERDES_CFG0(lane->id)); in mvebu_comphy_ethernet_init_reset()
390 switch (lane->id) { in mvebu_comphy_ethernet_init_reset()
402 lane->id); in mvebu_comphy_ethernet_init_reset()
410 val = readl(priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id)); in mvebu_comphy_ethernet_init_reset()
414 writel(val, priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id)); in mvebu_comphy_ethernet_init_reset()
417 val = readl(priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id)); in mvebu_comphy_ethernet_init_reset()
420 writel(val, priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id)); in mvebu_comphy_ethernet_init_reset()
426 regmap_read(priv->regmap, MVEBU_COMPHY_CONF6(lane->id), &val); in mvebu_comphy_ethernet_init_reset()
428 regmap_write(priv->regmap, MVEBU_COMPHY_CONF6(lane->id), val); in mvebu_comphy_ethernet_init_reset()
431 val = readl(priv->base + MVEBU_COMPHY_MISC_CTRL0(lane->id)); in mvebu_comphy_ethernet_init_reset()
435 writel(val, priv->base + MVEBU_COMPHY_MISC_CTRL0(lane->id)); in mvebu_comphy_ethernet_init_reset()
438 val = readl(priv->base + MVEBU_COMPHY_PWRPLL_CTRL(lane->id)); in mvebu_comphy_ethernet_init_reset()
443 writel(val, priv->base + MVEBU_COMPHY_PWRPLL_CTRL(lane->id)); in mvebu_comphy_ethernet_init_reset()
445 val = readl(priv->base + MVEBU_COMPHY_LOOPBACK(lane->id)); in mvebu_comphy_ethernet_init_reset()
448 writel(val, priv->base + MVEBU_COMPHY_LOOPBACK(lane->id)); in mvebu_comphy_ethernet_init_reset()
459 val = readl(priv->base + MVEBU_COMPHY_SERDES_CFG0(lane->id)); in mvebu_comphy_init_plls()
463 writel(val, priv->base + MVEBU_COMPHY_SERDES_CFG0(lane->id)); in mvebu_comphy_init_plls()
466 readl_poll_timeout(priv->base + MVEBU_COMPHY_SERDES_STATUS0(lane->id), in mvebu_comphy_init_plls()
476 val = readl(priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id)); in mvebu_comphy_init_plls()
478 writel(val, priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id)); in mvebu_comphy_init_plls()
481 readl_poll_timeout(priv->base + MVEBU_COMPHY_SERDES_STATUS0(lane->id), in mvebu_comphy_init_plls()
487 val = readl(priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id)); in mvebu_comphy_init_plls()
489 writel(val, priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id)); in mvebu_comphy_init_plls()
505 val = readl(priv->base + MVEBU_COMPHY_RX_CTRL1(lane->id)); in mvebu_comphy_set_mode_sgmii()
508 writel(val, priv->base + MVEBU_COMPHY_RX_CTRL1(lane->id)); in mvebu_comphy_set_mode_sgmii()
510 val = readl(priv->base + MVEBU_COMPHY_DTL_CTRL(lane->id)); in mvebu_comphy_set_mode_sgmii()
512 writel(val, priv->base + MVEBU_COMPHY_DTL_CTRL(lane->id)); in mvebu_comphy_set_mode_sgmii()
514 regmap_read(priv->regmap, MVEBU_COMPHY_CONF1(lane->id), &val); in mvebu_comphy_set_mode_sgmii()
517 regmap_write(priv->regmap, MVEBU_COMPHY_CONF1(lane->id), val); in mvebu_comphy_set_mode_sgmii()
519 val = readl(priv->base + MVEBU_COMPHY_GEN1_S0(lane->id)); in mvebu_comphy_set_mode_sgmii()
522 writel(val, priv->base + MVEBU_COMPHY_GEN1_S0(lane->id)); in mvebu_comphy_set_mode_sgmii()
538 val = readl(priv->base + MVEBU_COMPHY_RX_CTRL1(lane->id)); in mvebu_comphy_set_mode_rxaui()
541 writel(val, priv->base + MVEBU_COMPHY_RX_CTRL1(lane->id)); in mvebu_comphy_set_mode_rxaui()
543 val = readl(priv->base + MVEBU_COMPHY_DTL_CTRL(lane->id)); in mvebu_comphy_set_mode_rxaui()
545 writel(val, priv->base + MVEBU_COMPHY_DTL_CTRL(lane->id)); in mvebu_comphy_set_mode_rxaui()
547 val = readl(priv->base + MVEBU_COMPHY_SERDES_CFG2(lane->id)); in mvebu_comphy_set_mode_rxaui()
549 writel(val, priv->base + MVEBU_COMPHY_SERDES_CFG2(lane->id)); in mvebu_comphy_set_mode_rxaui()
551 val = readl(priv->base + MVEBU_COMPHY_DFE_RES(lane->id)); in mvebu_comphy_set_mode_rxaui()
553 writel(val, priv->base + MVEBU_COMPHY_DFE_RES(lane->id)); in mvebu_comphy_set_mode_rxaui()
555 val = readl(priv->base + MVEBU_COMPHY_GEN1_S0(lane->id)); in mvebu_comphy_set_mode_rxaui()
558 writel(val, priv->base + MVEBU_COMPHY_GEN1_S0(lane->id)); in mvebu_comphy_set_mode_rxaui()
560 val = readl(priv->base + MVEBU_COMPHY_GEN1_S1(lane->id)); in mvebu_comphy_set_mode_rxaui()
566 writel(val, priv->base + MVEBU_COMPHY_GEN1_S1(lane->id)); in mvebu_comphy_set_mode_rxaui()
568 val = readl(priv->base + MVEBU_COMPHY_COEF(lane->id)); in mvebu_comphy_set_mode_rxaui()
570 writel(val, priv->base + MVEBU_COMPHY_COEF(lane->id)); in mvebu_comphy_set_mode_rxaui()
572 val = readl(priv->base + MVEBU_COMPHY_GEN1_S4(lane->id)); in mvebu_comphy_set_mode_rxaui()
575 writel(val, priv->base + MVEBU_COMPHY_GEN1_S4(lane->id)); in mvebu_comphy_set_mode_rxaui()
591 val = readl(priv->base + MVEBU_COMPHY_RX_CTRL1(lane->id)); in mvebu_comphy_set_mode_10gbaser()
594 writel(val, priv->base + MVEBU_COMPHY_RX_CTRL1(lane->id)); in mvebu_comphy_set_mode_10gbaser()
596 val = readl(priv->base + MVEBU_COMPHY_DTL_CTRL(lane->id)); in mvebu_comphy_set_mode_10gbaser()
598 writel(val, priv->base + MVEBU_COMPHY_DTL_CTRL(lane->id)); in mvebu_comphy_set_mode_10gbaser()
601 val = readl(priv->base + MVEBU_COMPHY_SPEED_DIV(lane->id)); in mvebu_comphy_set_mode_10gbaser()
603 writel(val, priv->base + MVEBU_COMPHY_SPEED_DIV(lane->id)); in mvebu_comphy_set_mode_10gbaser()
605 val = readl(priv->base + MVEBU_COMPHY_SERDES_CFG2(lane->id)); in mvebu_comphy_set_mode_10gbaser()
607 writel(val, priv->base + MVEBU_COMPHY_SERDES_CFG2(lane->id)); in mvebu_comphy_set_mode_10gbaser()
610 val = readl(priv->base + MVEBU_COMPHY_DFE_RES(lane->id)); in mvebu_comphy_set_mode_10gbaser()
612 writel(val, priv->base + MVEBU_COMPHY_DFE_RES(lane->id)); in mvebu_comphy_set_mode_10gbaser()
614 val = readl(priv->base + MVEBU_COMPHY_GEN1_S0(lane->id)); in mvebu_comphy_set_mode_10gbaser()
619 writel(val, priv->base + MVEBU_COMPHY_GEN1_S0(lane->id)); in mvebu_comphy_set_mode_10gbaser()
621 val = readl(priv->base + MVEBU_COMPHY_GEN1_S2(lane->id)); in mvebu_comphy_set_mode_10gbaser()
624 writel(val, priv->base + MVEBU_COMPHY_GEN1_S2(lane->id)); in mvebu_comphy_set_mode_10gbaser()
626 val = readl(priv->base + MVEBU_COMPHY_TX_SLEW_RATE(lane->id)); in mvebu_comphy_set_mode_10gbaser()
629 writel(val, priv->base + MVEBU_COMPHY_TX_SLEW_RATE(lane->id)); in mvebu_comphy_set_mode_10gbaser()
632 val = readl(priv->base + MVEBU_COMPHY_IMP_CAL(lane->id)); in mvebu_comphy_set_mode_10gbaser()
636 writel(val, priv->base + MVEBU_COMPHY_IMP_CAL(lane->id)); in mvebu_comphy_set_mode_10gbaser()
638 val = readl(priv->base + MVEBU_COMPHY_GEN1_S5(lane->id)); in mvebu_comphy_set_mode_10gbaser()
640 writel(val, priv->base + MVEBU_COMPHY_GEN1_S5(lane->id)); in mvebu_comphy_set_mode_10gbaser()
642 val = readl(priv->base + MVEBU_COMPHY_GEN1_S1(lane->id)); in mvebu_comphy_set_mode_10gbaser()
652 writel(val, priv->base + MVEBU_COMPHY_GEN1_S1(lane->id)); in mvebu_comphy_set_mode_10gbaser()
654 val = readl(priv->base + MVEBU_COMPHY_COEF(lane->id)); in mvebu_comphy_set_mode_10gbaser()
656 writel(val, priv->base + MVEBU_COMPHY_COEF(lane->id)); in mvebu_comphy_set_mode_10gbaser()
658 val = readl(priv->base + MVEBU_COMPHY_GEN1_S4(lane->id)); in mvebu_comphy_set_mode_10gbaser()
661 writel(val, priv->base + MVEBU_COMPHY_GEN1_S4(lane->id)); in mvebu_comphy_set_mode_10gbaser()
663 val = readl(priv->base + MVEBU_COMPHY_GEN1_S3(lane->id)); in mvebu_comphy_set_mode_10gbaser()
665 writel(val, priv->base + MVEBU_COMPHY_GEN1_S3(lane->id)); in mvebu_comphy_set_mode_10gbaser()
668 val = readl(priv->base + MVEBU_COMPHY_TRAINING5(lane->id)); in mvebu_comphy_set_mode_10gbaser()
671 writel(val, priv->base + MVEBU_COMPHY_TRAINING5(lane->id)); in mvebu_comphy_set_mode_10gbaser()
674 val = readl(priv->base + MVEBU_COMPHY_TRAINING0(lane->id)); in mvebu_comphy_set_mode_10gbaser()
676 writel(val, priv->base + MVEBU_COMPHY_TRAINING0(lane->id)); in mvebu_comphy_set_mode_10gbaser()
678 val = readl(priv->base + MVEBU_COMPHY_TX_PRESET(lane->id)); in mvebu_comphy_set_mode_10gbaser()
681 writel(val, priv->base + MVEBU_COMPHY_TX_PRESET(lane->id)); in mvebu_comphy_set_mode_10gbaser()
683 val = readl(priv->base + MVEBU_COMPHY_FRAME_DETECT3(lane->id)); in mvebu_comphy_set_mode_10gbaser()
685 writel(val, priv->base + MVEBU_COMPHY_FRAME_DETECT3(lane->id)); in mvebu_comphy_set_mode_10gbaser()
687 val = readl(priv->base + MVEBU_COMPHY_TX_TRAIN_PRESET(lane->id)); in mvebu_comphy_set_mode_10gbaser()
690 writel(val, priv->base + MVEBU_COMPHY_TX_TRAIN_PRESET(lane->id)); in mvebu_comphy_set_mode_10gbaser()
692 val = readl(priv->base + MVEBU_COMPHY_FRAME_DETECT0(lane->id)); in mvebu_comphy_set_mode_10gbaser()
695 writel(val, priv->base + MVEBU_COMPHY_FRAME_DETECT0(lane->id)); in mvebu_comphy_set_mode_10gbaser()
697 val = readl(priv->base + MVEBU_COMPHY_DME(lane->id)); in mvebu_comphy_set_mode_10gbaser()
699 writel(val, priv->base + MVEBU_COMPHY_DME(lane->id)); in mvebu_comphy_set_mode_10gbaser()
701 val = readl(priv->base + MVEBU_COMPHY_VDD_CAL0(lane->id)); in mvebu_comphy_set_mode_10gbaser()
703 writel(val, priv->base + MVEBU_COMPHY_VDD_CAL0(lane->id)); in mvebu_comphy_set_mode_10gbaser()
705 val = readl(priv->base + MVEBU_SP_CALIB(lane->id)); in mvebu_comphy_set_mode_10gbaser()
709 writel(val, priv->base + MVEBU_SP_CALIB(lane->id)); in mvebu_comphy_set_mode_10gbaser()
711 writel(val, priv->base + MVEBU_SP_CALIB(lane->id)); in mvebu_comphy_set_mode_10gbaser()
714 val = readl(priv->base + MVEBU_COMPHY_EXT_SELV(lane->id)); in mvebu_comphy_set_mode_10gbaser()
717 writel(val, priv->base + MVEBU_COMPHY_EXT_SELV(lane->id)); in mvebu_comphy_set_mode_10gbaser()
729 mux = mvebu_comphy_get_mux(lane->id, lane->port, in mvebu_comphy_power_on_legacy()
735 val &= ~(0xf << MVEBU_COMPHY_PIPE_SELECTOR_PIPE(lane->id)); in mvebu_comphy_power_on_legacy()
739 val &= ~(0xf << MVEBU_COMPHY_SELECTOR_PHY(lane->id)); in mvebu_comphy_power_on_legacy()
740 val |= mux << MVEBU_COMPHY_SELECTOR_PHY(lane->id); in mvebu_comphy_power_on_legacy()
759 val = readl(priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id)); in mvebu_comphy_power_on_legacy()
761 writel(val, priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id)); in mvebu_comphy_power_on_legacy()
774 fw_mode = mvebu_comphy_get_fw_mode(lane->id, lane->port, in mvebu_comphy_power_on()
785 lane->id); in mvebu_comphy_power_on()
790 lane->id); in mvebu_comphy_power_on()
795 lane->id); in mvebu_comphy_power_on()
800 lane->id); in mvebu_comphy_power_on()
805 lane->id); in mvebu_comphy_power_on()
817 dev_dbg(priv->dev, "set lane %d to USB3 mode\n", lane->id); in mvebu_comphy_power_on()
821 dev_dbg(priv->dev, "set lane %d to SATA mode\n", lane->id); in mvebu_comphy_power_on()
825 dev_dbg(priv->dev, "set lane %d to PCIe mode (x%d)\n", lane->id, in mvebu_comphy_power_on()
835 ret = mvebu_comphy_smc(COMPHY_SIP_POWER_ON, priv->cp_phys, lane->id, in mvebu_comphy_power_on()
846 lane->id, lane->mode, ret); in mvebu_comphy_power_on()
861 if (mvebu_comphy_get_fw_mode(lane->id, lane->port, mode, submode) < 0) in mvebu_comphy_set_mode()
880 val = readl(priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id)); in mvebu_comphy_power_off_legacy()
884 writel(val, priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id)); in mvebu_comphy_power_off_legacy()
887 val &= ~(0xf << MVEBU_COMPHY_SELECTOR_PHY(lane->id)); in mvebu_comphy_power_off_legacy()
891 val &= ~(0xf << MVEBU_COMPHY_PIPE_SELECTOR_PIPE(lane->id)); in mvebu_comphy_power_off_legacy()
904 lane->id, 0); in mvebu_comphy_power_off()
1070 lane->id = val; in mvebu_comphy_probe()