Lines Matching refs:crgctrl
156 struct regmap *crgctrl; member
378 regmap_write(phy->crgctrl, CRGPERIPH_PEREN12, in hi3670_pcie_hp_debounce_gt()
382 regmap_write(phy->crgctrl, CRGPERIPH_PERDIS12, in hi3670_pcie_hp_debounce_gt()
390 regmap_read(phy->crgctrl, CRGPERIPH_PCIECTRL0, &val); in hi3670_pcie_phyref_gt()
397 regmap_write(phy->crgctrl, CRGPERIPH_PCIECTRL0, val); in hi3670_pcie_phyref_gt()
400 regmap_write(phy->crgctrl, CRGPERIPH_PERDIS12, IO_PHYREF_SOFT_GT_MODE); in hi3670_pcie_phyref_gt()
407 regmap_read(phy->crgctrl, CRGPERIPH_PCIECTRL0, &val); in hi3670_pcie_oe_ctrl()
426 regmap_write(phy->crgctrl, CRGPERIPH_PCIECTRL0, val); in hi3670_pcie_oe_ctrl()
440 regmap_read(phy->crgctrl, CRGPERIPH_PCIECTRL0, &val); in hi3670_pcie_ioref_gt()
442 regmap_write(phy->crgctrl, CRGPERIPH_PCIECTRL0, val); in hi3670_pcie_ioref_gt()
445 regmap_write(phy->crgctrl, CRGPERIPH_PERDIS12, in hi3670_pcie_ioref_gt()
450 regmap_read(phy->crgctrl, CRGPERIPH_PCIECTRL0, &val); in hi3670_pcie_ioref_gt()
452 regmap_write(phy->crgctrl, CRGPERIPH_PCIECTRL0, val); in hi3670_pcie_ioref_gt()
455 regmap_write(phy->crgctrl, CRGPERIPH_PERDIS12, in hi3670_pcie_ioref_gt()
677 regmap_write(phy->crgctrl, CRGCTRL_PCIE_ASSERT_OFFSET, in hi3670_pcie_phy_power_on()
751 phy->crgctrl = syscon_regmap_lookup_by_compatible("hisilicon,hi3670-crgctrl"); in hi3670_pcie_phy_get_resources()
752 if (IS_ERR(phy->crgctrl)) in hi3670_pcie_phy_get_resources()
753 return PTR_ERR(phy->crgctrl); in hi3670_pcie_phy_get_resources()