211 static void brcm_sata_phy_wr(struct brcm_sata_port *port, u32 bank,  in brcm_sata_phy_wr()  function
255 	brcm_sata_phy_wr(port, TXPMD_REG_BANK, TXPMD_CONTROL1, ~tmp, tmp);  in brcm_stb_sata_ssc_init()
258 	brcm_sata_phy_wr(port, TXPMD_REG_BANK, TXPMD_TX_FREQ_CTRL_CONTROL2,  in brcm_stb_sata_ssc_init()
270 	brcm_sata_phy_wr(port, TXPMD_REG_BANK, TXPMD_TX_FREQ_CTRL_CONTROL3,  in brcm_stb_sata_ssc_init()
299 	brcm_sata_phy_wr(port, AEQRX_REG_BANK_0, reg, ~tmp, tmp);  in brcm_stb_sata_rxaeq_init()
300 	brcm_sata_phy_wr(port, AEQRX_REG_BANK_1, reg, ~tmp, tmp);  in brcm_stb_sata_rxaeq_init()
317 	brcm_sata_phy_wr(port, PLL1_REG_BANK, PLL1_ACTRL6, 0, 0x141);  in brcm_stb_sata_16nm_ssc_init()
320 	brcm_sata_phy_wr(port, PLL1_REG_BANK, PLL1_ACTRL8, 0, 0xc006);  in brcm_stb_sata_16nm_ssc_init()
324 	brcm_sata_phy_wr(port, AEQRX_REG_BANK_0, AEQ_FRC_EQ,  in brcm_stb_sata_16nm_ssc_init()
334 	brcm_sata_phy_wr(port, RXPMD_REG_BANK, RXPMD_RX_CDR_CONTROL1,  in brcm_stb_sata_16nm_ssc_init()
349 	brcm_sata_phy_wr(port, RXPMD_REG_BANK, RXPMD_RX_CDR_CDR_PROP_BW, ~tmp,  in brcm_stb_sata_16nm_ssc_init()
362 	brcm_sata_phy_wr(port, RXPMD_REG_BANK, RXPMD_RX_CDR_CDR_ACQ_INTEG_BW,  in brcm_stb_sata_16nm_ssc_init()
375 	brcm_sata_phy_wr(port, RXPMD_REG_BANK, RXPMD_RX_CDR_CDR_LOCK_INTEG_BW,  in brcm_stb_sata_16nm_ssc_init()
384 	brcm_sata_phy_wr(port, RXPMD_REG_BANK, RXPMD_RX_FREQ_MON_CONTROL1,  in brcm_stb_sata_16nm_ssc_init()
407 		brcm_sata_phy_wr(port, BLOCK1_REG_BANK, BLOCK1_TEST_TX, ~tmp,  in brcm_stb_sata_16nm_ssc_init()
411 	brcm_sata_phy_wr(port, TX_REG_BANK, TX_ACTRL5, ~TX_ACTRL5_SSC_EN,  in brcm_stb_sata_16nm_ssc_init()
440 	brcm_sata_phy_wr(port, OOB_REG_BANK, OOB_CTRL1, 0x0, val);  in brcm_ns2_sata_init()
445 	brcm_sata_phy_wr(port, OOB_REG_BANK, OOB_CTRL2, 0x0, val);  in brcm_ns2_sata_init()
449 	brcm_sata_phy_wr(port, PLL1_REG_BANK, PLL1_ACTRL2, 0x0, val);  in brcm_ns2_sata_init()
451 	brcm_sata_phy_wr(port, PLL1_REG_BANK, PLL1_ACTRL3, 0x0, val);  in brcm_ns2_sata_init()
453 	brcm_sata_phy_wr(port, PLL1_REG_BANK, PLL1_ACTRL4, 0x0, val);  in brcm_ns2_sata_init()
457 	brcm_sata_phy_wr(port, BLOCK0_REG_BANK, BLOCK0_SPARE,  in brcm_ns2_sata_init()
507 	brcm_sata_phy_wr(port, oob_bank, OOB_CTRL1, 0x0, val);  in brcm_nsp_sata_init()
513 	brcm_sata_phy_wr(port, oob_bank, OOB_CTRL2, 0x0, val);  in brcm_nsp_sata_init()
516 	brcm_sata_phy_wr(port, PLL_REG_BANK_0, PLL_ACTRL2,  in brcm_nsp_sata_init()
520 	brcm_sata_phy_wr(port, PLL_REG_BANK_0, PLL_CAP_CONTROL,  in brcm_nsp_sata_init()
524 	brcm_sata_phy_wr(port, PLL_REG_BANK_0, PLL_REG_BANK_0_PLLCONTROL_0,  in brcm_nsp_sata_init()
527 	brcm_sata_phy_wr(port, PLL_REG_BANK_0, PLL_REG_BANK_0_PLLCONTROL_0,  in brcm_nsp_sata_init()
530 	brcm_sata_phy_wr(port, PLL_REG_BANK_0, PLL_REG_BANK_0_PLLCONTROL_0,  in brcm_nsp_sata_init()
568 	brcm_sata_phy_wr(port, PLL1_REG_BANK, PLL1_ACTRL2, 0x0, val);  in brcm_sr_sata_init()
570 	brcm_sata_phy_wr(port, PLL1_REG_BANK, PLL1_ACTRL3, 0x0, val);  in brcm_sr_sata_init()
572 	brcm_sata_phy_wr(port, PLL1_REG_BANK, PLL1_ACTRL4, 0x0, val);  in brcm_sr_sata_init()
576 	brcm_sata_phy_wr(port, PLL_REG_BANK_0, PLL_ACTRL6, 0x0, val);  in brcm_sr_sata_init()
596 	brcm_sata_phy_wr(port, TX_REG_BANK, TX_ACTRL0,  in brcm_sr_sata_init()
604 	brcm_sata_phy_wr(port, OOB_REG_BANK, OOB_CTRL1, 0x0, val);  in brcm_sr_sata_init()
608 	brcm_sata_phy_wr(port, OOB_REG_BANK, OOB_CTRL2, 0x0, val);  in brcm_sr_sata_init()
619 	brcm_sata_phy_wr(port, PLL1_REG_BANK, PLL1_ACTRL7, 0, 0x873);  in brcm_dsl_sata_init()
621 	brcm_sata_phy_wr(port, PLL1_REG_BANK, PLL1_ACTRL6, 0, 0xc000);  in brcm_dsl_sata_init()
623 	brcm_sata_phy_wr(port, PLL_REG_BANK_0, PLL_REG_BANK_0_PLLCONTROL_0,  in brcm_dsl_sata_init()
627 	brcm_sata_phy_wr(port, PLL_REG_BANK_0, PLL_REG_BANK_0_PLLCONTROL_0,  in brcm_dsl_sata_init()
631 	brcm_sata_phy_wr(port, AEQRX_REG_BANK_1, AEQRX_SLCAL0_CTRL0,  in brcm_dsl_sata_init()
634 	brcm_sata_phy_wr(port, AEQRX_REG_BANK_1, AEQRX_SLCAL1_CTRL0,  in brcm_dsl_sata_init()
638 	brcm_sata_phy_wr(port, PLL_REG_BANK_0, PLL_CAP_CHARGE_TIME, 0, 0x32);  in brcm_dsl_sata_init()
640 	brcm_sata_phy_wr(port, PLL_REG_BANK_0, PLL_VCO_CAL_THRESH, 0, 0xa);  in brcm_dsl_sata_init()
642 	brcm_sata_phy_wr(port, PLL_REG_BANK_0, PLL_FREQ_DET_TIME, 0, 0x64);  in brcm_dsl_sata_init()
703 	brcm_sata_phy_wr(port, RXPMD_REG_BANK, RXPMD_RX_FREQ_MON_CONTROL1,  in brcm_stb_sata_calibrate()