drivers/perf/marvell_cn10k_tad_pmu.c

168 #define TAD_PMU_EVENT_ATTR(name, config)			\  macro
172 	TAD_PMU_EVENT_ATTR(tad_none, 0x0),
173 	TAD_PMU_EVENT_ATTR(tad_req_msh_in_any, 0x1),
174 	TAD_PMU_EVENT_ATTR(tad_req_msh_in_mn, 0x2),
175 	TAD_PMU_EVENT_ATTR(tad_req_msh_in_exlmn, 0x3),
176 	TAD_PMU_EVENT_ATTR(tad_rsp_msh_in_any, 0x4),
177 	TAD_PMU_EVENT_ATTR(tad_rsp_msh_in_mn, 0x5),
178 	TAD_PMU_EVENT_ATTR(tad_rsp_msh_in_exlmn, 0x6),
179 	TAD_PMU_EVENT_ATTR(tad_rsp_msh_in_dss, 0x7),
180 	TAD_PMU_EVENT_ATTR(tad_rsp_msh_in_retry_dss, 0x8),
181 	TAD_PMU_EVENT_ATTR(tad_dat_msh_in_any, 0x9),
182 	TAD_PMU_EVENT_ATTR(tad_dat_msh_in_dss, 0xa),
183 	TAD_PMU_EVENT_ATTR(tad_req_msh_out_any, 0xb),
184 	TAD_PMU_EVENT_ATTR(tad_req_msh_out_dss_rd, 0xc),
185 	TAD_PMU_EVENT_ATTR(tad_req_msh_out_dss_wr, 0xd),
186 	TAD_PMU_EVENT_ATTR(tad_req_msh_out_evict, 0xe),
187 	TAD_PMU_EVENT_ATTR(tad_rsp_msh_out_any, 0xf),
188 	TAD_PMU_EVENT_ATTR(tad_rsp_msh_out_retry_exlmn, 0x10),
189 	TAD_PMU_EVENT_ATTR(tad_rsp_msh_out_retry_mn, 0x11),
190 	TAD_PMU_EVENT_ATTR(tad_rsp_msh_out_exlmn, 0x12),
191 	TAD_PMU_EVENT_ATTR(tad_rsp_msh_out_mn, 0x13),
192 	TAD_PMU_EVENT_ATTR(tad_snp_msh_out_any, 0x14),
193 	TAD_PMU_EVENT_ATTR(tad_snp_msh_out_mn, 0x15),
194 	TAD_PMU_EVENT_ATTR(tad_snp_msh_out_exlmn, 0x16),
195 	TAD_PMU_EVENT_ATTR(tad_dat_msh_out_any, 0x17),
196 	TAD_PMU_EVENT_ATTR(tad_dat_msh_out_fill, 0x18),
197 	TAD_PMU_EVENT_ATTR(tad_dat_msh_out_dss, 0x19),
198 	TAD_PMU_EVENT_ATTR(tad_alloc_dtg, 0x1a),
199 	TAD_PMU_EVENT_ATTR(tad_alloc_ltg, 0x1b),
200 	TAD_PMU_EVENT_ATTR(tad_alloc_any, 0x1c),
201 	TAD_PMU_EVENT_ATTR(tad_hit_dtg, 0x1d),
202 	TAD_PMU_EVENT_ATTR(tad_hit_ltg, 0x1e),
203 	TAD_PMU_EVENT_ATTR(tad_hit_any, 0x1f),
204 	TAD_PMU_EVENT_ATTR(tad_tag_rd, 0x20),
205 	TAD_PMU_EVENT_ATTR(tad_dat_rd, 0x21),
206 	TAD_PMU_EVENT_ATTR(tad_dat_rd_byp, 0x22),
207 	TAD_PMU_EVENT_ATTR(tad_ifb_occ, 0x23),
208 	TAD_PMU_EVENT_ATTR(tad_req_occ, 0x24),