Lines Matching refs:hns3_pmu
301 struct hns3_pmu { struct
316 #define to_hns3_pmu(p) (container_of((p), struct hns3_pmu, pmu)) argument
471 struct hns3_pmu *hns3_pmu = to_hns3_pmu(dev_get_drvdata(dev)); in identifier_show() local
473 return sysfs_emit(buf, "0x%x\n", hns3_pmu->identifier); in identifier_show()
480 struct hns3_pmu *hns3_pmu = to_hns3_pmu(dev_get_drvdata(dev)); in cpumask_show() local
482 return sysfs_emit(buf, "%d\n", hns3_pmu->on_cpu); in cpumask_show()
489 struct hns3_pmu *hns3_pmu = to_hns3_pmu(dev_get_drvdata(dev)); in bdf_min_show() local
490 u16 bdf = hns3_pmu->bdf_min; in bdf_min_show()
500 struct hns3_pmu *hns3_pmu = to_hns3_pmu(dev_get_drvdata(dev)); in bdf_max_show() local
501 u16 bdf = hns3_pmu->bdf_max; in bdf_max_show()
511 struct hns3_pmu *hns3_pmu = to_hns3_pmu(dev_get_drvdata(dev)); in hw_clk_freq_show() local
513 return sysfs_emit(buf, "%u\n", hns3_pmu->hw_clk_freq); in hw_clk_freq_show()
746 static u32 hns3_pmu_readl(struct hns3_pmu *hns3_pmu, u32 reg_offset, u32 idx) in hns3_pmu_readl() argument
750 return readl(hns3_pmu->base + offset); in hns3_pmu_readl()
753 static void hns3_pmu_writel(struct hns3_pmu *hns3_pmu, u32 reg_offset, u32 idx, in hns3_pmu_writel() argument
758 writel(val, hns3_pmu->base + offset); in hns3_pmu_writel()
761 static u64 hns3_pmu_readq(struct hns3_pmu *hns3_pmu, u32 reg_offset, u32 idx) in hns3_pmu_readq() argument
765 return readq(hns3_pmu->base + offset); in hns3_pmu_readq()
768 static void hns3_pmu_writeq(struct hns3_pmu *hns3_pmu, u32 reg_offset, u32 idx, in hns3_pmu_writeq() argument
773 writeq(val, hns3_pmu->base + offset); in hns3_pmu_writeq()
782 static int hns3_pmu_find_related_event_idx(struct hns3_pmu *hns3_pmu, in hns3_pmu_find_related_event_idx() argument
790 sibling = hns3_pmu->hw_events[idx]; in hns3_pmu_find_related_event_idx()
812 static int hns3_pmu_get_event_idx(struct hns3_pmu *hns3_pmu) in hns3_pmu_get_event_idx() argument
817 if (!hns3_pmu->hw_events[idx]) in hns3_pmu_get_event_idx()
824 static bool hns3_pmu_valid_bdf(struct hns3_pmu *hns3_pmu, u16 bdf) in hns3_pmu_valid_bdf() argument
828 if (bdf < hns3_pmu->bdf_min || bdf > hns3_pmu->bdf_max) { in hns3_pmu_valid_bdf()
829 pci_err(hns3_pmu->pdev, "Invalid EP device: %#x!\n", bdf); in hns3_pmu_valid_bdf()
833 pdev = pci_get_domain_bus_and_slot(pci_domain_nr(hns3_pmu->pdev->bus), in hns3_pmu_valid_bdf()
837 pci_err(hns3_pmu->pdev, "Nonexistent EP device: %#x!\n", bdf); in hns3_pmu_valid_bdf()
845 static void hns3_pmu_set_qid_para(struct hns3_pmu *hns3_pmu, u32 idx, u16 bdf, in hns3_pmu_set_qid_para() argument
852 hns3_pmu_writel(hns3_pmu, HNS3_PMU_REG_EVENT_QID_PARA, idx, val); in hns3_pmu_set_qid_para()
855 static bool hns3_pmu_qid_req_start(struct hns3_pmu *hns3_pmu, u32 idx) in hns3_pmu_qid_req_start() argument
862 hns3_pmu_writel(hns3_pmu, HNS3_PMU_REG_EVENT_QID_CTRL, idx, in hns3_pmu_qid_req_start()
866 err = readl_poll_timeout(hns3_pmu->base + reg_qid_ctrl, val, in hns3_pmu_qid_req_start()
869 pci_err(hns3_pmu->pdev, "QID request timeout!\n"); in hns3_pmu_qid_req_start()
877 hns3_pmu_writel(hns3_pmu, HNS3_PMU_REG_EVENT_QID_CTRL, idx, 0); in hns3_pmu_qid_req_start()
882 static bool hns3_pmu_valid_queue(struct hns3_pmu *hns3_pmu, u32 idx, u16 bdf, in hns3_pmu_valid_queue() argument
885 hns3_pmu_set_qid_para(hns3_pmu, idx, bdf, queue); in hns3_pmu_valid_queue()
887 return hns3_pmu_qid_req_start(hns3_pmu, idx); in hns3_pmu_valid_queue()
912 struct hns3_pmu *hns3_pmu) in hns3_pmu_set_func_mode() argument
917 if (!hns3_pmu_valid_bdf(hns3_pmu, bdf)) in hns3_pmu_set_func_mode()
926 struct hns3_pmu *hns3_pmu) in hns3_pmu_set_func_queue_mode() argument
932 if (!hns3_pmu_valid_bdf(hns3_pmu, bdf)) in hns3_pmu_set_func_queue_mode()
935 if (!hns3_pmu_valid_queue(hns3_pmu, hwc->idx, bdf, queue_id)) { in hns3_pmu_set_func_queue_mode()
936 pci_err(hns3_pmu->pdev, "Invalid queue: %u\n", queue_id); in hns3_pmu_set_func_queue_mode()
1011 struct hns3_pmu *hns3_pmu, in hns3_pmu_is_enabled_func_intr_mode() argument
1019 return hns3_pmu_valid_bdf(hns3_pmu, bdf); in hns3_pmu_is_enabled_func_intr_mode()
1023 struct hns3_pmu *hns3_pmu) in hns3_pmu_select_filter_mode() argument
1031 pci_err(hns3_pmu->pdev, "Invalid pmu event\n"); in hns3_pmu_select_filter_mode()
1041 return hns3_pmu_set_func_mode(event, hns3_pmu); in hns3_pmu_select_filter_mode()
1044 return hns3_pmu_set_func_queue_mode(event, hns3_pmu); in hns3_pmu_select_filter_mode()
1056 if (hns3_pmu_is_enabled_func_intr_mode(event, hns3_pmu, pmu_event)) { in hns3_pmu_select_filter_mode()
1140 struct hns3_pmu *hns3_pmu = to_hns3_pmu(event->pmu); in hns3_pmu_config_filter() local
1154 hns3_pmu_writel(hns3_pmu, HNS3_PMU_REG_EVENT_CTRL_LOW, idx, val); in hns3_pmu_config_filter()
1157 hns3_pmu_writel(hns3_pmu, HNS3_PMU_REG_EVENT_CTRL_HIGH, idx, val); in hns3_pmu_config_filter()
1160 hns3_pmu_set_qid_para(hns3_pmu, idx, bdf, queue_id); in hns3_pmu_config_filter()
1163 static void hns3_pmu_enable_counter(struct hns3_pmu *hns3_pmu, in hns3_pmu_enable_counter() argument
1169 val = hns3_pmu_readl(hns3_pmu, HNS3_PMU_REG_EVENT_CTRL_LOW, idx); in hns3_pmu_enable_counter()
1171 hns3_pmu_writel(hns3_pmu, HNS3_PMU_REG_EVENT_CTRL_LOW, idx, val); in hns3_pmu_enable_counter()
1174 static void hns3_pmu_disable_counter(struct hns3_pmu *hns3_pmu, in hns3_pmu_disable_counter() argument
1180 val = hns3_pmu_readl(hns3_pmu, HNS3_PMU_REG_EVENT_CTRL_LOW, idx); in hns3_pmu_disable_counter()
1182 hns3_pmu_writel(hns3_pmu, HNS3_PMU_REG_EVENT_CTRL_LOW, idx, val); in hns3_pmu_disable_counter()
1185 static void hns3_pmu_enable_intr(struct hns3_pmu *hns3_pmu, in hns3_pmu_enable_intr() argument
1191 val = hns3_pmu_readl(hns3_pmu, HNS3_PMU_REG_EVENT_INTR_MASK, idx); in hns3_pmu_enable_intr()
1193 hns3_pmu_writel(hns3_pmu, HNS3_PMU_REG_EVENT_INTR_MASK, idx, val); in hns3_pmu_enable_intr()
1196 static void hns3_pmu_disable_intr(struct hns3_pmu *hns3_pmu, in hns3_pmu_disable_intr() argument
1202 val = hns3_pmu_readl(hns3_pmu, HNS3_PMU_REG_EVENT_INTR_MASK, idx); in hns3_pmu_disable_intr()
1204 hns3_pmu_writel(hns3_pmu, HNS3_PMU_REG_EVENT_INTR_MASK, idx, val); in hns3_pmu_disable_intr()
1207 static void hns3_pmu_clear_intr_status(struct hns3_pmu *hns3_pmu, u32 idx) in hns3_pmu_clear_intr_status() argument
1211 val = hns3_pmu_readl(hns3_pmu, HNS3_PMU_REG_EVENT_CTRL_LOW, idx); in hns3_pmu_clear_intr_status()
1213 hns3_pmu_writel(hns3_pmu, HNS3_PMU_REG_EVENT_CTRL_LOW, idx, val); in hns3_pmu_clear_intr_status()
1215 val = hns3_pmu_readl(hns3_pmu, HNS3_PMU_REG_EVENT_CTRL_LOW, idx); in hns3_pmu_clear_intr_status()
1217 hns3_pmu_writel(hns3_pmu, HNS3_PMU_REG_EVENT_CTRL_LOW, idx, val); in hns3_pmu_clear_intr_status()
1222 struct hns3_pmu *hns3_pmu = to_hns3_pmu(event->pmu); in hns3_pmu_read_counter() local
1224 return hns3_pmu_readq(hns3_pmu, event->hw.event_base, event->hw.idx); in hns3_pmu_read_counter()
1229 struct hns3_pmu *hns3_pmu = to_hns3_pmu(event->pmu); in hns3_pmu_write_counter() local
1232 hns3_pmu_writeq(hns3_pmu, HNS3_PMU_REG_EVENT_COUNTER, idx, value); in hns3_pmu_write_counter()
1233 hns3_pmu_writeq(hns3_pmu, HNS3_PMU_REG_EVENT_EXT_COUNTER, idx, value); in hns3_pmu_write_counter()
1246 struct hns3_pmu *hns3_pmu = to_hns3_pmu(event->pmu); in hns3_pmu_event_init() local
1258 event->cpu = hns3_pmu->on_cpu; in hns3_pmu_event_init()
1260 idx = hns3_pmu_get_event_idx(hns3_pmu); in hns3_pmu_event_init()
1262 pci_err(hns3_pmu->pdev, "Up to %u events are supported!\n", in hns3_pmu_event_init()
1269 ret = hns3_pmu_select_filter_mode(event, hns3_pmu); in hns3_pmu_event_init()
1271 pci_err(hns3_pmu->pdev, "Invalid filter, ret = %d.\n", ret); in hns3_pmu_event_init()
1276 pci_err(hns3_pmu->pdev, "Invalid event group.\n"); in hns3_pmu_event_init()
1305 struct hns3_pmu *hns3_pmu = to_hns3_pmu(event->pmu); in hns3_pmu_start() local
1316 hns3_pmu_enable_intr(hns3_pmu, hwc); in hns3_pmu_start()
1317 hns3_pmu_enable_counter(hns3_pmu, hwc); in hns3_pmu_start()
1324 struct hns3_pmu *hns3_pmu = to_hns3_pmu(event->pmu); in hns3_pmu_stop() local
1327 hns3_pmu_disable_counter(hns3_pmu, hwc); in hns3_pmu_stop()
1328 hns3_pmu_disable_intr(hns3_pmu, hwc); in hns3_pmu_stop()
1343 struct hns3_pmu *hns3_pmu = to_hns3_pmu(event->pmu); in hns3_pmu_add() local
1350 idx = hns3_pmu_find_related_event_idx(hns3_pmu, event); in hns3_pmu_add()
1360 idx = hns3_pmu_get_event_idx(hns3_pmu); in hns3_pmu_add()
1365 hns3_pmu->hw_events[idx] = event; in hns3_pmu_add()
1376 struct hns3_pmu *hns3_pmu = to_hns3_pmu(event->pmu); in hns3_pmu_del() local
1380 hns3_pmu->hw_events[hwc->idx] = NULL; in hns3_pmu_del()
1386 struct hns3_pmu *hns3_pmu = to_hns3_pmu(pmu); in hns3_pmu_enable() local
1389 val = readl(hns3_pmu->base + HNS3_PMU_REG_GLOBAL_CTRL); in hns3_pmu_enable()
1391 writel(val, hns3_pmu->base + HNS3_PMU_REG_GLOBAL_CTRL); in hns3_pmu_enable()
1396 struct hns3_pmu *hns3_pmu = to_hns3_pmu(pmu); in hns3_pmu_disable() local
1399 val = readl(hns3_pmu->base + HNS3_PMU_REG_GLOBAL_CTRL); in hns3_pmu_disable()
1401 writel(val, hns3_pmu->base + HNS3_PMU_REG_GLOBAL_CTRL); in hns3_pmu_disable()
1404 static int hns3_pmu_alloc_pmu(struct pci_dev *pdev, struct hns3_pmu *hns3_pmu) in hns3_pmu_alloc_pmu() argument
1410 hns3_pmu->base = pcim_iomap_table(pdev)[BAR_2]; in hns3_pmu_alloc_pmu()
1411 if (!hns3_pmu->base) { in hns3_pmu_alloc_pmu()
1416 hns3_pmu->hw_clk_freq = readl(hns3_pmu->base + HNS3_PMU_REG_CLOCK_FREQ); in hns3_pmu_alloc_pmu()
1418 val = readl(hns3_pmu->base + HNS3_PMU_REG_BDF); in hns3_pmu_alloc_pmu()
1419 hns3_pmu->bdf_min = val & 0xffff; in hns3_pmu_alloc_pmu()
1420 hns3_pmu->bdf_max = val >> 16; in hns3_pmu_alloc_pmu()
1422 val = readl(hns3_pmu->base + HNS3_PMU_REG_DEVICE_ID); in hns3_pmu_alloc_pmu()
1428 hns3_pmu->pdev = pdev; in hns3_pmu_alloc_pmu()
1429 hns3_pmu->on_cpu = -1; in hns3_pmu_alloc_pmu()
1430 hns3_pmu->identifier = readl(hns3_pmu->base + HNS3_PMU_REG_VERSION); in hns3_pmu_alloc_pmu()
1431 hns3_pmu->pmu = (struct pmu) { in hns3_pmu_alloc_pmu()
1452 struct hns3_pmu *hns3_pmu = data; in hns3_pmu_irq() local
1456 intr_status = hns3_pmu_readl(hns3_pmu, in hns3_pmu_irq()
1465 hns3_pmu_clear_intr_status(hns3_pmu, idx); in hns3_pmu_irq()
1473 struct hns3_pmu *hns3_pmu; in hns3_pmu_online_cpu() local
1475 hns3_pmu = hlist_entry_safe(node, struct hns3_pmu, node); in hns3_pmu_online_cpu()
1476 if (!hns3_pmu) in hns3_pmu_online_cpu()
1479 if (hns3_pmu->on_cpu == -1) { in hns3_pmu_online_cpu()
1480 hns3_pmu->on_cpu = cpu; in hns3_pmu_online_cpu()
1481 irq_set_affinity(hns3_pmu->irq, cpumask_of(cpu)); in hns3_pmu_online_cpu()
1489 struct hns3_pmu *hns3_pmu; in hns3_pmu_offline_cpu() local
1492 hns3_pmu = hlist_entry_safe(node, struct hns3_pmu, node); in hns3_pmu_offline_cpu()
1493 if (!hns3_pmu) in hns3_pmu_offline_cpu()
1497 if (hns3_pmu->on_cpu != cpu) in hns3_pmu_offline_cpu()
1505 perf_pmu_migrate_context(&hns3_pmu->pmu, cpu, target); in hns3_pmu_offline_cpu()
1506 hns3_pmu->on_cpu = target; in hns3_pmu_offline_cpu()
1507 irq_set_affinity(hns3_pmu->irq, cpumask_of(target)); in hns3_pmu_offline_cpu()
1520 struct hns3_pmu *hns3_pmu) in hns3_pmu_irq_register() argument
1538 hns3_pmu->pmu.name, hns3_pmu); in hns3_pmu_irq_register()
1544 hns3_pmu->irq = irq; in hns3_pmu_irq_register()
1549 static int hns3_pmu_init_pmu(struct pci_dev *pdev, struct hns3_pmu *hns3_pmu) in hns3_pmu_init_pmu() argument
1553 ret = hns3_pmu_alloc_pmu(pdev, hns3_pmu); in hns3_pmu_init_pmu()
1557 ret = hns3_pmu_irq_register(pdev, hns3_pmu); in hns3_pmu_init_pmu()
1562 &hns3_pmu->node); in hns3_pmu_init_pmu()
1568 ret = perf_pmu_register(&hns3_pmu->pmu, hns3_pmu->pmu.name, -1); in hns3_pmu_init_pmu()
1572 &hns3_pmu->node); in hns3_pmu_init_pmu()
1580 struct hns3_pmu *hns3_pmu = pci_get_drvdata(pdev); in hns3_pmu_uninit_pmu() local
1582 perf_pmu_unregister(&hns3_pmu->pmu); in hns3_pmu_uninit_pmu()
1584 &hns3_pmu->node); in hns3_pmu_uninit_pmu()
1610 struct hns3_pmu *hns3_pmu; in hns3_pmu_probe() local
1613 hns3_pmu = devm_kzalloc(&pdev->dev, sizeof(*hns3_pmu), GFP_KERNEL); in hns3_pmu_probe()
1614 if (!hns3_pmu) in hns3_pmu_probe()
1621 ret = hns3_pmu_init_pmu(pdev, hns3_pmu); in hns3_pmu_probe()
1627 pci_set_drvdata(pdev, hns3_pmu); in hns3_pmu_probe()