43 #define to_ddr_pmu(p)		container_of(p, struct ddr_pmu, pmu)
97 	struct pmu pmu;  member
114 	struct ddr_pmu *pmu = dev_get_drvdata(dev);  in ddr_perf_identifier_show()  local
116 	return sysfs_emit(page, "%s\n", pmu->devtype_data->identifier);  in ddr_perf_identifier_show()
124 	struct ddr_pmu *pmu = dev_get_drvdata(dev);  in ddr_perf_identifier_attr_visible()  local
126 	if (!pmu->devtype_data->identifier)  in ddr_perf_identifier_attr_visible()
150 static u32 ddr_perf_filter_cap_get(struct ddr_pmu *pmu, int cap)  in ddr_perf_filter_cap_get()  argument
152 	u32 quirks = pmu->devtype_data->quirks;  in ddr_perf_filter_cap_get()
171 	struct ddr_pmu *pmu = dev_get_drvdata(dev);  in ddr_perf_filter_cap_show()  local
176 	return sysfs_emit(buf, "%u\n", ddr_perf_filter_cap_get(pmu, cap));  in ddr_perf_filter_cap_show()
201 	struct ddr_pmu *pmu = dev_get_drvdata(dev);  in ddr_perf_cpumask_show()  local
203 	return cpumap_print_to_pagebuf(true, buf, cpumask_of(pmu->cpu));  in ddr_perf_cpumask_show()
320 	struct ddr_pmu *pmu = to_ddr_pmu(event->pmu);  in ddr_perf_is_enhanced_filtered()  local
322 	filt = pmu->devtype_data->quirks & DDR_CAP_AXI_ID_FILTER_ENHANCED;  in ddr_perf_is_enhanced_filtered()
327 static u32 ddr_perf_alloc_counter(struct ddr_pmu *pmu, int event)  in ddr_perf_alloc_counter()  argument
337 		if (pmu->events[EVENT_CYCLES_COUNTER] == NULL)  in ddr_perf_alloc_counter()
344 		if (pmu->events[i] == NULL)  in ddr_perf_alloc_counter()
351 static void ddr_perf_free_counter(struct ddr_pmu *pmu, int counter)  in ddr_perf_free_counter()  argument
353 	pmu->events[counter] = NULL;  in ddr_perf_free_counter()
356 static u32 ddr_perf_read_counter(struct ddr_pmu *pmu, int counter)  in ddr_perf_read_counter()  argument
358 	struct perf_event *event = pmu->events[counter];  in ddr_perf_read_counter()
359 	void __iomem *base = pmu->base;  in ddr_perf_read_counter()
373 	struct ddr_pmu *pmu = to_ddr_pmu(event->pmu);  in ddr_perf_event_init()  local
377 	if (event->attr.type != event->pmu->type)  in ddr_perf_event_init()
384 		dev_warn(pmu->dev, "Can't provide per-task data!\n");  in ddr_perf_event_init()
393 	if (event->group_leader->pmu != event->pmu &&  in ddr_perf_event_init()
397 	if (pmu->devtype_data->quirks & DDR_CAP_AXI_ID_FILTER) {  in ddr_perf_event_init()
407 		if (sibling->pmu != event->pmu &&  in ddr_perf_event_init()
412 	event->cpu = pmu->cpu;  in ddr_perf_event_init()
418 static void ddr_perf_counter_enable(struct ddr_pmu *pmu, int config,  in ddr_perf_counter_enable()  argument
431 		writel(0, pmu->base + reg);  in ddr_perf_counter_enable()
440 		if (pmu->devtype_data->quirks & DDR_CAP_AXI_ID_FILTER_ENHANCED) {  in ddr_perf_counter_enable()
445 		writel(val, pmu->base + reg);  in ddr_perf_counter_enable()
448 		val = readl_relaxed(pmu->base + reg) & CNTL_EN_MASK;  in ddr_perf_counter_enable()
449 		writel(val, pmu->base + reg);  in ddr_perf_counter_enable()
453 static bool ddr_perf_counter_overflow(struct ddr_pmu *pmu, int counter)  in ddr_perf_counter_overflow()  argument
457 	val = readl_relaxed(pmu->base + counter * 4 + COUNTER_CNTL);  in ddr_perf_counter_overflow()
462 static void ddr_perf_counter_clear(struct ddr_pmu *pmu, int counter)  in ddr_perf_counter_clear()  argument
467 	val = readl_relaxed(pmu->base + reg);  in ddr_perf_counter_clear()
469 	writel(val, pmu->base + reg);  in ddr_perf_counter_clear()
472 	writel(val, pmu->base + reg);  in ddr_perf_counter_clear()
477 	struct ddr_pmu *pmu = to_ddr_pmu(event->pmu);  in ddr_perf_event_update()  local
483 	new_raw_count = ddr_perf_read_counter(pmu, counter);  in ddr_perf_event_update()
485 	if (pmu->devtype_data->quirks & DDR_CAP_AXI_ID_FILTER_ENHANCED) {  in ddr_perf_event_update()
499 		ret = ddr_perf_counter_overflow(pmu, counter);  in ddr_perf_event_update()
501 			dev_warn_ratelimited(pmu->dev,  "events lost due to counter overflow (config 0x%llx)\n",  in ddr_perf_event_update()
506 	ddr_perf_counter_clear(pmu, counter);  in ddr_perf_event_update()
511 	struct ddr_pmu *pmu = to_ddr_pmu(event->pmu);  in ddr_perf_event_start()  local
517 	ddr_perf_counter_enable(pmu, event->attr.config, counter, true);  in ddr_perf_event_start()
519 	if (!pmu->active_counter++)  in ddr_perf_event_start()
520 		ddr_perf_counter_enable(pmu, EVENT_CYCLES_ID,  in ddr_perf_event_start()
528 	struct ddr_pmu *pmu = to_ddr_pmu(event->pmu);  in ddr_perf_event_add()  local
534 	if (pmu->devtype_data->quirks & DDR_CAP_AXI_ID_FILTER) {  in ddr_perf_event_add()
538 			if (pmu->events[i] &&  in ddr_perf_event_add()
539 			    !ddr_perf_filters_compatible(event, pmu->events[i]))  in ddr_perf_event_add()
546 			writel(cfg1, pmu->base + COUNTER_DPCR1);  in ddr_perf_event_add()
550 	counter = ddr_perf_alloc_counter(pmu, cfg);  in ddr_perf_event_add()
552 		dev_dbg(pmu->dev, "There are not enough counters\n");  in ddr_perf_event_add()
556 	pmu->events[counter] = event;  in ddr_perf_event_add()
569 	struct ddr_pmu *pmu = to_ddr_pmu(event->pmu);  in ddr_perf_event_stop()  local
573 	ddr_perf_counter_enable(pmu, event->attr.config, counter, false);  in ddr_perf_event_stop()
576 	if (!--pmu->active_counter)  in ddr_perf_event_stop()
577 		ddr_perf_counter_enable(pmu, EVENT_CYCLES_ID,  in ddr_perf_event_stop()
585 	struct ddr_pmu *pmu = to_ddr_pmu(event->pmu);  in ddr_perf_event_del()  local
591 	ddr_perf_free_counter(pmu, counter);  in ddr_perf_event_del()
595 static void ddr_perf_pmu_enable(struct pmu *pmu)  in ddr_perf_pmu_enable()  argument
599 static void ddr_perf_pmu_disable(struct pmu *pmu)  in ddr_perf_pmu_disable()  argument
603 static int ddr_perf_init(struct ddr_pmu *pmu, void __iomem *base,  in ddr_perf_init()  argument
606 	*pmu = (struct ddr_pmu) {  in ddr_perf_init()
607 		.pmu = (struct pmu) {  in ddr_perf_init()
625 	pmu->id = ida_alloc(&ddr_ida, GFP_KERNEL);  in ddr_perf_init()
626 	return pmu->id;  in ddr_perf_init()
632 	struct ddr_pmu *pmu = (struct ddr_pmu *) p;  in ddr_perf_irq_handler()  local
636 	ddr_perf_counter_enable(pmu,  in ddr_perf_irq_handler()
654 		if (!pmu->events[i])  in ddr_perf_irq_handler()
657 		event = pmu->events[i];  in ddr_perf_irq_handler()
662 	ddr_perf_counter_enable(pmu,  in ddr_perf_irq_handler()
672 	struct ddr_pmu *pmu = hlist_entry_safe(node, struct ddr_pmu, node);  in ddr_perf_offline_cpu()  local
675 	if (cpu != pmu->cpu)  in ddr_perf_offline_cpu()
682 	perf_pmu_migrate_context(&pmu->pmu, cpu, target);  in ddr_perf_offline_cpu()
683 	pmu->cpu = target;  in ddr_perf_offline_cpu()
685 	WARN_ON(irq_set_affinity(pmu->irq, cpumask_of(pmu->cpu)));  in ddr_perf_offline_cpu()
692 	struct ddr_pmu *pmu;  in ddr_perf_probe()  local
706 	pmu = devm_kzalloc(&pdev->dev, sizeof(*pmu), GFP_KERNEL);  in ddr_perf_probe()
707 	if (!pmu)  in ddr_perf_probe()
710 	num = ddr_perf_init(pmu, base, &pdev->dev);  in ddr_perf_probe()
712 	platform_set_drvdata(pdev, pmu);  in ddr_perf_probe()
721 	pmu->devtype_data = of_device_get_match_data(&pdev->dev);  in ddr_perf_probe()
723 	pmu->cpu = raw_smp_processor_id();  in ddr_perf_probe()
734 	pmu->cpuhp_state = ret;  in ddr_perf_probe()
737 	ret = cpuhp_state_add_instance_nocalls(pmu->cpuhp_state, &pmu->node);  in ddr_perf_probe()
755 					pmu);  in ddr_perf_probe()
761 	pmu->irq = irq;  in ddr_perf_probe()
762 	ret = irq_set_affinity(pmu->irq, cpumask_of(pmu->cpu));  in ddr_perf_probe()
764 		dev_err(pmu->dev, "Failed to set interrupt affinity!\n");  in ddr_perf_probe()
768 	ret = perf_pmu_register(&pmu->pmu, name, -1);  in ddr_perf_probe()
775 	cpuhp_state_remove_instance_nocalls(pmu->cpuhp_state, &pmu->node);  in ddr_perf_probe()
777 	cpuhp_remove_multi_state(pmu->cpuhp_state);  in ddr_perf_probe()
779 	ida_free(&ddr_ida, pmu->id);  in ddr_perf_probe()
786 	struct ddr_pmu *pmu = platform_get_drvdata(pdev);  in ddr_perf_remove()  local
788 	cpuhp_state_remove_instance_nocalls(pmu->cpuhp_state, &pmu->node);  in ddr_perf_remove()
789 	cpuhp_remove_multi_state(pmu->cpuhp_state);  in ddr_perf_remove()
791 	perf_pmu_unregister(&pmu->pmu);  in ddr_perf_remove()
793 	ida_free(&ddr_ida, pmu->id);  in ddr_perf_remove()