Lines Matching refs:writeq_relaxed
1398 writeq_relaxed(CMN_CC_INIT, dtc->base + CMN_DT_PMCCNTR); in arm_cmn_read_cc()
1485 writeq_relaxed(le64_to_cpu(dn->event_sel_w), dn->pmu_base + CMN_PMU_EVENT_SEL); in arm_cmn_set_event_sel_lo()
1502 writeq_relaxed(CMN_CC_INIT, cmn->dtc[i].base + CMN_DT_PMCCNTR); in arm_cmn_event_start()
1512 writeq_relaxed(val, base + CMN_DTM_WPn_VAL(wp_idx)); in arm_cmn_event_start()
1513 writeq_relaxed(mask, base + CMN_DTM_WPn_MASK(wp_idx)); in arm_cmn_event_start()
1540 writeq_relaxed(0, base + CMN_DTM_WPn_MASK(wp_idx)); in arm_cmn_event_stop()
1541 writeq_relaxed(~0ULL, base + CMN_DTM_WPn_VAL(wp_idx)); in arm_cmn_event_stop()
1851 writeq_relaxed(reg, dtm->base + CMN_DTM_PMU_CONFIG); in arm_cmn_event_add()
2017 writeq_relaxed(dtm->pmu_config_low, dtm->base + CMN_DTM_PMU_CONFIG); in arm_cmn_init_dtm()
2020 writeq_relaxed(0, dtm->base + CMN_DTM_WPn_MASK(i)); in arm_cmn_init_dtm()
2021 writeq_relaxed(~0ULL, dtm->base + CMN_DTM_WPn_VAL(i)); in arm_cmn_init_dtm()
2036 writeq_relaxed(0, dtc->base + CMN_DT_PMCCNTR); in arm_cmn_init_dtc()