119 /* The DTC node is where the magic happens */
123 /* DTC counters are paired in 64-bit registers on a 16-byte stride. Yuck */
149  * Even in the worst case a DTC counter can't wrap in fewer than 2^42 cycles,
282 	s8 dtc;  member
345 	struct arm_cmn_dtc *dtc;  member
523 			s8 dtc = xp[x].dtc;  in arm_cmn_map_show()  local
525 			if (dtc < 0)  in arm_cmn_map_show()
526 				seq_puts(s, " DTC ?? |");  in arm_cmn_map_show()
528 				seq_printf(s, " DTC %d  |", dtc);  in arm_cmn_map_show()
582 /* @i is the DTC number, @idx is the counter index on that DTC */
1352 		writel_relaxed(0, cmn->dtc[0].base + CMN_DT_PMCR);  in arm_cmn_set_state()
1361 			       cmn->dtc[0].base + CMN_DT_PMCR);  in arm_cmn_clear_state()
1394 static u64 arm_cmn_read_cc(struct arm_cmn_dtc *dtc)  in arm_cmn_read_cc()  argument
1396 	u64 val = readq_relaxed(dtc->base + CMN_DT_PMCCNTR);  in arm_cmn_read_cc()
1398 	writeq_relaxed(CMN_CC_INIT, dtc->base + CMN_DT_PMCCNTR);  in arm_cmn_read_cc()
1402 static u32 arm_cmn_read_counter(struct arm_cmn_dtc *dtc, int idx)  in arm_cmn_read_counter()  argument
1406 	val = readl_relaxed(dtc->base + pmevcnt);  in arm_cmn_read_counter()
1407 	writel_relaxed(CMN_COUNTER_INIT, dtc->base + pmevcnt);  in arm_cmn_read_counter()
1418 		writel_relaxed(CMN_COUNTER_INIT, cmn->dtc[i].base + CMN_DT_PMEVCNT(idx));  in arm_cmn_init_counter()
1419 		cmn->dtc[i].counters[idx] = event;  in arm_cmn_init_counter()
1434 		delta = arm_cmn_read_cc(cmn->dtc + hw->dtc_idx[0]);  in arm_cmn_event_read()
1445 		new = arm_cmn_read_counter(cmn->dtc + i, idx);  in arm_cmn_event_read()
1502 		writeq_relaxed(CMN_CC_INIT, cmn->dtc[i].base + CMN_DT_PMCCNTR);  in arm_cmn_event_start()
1503 		cmn->dtc[i].cc_active = true;  in arm_cmn_event_start()
1533 		cmn->dtc[i].cc_active = false;  in arm_cmn_event_stop()
1691 	/* DTC events (i.e. cycles) already have everything they need */  in arm_cmn_event_init()
1726 		if (dn->dtc < 0)  in arm_cmn_event_init()
1729 			hw->dtc_idx[dn->dtc] = 0;  in arm_cmn_event_init()
1765 		cmn->dtc[j].counters[idx] = NULL;  in arm_cmn_event_clear()
1777 		while (cmn->dtc[i].cycles)  in arm_cmn_event_add()
1781 		cmn->dtc[i].cycles = event;  in arm_cmn_event_add()
1795 			while (cmn->dtc[j].counters[idx])  in arm_cmn_event_add()
1824 					CMN_EVENT_WP_COMBINE(cmn->dtc[d].counters[tmp]))  in arm_cmn_event_add()
1876 		cmn->dtc[hw->dtc_idx[0]].cycles = NULL;  in arm_cmn_event_del()
1909 		irq_set_affinity(cmn->dtc[i].irq, cpumask_of(cpu));  in arm_cmn_migrate()
1949 	struct arm_cmn_dtc *dtc = dev_id;  in arm_cmn_handle_irq()  local
1953 		u32 status = readl_relaxed(dtc->base + CMN_DT_PMOVSR);  in arm_cmn_handle_irq()
1960 				if (WARN_ON(!dtc->counters[i]))  in arm_cmn_handle_irq()
1962 				delta = (u64)arm_cmn_read_counter(dtc, i) << 16;  in arm_cmn_handle_irq()
1963 				local64_add(delta, &dtc->counters[i]->count);  in arm_cmn_handle_irq()
1969 			if (dtc->cc_active && !WARN_ON(!dtc->cycles)) {  in arm_cmn_handle_irq()
1970 				delta = arm_cmn_read_cc(dtc);  in arm_cmn_handle_irq()
1971 				local64_add(delta, &dtc->cycles->count);  in arm_cmn_handle_irq()
1975 		writel_relaxed(status, dtc->base + CMN_DT_PMOVSR_CLR);  in arm_cmn_handle_irq()
1977 		if (!dtc->irq_friend)  in arm_cmn_handle_irq()
1979 		dtc += dtc->irq_friend;  in arm_cmn_handle_irq()
1989 		irq = cmn->dtc[i].irq;  in arm_cmn_init_irqs()
1991 			if (cmn->dtc[j].irq == irq) {  in arm_cmn_init_irqs()
1992 				cmn->dtc[j].irq_friend = i - j;  in arm_cmn_init_irqs()
1998 				       dev_name(cmn->dev), &cmn->dtc[i]);  in arm_cmn_init_irqs()
2027 	struct arm_cmn_dtc *dtc = cmn->dtc + idx;  in arm_cmn_init_dtc()  local
2029 	dtc->base = dn->pmu_base - CMN_PMU_OFFSET;  in arm_cmn_init_dtc()
2030 	dtc->irq = platform_get_irq(to_platform_device(cmn->dev), idx);  in arm_cmn_init_dtc()
2031 	if (dtc->irq < 0)  in arm_cmn_init_dtc()
2032 		return dtc->irq;  in arm_cmn_init_dtc()
2034 	writel_relaxed(CMN_DT_DTC_CTL_DT_EN, dtc->base + CMN_DT_DTC_CTL);  in arm_cmn_init_dtc()
2035 	writel_relaxed(CMN_DT_PMCR_PMU_EN | CMN_DT_PMCR_OVFL_INTR_EN, dtc->base + CMN_DT_PMCR);  in arm_cmn_init_dtc()
2036 	writeq_relaxed(0, dtc->base + CMN_DT_PMCCNTR);  in arm_cmn_init_dtc()
2037 	writel_relaxed(0x1ff, dtc->base + CMN_DT_PMOVSR_CLR);  in arm_cmn_init_dtc()
2058 	cmn->dtc = devm_kcalloc(cmn->dev, cmn->num_dtcs, sizeof(cmn->dtc[0]), GFP_KERNEL);  in arm_cmn_init_dtcs()
2059 	if (!cmn->dtc)  in arm_cmn_init_dtcs()
2067 		/* We do at least know that a DTC's XP must be in that DTC's domain */  in arm_cmn_init_dtcs()
2070 			arm_cmn_node_to_xp(cmn, dn + i)->dtc = i;  in arm_cmn_init_dtcs()
2078 		dn->dtc = xp->dtc;  in arm_cmn_init_dtcs()
2243 			xp->dtc = -1;  in arm_cmn_discover()
2245 			xp->dtc = arm_cmn_dtc_domain(cmn, xp_region);  in arm_cmn_discover()
2514 	writel_relaxed(0, cmn->dtc[0].base + CMN_DT_DTC_CTL);  in arm_cmn_remove()