Lines Matching refs:bar
2340 unsigned int bar; in quirk_plx_pci9050() local
2345 for (bar = 0; bar <= 1; bar++) in quirk_plx_pci9050()
2346 if (pci_resource_len(dev, bar) == 0x80 && in quirk_plx_pci9050()
2347 (pci_resource_start(dev, bar) & 0x80)) { in quirk_plx_pci9050()
2348 struct resource *r = &dev->resource[bar]; in quirk_plx_pci9050()
2350 bar); in quirk_plx_pci9050()
4042 void __iomem *bar; in nvme_disable_and_flr() local
4053 bar = pci_iomap(dev, 0, NVME_REG_CC + sizeof(cfg)); in nvme_disable_and_flr()
4054 if (!bar) in nvme_disable_and_flr()
4060 cfg = readl(bar + NVME_REG_CC); in nvme_disable_and_flr()
4064 u32 cap = readl(bar + NVME_REG_CAP); in nvme_disable_and_flr()
4074 writel(cfg, bar + NVME_REG_CC); in nvme_disable_and_flr()
4086 u32 status = readl(bar + NVME_REG_CSTS); in nvme_disable_and_flr()
4101 pci_iounmap(dev, bar); in nvme_disable_and_flr()
4138 void __iomem *bar; in reset_hinic_vf_dev() local
4144 bar = pci_iomap(pdev, 0, 0); in reset_hinic_vf_dev()
4145 if (!bar) in reset_hinic_vf_dev()
4149 val = ioread32be(bar + HINIC_VF_FLR_TYPE); in reset_hinic_vf_dev()
4151 pci_iounmap(pdev, bar); in reset_hinic_vf_dev()
4156 val = ioread32be(bar + HINIC_VF_OP); in reset_hinic_vf_dev()
4158 iowrite32be(val, bar + HINIC_VF_OP); in reset_hinic_vf_dev()
4172 val = ioread32be(bar + HINIC_VF_OP); in reset_hinic_vf_dev()
4178 val = ioread32be(bar + HINIC_VF_OP); in reset_hinic_vf_dev()
4185 pci_iounmap(pdev, bar); in reset_hinic_vf_dev()