Lines Matching full:ctrl
48 static inline struct pci_dev *ctrl_dev(struct controller *ctrl) in ctrl_dev() argument
50 return ctrl->pcie->port; in ctrl_dev()
57 static inline int pciehp_request_irq(struct controller *ctrl) in pciehp_request_irq() argument
59 int retval, irq = ctrl->pcie->irq; in pciehp_request_irq()
62 ctrl->poll_thread = kthread_run(&pciehp_poll, ctrl, in pciehp_request_irq()
64 slot_name(ctrl)); in pciehp_request_irq()
65 return PTR_ERR_OR_ZERO(ctrl->poll_thread); in pciehp_request_irq()
70 IRQF_SHARED, "pciehp", ctrl); in pciehp_request_irq()
72 ctrl_err(ctrl, "Cannot get irq %d for the hotplug controller\n", in pciehp_request_irq()
77 static inline void pciehp_free_irq(struct controller *ctrl) in pciehp_free_irq() argument
80 kthread_stop(ctrl->poll_thread); in pciehp_free_irq()
82 free_irq(ctrl->pcie->irq, ctrl); in pciehp_free_irq()
85 static int pcie_poll_cmd(struct controller *ctrl, int timeout) in pcie_poll_cmd() argument
87 struct pci_dev *pdev = ctrl_dev(ctrl); in pcie_poll_cmd()
93 ctrl_info(ctrl, "%s: no response from device\n", in pcie_poll_cmd()
101 ctrl->cmd_busy = 0; in pcie_poll_cmd()
111 static void pcie_wait_cmd(struct controller *ctrl) in pcie_wait_cmd() argument
115 unsigned long cmd_timeout = ctrl->cmd_started + duration; in pcie_wait_cmd()
123 if (NO_CMD_CMPL(ctrl)) in pcie_wait_cmd()
126 if (!ctrl->cmd_busy) in pcie_wait_cmd()
139 if (ctrl->slot_ctrl & PCI_EXP_SLTCTL_HPIE && in pcie_wait_cmd()
140 ctrl->slot_ctrl & PCI_EXP_SLTCTL_CCIE) in pcie_wait_cmd()
141 rc = wait_event_timeout(ctrl->queue, !ctrl->cmd_busy, timeout); in pcie_wait_cmd()
143 rc = pcie_poll_cmd(ctrl, jiffies_to_msecs(timeout)); in pcie_wait_cmd()
146 ctrl_info(ctrl, "Timeout on hotplug command %#06x (issued %u msec ago)\n", in pcie_wait_cmd()
147 ctrl->slot_ctrl, in pcie_wait_cmd()
148 jiffies_to_msecs(jiffies - ctrl->cmd_started)); in pcie_wait_cmd()
156 static void pcie_do_write_cmd(struct controller *ctrl, u16 cmd, in pcie_do_write_cmd() argument
159 struct pci_dev *pdev = ctrl_dev(ctrl); in pcie_do_write_cmd()
162 mutex_lock(&ctrl->ctrl_lock); in pcie_do_write_cmd()
167 pcie_wait_cmd(ctrl); in pcie_do_write_cmd()
171 ctrl_info(ctrl, "%s: no response from device\n", __func__); in pcie_do_write_cmd()
178 ctrl->cmd_busy = 1; in pcie_do_write_cmd()
180 ctrl->slot_ctrl = slot_ctrl; in pcie_do_write_cmd()
182 ctrl->cmd_started = jiffies; in pcie_do_write_cmd()
193 ctrl->cmd_busy = 0; in pcie_do_write_cmd()
200 pcie_wait_cmd(ctrl); in pcie_do_write_cmd()
203 mutex_unlock(&ctrl->ctrl_lock); in pcie_do_write_cmd()
208 * @ctrl: controller to which the command is issued
212 static void pcie_write_cmd(struct controller *ctrl, u16 cmd, u16 mask) in pcie_write_cmd() argument
214 pcie_do_write_cmd(ctrl, cmd, mask, true); in pcie_write_cmd()
218 static void pcie_write_cmd_nowait(struct controller *ctrl, u16 cmd, u16 mask) in pcie_write_cmd_nowait() argument
220 pcie_do_write_cmd(ctrl, cmd, mask, false); in pcie_write_cmd_nowait()
225 * @ctrl: PCIe hotplug controller
234 int pciehp_check_link_active(struct controller *ctrl) in pciehp_check_link_active() argument
236 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_check_link_active()
245 ctrl_dbg(ctrl, "%s: lnk_status = %x\n", __func__, lnk_status); in pciehp_check_link_active()
290 int pciehp_check_link_status(struct controller *ctrl) in pciehp_check_link_status() argument
292 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_check_link_status()
297 ctrl_info(ctrl, "Slot(%s): No link\n", slot_name(ctrl)); in pciehp_check_link_status()
301 if (ctrl->inband_presence_disabled) in pciehp_check_link_status()
304 found = pci_bus_check_dev(ctrl->pcie->port->subordinate, in pciehp_check_link_status()
310 &ctrl->pending_events); in pciehp_check_link_status()
313 ctrl_dbg(ctrl, "%s: lnk_status = %x\n", __func__, lnk_status); in pciehp_check_link_status()
316 ctrl_info(ctrl, "Slot(%s): Cannot train link: status %#06x\n", in pciehp_check_link_status()
317 slot_name(ctrl), lnk_status); in pciehp_check_link_status()
321 pcie_update_link_speed(ctrl->pcie->port->subordinate, lnk_status); in pciehp_check_link_status()
324 ctrl_info(ctrl, "Slot(%s): No device found\n", in pciehp_check_link_status()
325 slot_name(ctrl)); in pciehp_check_link_status()
332 static int __pciehp_link_set(struct controller *ctrl, bool enable) in __pciehp_link_set() argument
334 struct pci_dev *pdev = ctrl_dev(ctrl); in __pciehp_link_set()
343 static int pciehp_link_enable(struct controller *ctrl) in pciehp_link_enable() argument
345 return __pciehp_link_set(ctrl, true); in pciehp_link_enable()
351 struct controller *ctrl = to_ctrl(hotplug_slot); in pciehp_get_raw_indicator_status() local
352 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_get_raw_indicator_status()
364 struct controller *ctrl = to_ctrl(hotplug_slot); in pciehp_get_attention_status() local
365 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_get_attention_status()
371 ctrl_dbg(ctrl, "%s: SLOTCTRL %x, value read %x\n", __func__, in pciehp_get_attention_status()
372 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_ctrl); in pciehp_get_attention_status()
392 void pciehp_get_power_status(struct controller *ctrl, u8 *status) in pciehp_get_power_status() argument
394 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_get_power_status()
398 ctrl_dbg(ctrl, "%s: SLOTCTRL %x value read %x\n", __func__, in pciehp_get_power_status()
399 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_ctrl); in pciehp_get_power_status()
414 void pciehp_get_latch_status(struct controller *ctrl, u8 *status) in pciehp_get_latch_status() argument
416 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_get_latch_status()
425 * @ctrl: PCIe hotplug controller
435 int pciehp_card_present(struct controller *ctrl) in pciehp_card_present() argument
437 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_card_present()
450 * @ctrl: PCIe hotplug controller
460 int pciehp_card_present_or_link_active(struct controller *ctrl) in pciehp_card_present_or_link_active() argument
464 ret = pciehp_card_present(ctrl); in pciehp_card_present_or_link_active()
468 return pciehp_check_link_active(ctrl); in pciehp_card_present_or_link_active()
471 int pciehp_query_power_fault(struct controller *ctrl) in pciehp_query_power_fault() argument
473 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_query_power_fault()
483 struct controller *ctrl = to_ctrl(hotplug_slot); in pciehp_set_raw_indicator_status() local
484 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_set_raw_indicator_status()
487 pcie_write_cmd_nowait(ctrl, status << 6, in pciehp_set_raw_indicator_status()
495 * @ctrl: PCIe hotplug controller
508 void pciehp_set_indicators(struct controller *ctrl, int pwr, int attn) in pciehp_set_indicators() argument
512 if (PWR_LED(ctrl) && pwr != INDICATOR_NOOP) { in pciehp_set_indicators()
517 if (ATTN_LED(ctrl) && attn != INDICATOR_NOOP) { in pciehp_set_indicators()
523 pcie_write_cmd_nowait(ctrl, cmd, mask); in pciehp_set_indicators()
524 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, in pciehp_set_indicators()
525 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, cmd); in pciehp_set_indicators()
529 int pciehp_power_on_slot(struct controller *ctrl) in pciehp_power_on_slot() argument
531 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_power_on_slot()
540 ctrl->power_fault_detected = 0; in pciehp_power_on_slot()
542 pcie_write_cmd(ctrl, PCI_EXP_SLTCTL_PWR_ON, PCI_EXP_SLTCTL_PCC); in pciehp_power_on_slot()
543 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, in pciehp_power_on_slot()
544 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, in pciehp_power_on_slot()
547 retval = pciehp_link_enable(ctrl); in pciehp_power_on_slot()
549 ctrl_err(ctrl, "%s: Can not enable the link!\n", __func__); in pciehp_power_on_slot()
554 void pciehp_power_off_slot(struct controller *ctrl) in pciehp_power_off_slot() argument
556 pcie_write_cmd(ctrl, PCI_EXP_SLTCTL_PWR_OFF, PCI_EXP_SLTCTL_PCC); in pciehp_power_off_slot()
557 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, in pciehp_power_off_slot()
558 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, in pciehp_power_off_slot()
562 static void pciehp_ignore_dpc_link_change(struct controller *ctrl, in pciehp_ignore_dpc_link_change() argument
570 atomic_and(~PCI_EXP_SLTSTA_DLLSC, &ctrl->pending_events); in pciehp_ignore_dpc_link_change()
574 ctrl_info(ctrl, "Slot(%s): Link Down/Up ignored (recovered by DPC)\n", in pciehp_ignore_dpc_link_change()
575 slot_name(ctrl)); in pciehp_ignore_dpc_link_change()
582 down_read_nested(&ctrl->reset_lock, ctrl->depth); in pciehp_ignore_dpc_link_change()
583 if (!pciehp_check_link_active(ctrl)) in pciehp_ignore_dpc_link_change()
584 pciehp_request(ctrl, PCI_EXP_SLTSTA_DLLSC); in pciehp_ignore_dpc_link_change()
585 up_read(&ctrl->reset_lock); in pciehp_ignore_dpc_link_change()
590 struct controller *ctrl = (struct controller *)dev_id; in pciehp_isr() local
591 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_isr()
600 (!(ctrl->slot_ctrl & PCI_EXP_SLTCTL_HPIE) && !pciehp_poll_mode)) in pciehp_isr()
613 atomic_or(RERUN_ISR, &ctrl->pending_events); in pciehp_isr()
621 ctrl_info(ctrl, "%s: no response from device\n", __func__); in pciehp_isr()
639 if (ctrl->power_fault_detected) in pciehp_isr()
642 ctrl->power_fault_detected = true; in pciehp_isr()
664 ctrl_dbg(ctrl, "pending interrupts %#06x from Slot Status\n", events); in pciehp_isr()
673 ctrl->cmd_busy = 0; in pciehp_isr()
675 wake_up(&ctrl->queue); in pciehp_isr()
684 ctrl_dbg(ctrl, "ignoring hotplug event %#06x\n", events); in pciehp_isr()
689 atomic_or(events, &ctrl->pending_events); in pciehp_isr()
695 struct controller *ctrl = (struct controller *)dev_id; in pciehp_ist() local
696 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_ist()
700 ctrl->ist_running = true; in pciehp_ist()
704 if (atomic_fetch_and(~RERUN_ISR, &ctrl->pending_events) & RERUN_ISR) { in pciehp_ist()
712 events = atomic_xchg(&ctrl->pending_events, 0); in pciehp_ist()
720 pciehp_handle_button_press(ctrl); in pciehp_ist()
724 ctrl_err(ctrl, "Slot(%s): Power fault\n", slot_name(ctrl)); in pciehp_ist()
725 pciehp_set_indicators(ctrl, PCI_EXP_SLTCTL_PWR_IND_OFF, in pciehp_ist()
734 ctrl->state == ON_STATE) { in pciehp_ist()
736 pciehp_ignore_dpc_link_change(ctrl, pdev, irq); in pciehp_ist()
743 down_read_nested(&ctrl->reset_lock, ctrl->depth); in pciehp_ist()
745 pciehp_handle_disable_request(ctrl); in pciehp_ist()
747 pciehp_handle_presence_or_link_change(ctrl, events); in pciehp_ist()
748 up_read(&ctrl->reset_lock); in pciehp_ist()
753 ctrl->ist_running = false; in pciehp_ist()
754 wake_up(&ctrl->requester); in pciehp_ist()
760 struct controller *ctrl = data; in pciehp_poll() local
766 while (pciehp_isr(IRQ_NOTCONNECTED, ctrl) == IRQ_WAKE_THREAD || in pciehp_poll()
767 atomic_read(&ctrl->pending_events)) in pciehp_poll()
768 pciehp_ist(IRQ_NOTCONNECTED, ctrl); in pciehp_poll()
779 static void pcie_enable_notification(struct controller *ctrl) in pcie_enable_notification() argument
800 if (ATTN_BUTTN(ctrl)) in pcie_enable_notification()
806 if (!pciehp_poll_mode && !NO_CMD_CMPL(ctrl)) in pcie_enable_notification()
814 pcie_write_cmd_nowait(ctrl, cmd, mask); in pcie_enable_notification()
815 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, in pcie_enable_notification()
816 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, cmd); in pcie_enable_notification()
819 static void pcie_disable_notification(struct controller *ctrl) in pcie_disable_notification() argument
827 pcie_write_cmd(ctrl, 0, mask); in pcie_disable_notification()
828 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, in pcie_disable_notification()
829 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, 0); in pcie_disable_notification()
832 void pcie_clear_hotplug_events(struct controller *ctrl) in pcie_clear_hotplug_events() argument
834 pcie_capability_write_word(ctrl_dev(ctrl), PCI_EXP_SLTSTA, in pcie_clear_hotplug_events()
838 void pcie_enable_interrupt(struct controller *ctrl) in pcie_enable_interrupt() argument
843 pcie_write_cmd(ctrl, mask, mask); in pcie_enable_interrupt()
846 void pcie_disable_interrupt(struct controller *ctrl) in pcie_disable_interrupt() argument
858 pcie_write_cmd(ctrl, 0, mask); in pcie_disable_interrupt()
873 struct controller *ctrl = get_service_data(dev); in pciehp_slot_reset() local
875 if (ctrl->state != ON_STATE) in pciehp_slot_reset()
881 if (!pciehp_check_link_active(ctrl)) in pciehp_slot_reset()
882 pciehp_request(ctrl, PCI_EXP_SLTSTA_DLLSC); in pciehp_slot_reset()
897 struct controller *ctrl = to_ctrl(hotplug_slot); in pciehp_reset_slot() local
898 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_reset_slot()
905 down_write_nested(&ctrl->reset_lock, ctrl->depth); in pciehp_reset_slot()
907 if (!ATTN_BUTTN(ctrl)) { in pciehp_reset_slot()
914 pcie_write_cmd(ctrl, 0, ctrl_mask); in pciehp_reset_slot()
915 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, in pciehp_reset_slot()
916 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, 0); in pciehp_reset_slot()
918 rc = pci_bridge_secondary_bus_reset(ctrl->pcie->port); in pciehp_reset_slot()
921 pcie_write_cmd_nowait(ctrl, ctrl_mask, ctrl_mask); in pciehp_reset_slot()
922 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, in pciehp_reset_slot()
923 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, ctrl_mask); in pciehp_reset_slot()
925 up_write(&ctrl->reset_lock); in pciehp_reset_slot()
929 int pcie_init_notification(struct controller *ctrl) in pcie_init_notification() argument
931 if (pciehp_request_irq(ctrl)) in pcie_init_notification()
933 pcie_enable_notification(ctrl); in pcie_init_notification()
934 ctrl->notification_enabled = 1; in pcie_init_notification()
938 void pcie_shutdown_notification(struct controller *ctrl) in pcie_shutdown_notification() argument
940 if (ctrl->notification_enabled) { in pcie_shutdown_notification()
941 pcie_disable_notification(ctrl); in pcie_shutdown_notification()
942 pciehp_free_irq(ctrl); in pcie_shutdown_notification()
943 ctrl->notification_enabled = 0; in pcie_shutdown_notification()
947 static inline void dbg_ctrl(struct controller *ctrl) in dbg_ctrl() argument
949 struct pci_dev *pdev = ctrl->pcie->port; in dbg_ctrl()
952 ctrl_dbg(ctrl, "Slot Capabilities : 0x%08x\n", ctrl->slot_cap); in dbg_ctrl()
954 ctrl_dbg(ctrl, "Slot Status : 0x%04x\n", reg16); in dbg_ctrl()
956 ctrl_dbg(ctrl, "Slot Control : 0x%04x\n", reg16); in dbg_ctrl()
977 struct controller *ctrl; in pcie_init() local
983 ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL); in pcie_init()
984 if (!ctrl) in pcie_init()
987 ctrl->pcie = dev; in pcie_init()
988 ctrl->depth = pcie_hotplug_depth(dev->port); in pcie_init()
1001 ctrl->slot_cap = slot_cap; in pcie_init()
1002 mutex_init(&ctrl->ctrl_lock); in pcie_init()
1003 mutex_init(&ctrl->state_lock); in pcie_init()
1004 init_rwsem(&ctrl->reset_lock); in pcie_init()
1005 init_waitqueue_head(&ctrl->requester); in pcie_init()
1006 init_waitqueue_head(&ctrl->queue); in pcie_init()
1007 INIT_DELAYED_WORK(&ctrl->button_work, pciehp_queue_pushbutton_work); in pcie_init()
1008 dbg_ctrl(ctrl); in pcie_init()
1011 ctrl->state = list_empty(&subordinate->devices) ? OFF_STATE : ON_STATE; in pcie_init()
1016 pcie_write_cmd_nowait(ctrl, PCI_EXP_SLTCTL_IBPD_DISABLE, in pcie_init()
1018 ctrl->inband_presence_disabled = 1; in pcie_init()
1022 ctrl->inband_presence_disabled = 1; in pcie_init()
1030 …ctrl_info(ctrl, "Slot #%d AttnBtn%c PwrCtrl%c MRL%c AttnInd%c PwrInd%c HotPlug%c Surprise%c Interl… in pcie_init()
1049 if (POWER_CTRL(ctrl)) { in pcie_init()
1050 pciehp_get_power_status(ctrl, &poweron); in pcie_init()
1051 if (!pciehp_card_present_or_link_active(ctrl) && poweron) { in pcie_init()
1052 pcie_disable_notification(ctrl); in pcie_init()
1053 pciehp_power_off_slot(ctrl); in pcie_init()
1057 return ctrl; in pcie_init()
1060 void pciehp_release_ctrl(struct controller *ctrl) in pciehp_release_ctrl() argument
1062 cancel_delayed_work_sync(&ctrl->button_work); in pciehp_release_ctrl()
1063 kfree(ctrl); in pciehp_release_ctrl()