Lines Matching +full:pcie +full:- +full:2
1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright Altera Corporation (C) 2013-2015. All rights reserved
6 * Description: Altera PCIe host controller driver
44 #define S10_RP_CFG_ADDR(pcie, reg) \ argument
45 (((pcie)->hip_base) + (reg) + (1 << 20))
46 #define S10_RP_SECONDARY(pcie) \ argument
47 readb(S10_RP_CFG_ADDR(pcie, PCI_SECONDARY_BUS))
59 #define TLP_CFG_DW0(pcie, cfg) \ argument
62 #define TLP_CFG_DW1(pcie, tag, be) \ argument
63 (((TLP_REQ_ID(pcie->root_bus_nr, RP_DEVFN)) << 16) | (tag << 8) | (be))
98 int (*tlp_read_pkt)(struct altera_pcie *pcie, u32 *value);
99 void (*tlp_write_pkt)(struct altera_pcie *pcie, u32 *headers,
101 bool (*get_link_status)(struct altera_pcie *pcie);
102 int (*rp_read_cfg)(struct altera_pcie *pcie, int where,
104 int (*rp_write_cfg)(struct altera_pcie *pcie, u8 busno,
111 u32 cap_offset; /* PCIe capability structure register offset */
124 static inline void cra_writel(struct altera_pcie *pcie, const u32 value, in cra_writel() argument
127 writel_relaxed(value, pcie->cra_base + reg); in cra_writel()
130 static inline u32 cra_readl(struct altera_pcie *pcie, const u32 reg) in cra_readl() argument
132 return readl_relaxed(pcie->cra_base + reg); in cra_readl()
135 static bool altera_pcie_link_up(struct altera_pcie *pcie) in altera_pcie_link_up() argument
137 return !!((cra_readl(pcie, RP_LTSSM) & RP_LTSSM_MASK) == LTSSM_L0); in altera_pcie_link_up()
140 static bool s10_altera_pcie_link_up(struct altera_pcie *pcie) in s10_altera_pcie_link_up() argument
142 void __iomem *addr = S10_RP_CFG_ADDR(pcie, in s10_altera_pcie_link_up()
143 pcie->pcie_data->cap_offset + in s10_altera_pcie_link_up()
150 * Altera PCIe port uses BAR0 of RC's configuration space as the translation
151 * from PCI bus to native BUS. Entire DDR region is mapped into PCIe space
156 * allocation by PCIe core.
168 static void tlp_write_tx(struct altera_pcie *pcie, in tlp_write_tx() argument
171 cra_writel(pcie, tlp_rp_regdata->reg0, RP_TX_REG0); in tlp_write_tx()
172 cra_writel(pcie, tlp_rp_regdata->reg1, RP_TX_REG1); in tlp_write_tx()
173 cra_writel(pcie, tlp_rp_regdata->ctrl, RP_TX_CNTRL); in tlp_write_tx()
176 static void s10_tlp_write_tx(struct altera_pcie *pcie, u32 reg0, u32 ctrl) in s10_tlp_write_tx() argument
178 cra_writel(pcie, reg0, RP_TX_REG0); in s10_tlp_write_tx()
179 cra_writel(pcie, ctrl, S10_RP_TX_CNTRL); in s10_tlp_write_tx()
182 static bool altera_pcie_valid_device(struct altera_pcie *pcie, in altera_pcie_valid_device() argument
186 if (bus->number != pcie->root_bus_nr) { in altera_pcie_valid_device()
187 if (!pcie->pcie_data->ops->get_link_status(pcie)) in altera_pcie_valid_device()
192 if (bus->number == pcie->root_bus_nr && dev > 0) in altera_pcie_valid_device()
198 static int tlp_read_packet(struct altera_pcie *pcie, u32 *value) in tlp_read_packet() argument
207 * Minimum 2 loops to read TLP headers and 1 loop to read data in tlp_read_packet()
211 ctrl = cra_readl(pcie, RP_RXCPL_STATUS); in tlp_read_packet()
213 reg0 = cra_readl(pcie, RP_RXCPL_REG0); in tlp_read_packet()
214 reg1 = cra_readl(pcie, RP_RXCPL_REG1); in tlp_read_packet()
237 static int s10_tlp_read_packet(struct altera_pcie *pcie, u32 *value) in s10_tlp_read_packet() argument
243 struct device *dev = &pcie->pdev->dev; in s10_tlp_read_packet()
246 ctrl = cra_readl(pcie, S10_RP_RXCPL_STATUS); in s10_tlp_read_packet()
249 dw[0] = cra_readl(pcie, S10_RP_RXCPL_REG); in s10_tlp_read_packet()
264 ctrl = cra_readl(pcie, S10_RP_RXCPL_STATUS); in s10_tlp_read_packet()
265 dw[count++] = cra_readl(pcie, S10_RP_RXCPL_REG); in s10_tlp_read_packet()
284 static void tlp_write_packet(struct altera_pcie *pcie, u32 *headers, in tlp_write_packet() argument
292 tlp_write_tx(pcie, &tlp_rp_regdata); in tlp_write_packet()
295 tlp_rp_regdata.reg0 = headers[2]; in tlp_write_packet()
298 tlp_write_tx(pcie, &tlp_rp_regdata); in tlp_write_packet()
303 tlp_rp_regdata.reg0 = headers[2]; in tlp_write_packet()
308 tlp_write_tx(pcie, &tlp_rp_regdata); in tlp_write_packet()
311 static void s10_tlp_write_packet(struct altera_pcie *pcie, u32 *headers, in s10_tlp_write_packet() argument
314 s10_tlp_write_tx(pcie, headers[0], RP_TX_SOP); in s10_tlp_write_packet()
315 s10_tlp_write_tx(pcie, headers[1], 0); in s10_tlp_write_packet()
316 s10_tlp_write_tx(pcie, headers[2], 0); in s10_tlp_write_packet()
317 s10_tlp_write_tx(pcie, data, RP_TX_EOP); in s10_tlp_write_packet()
320 static void get_tlp_header(struct altera_pcie *pcie, u8 bus, u32 devfn, in get_tlp_header() argument
324 u8 cfg0 = read ? pcie->pcie_data->cfgrd0 : pcie->pcie_data->cfgwr0; in get_tlp_header()
325 u8 cfg1 = read ? pcie->pcie_data->cfgrd1 : pcie->pcie_data->cfgwr1; in get_tlp_header()
328 if (pcie->pcie_data->version == ALTERA_PCIE_V1) in get_tlp_header()
329 cfg = (bus == pcie->root_bus_nr) ? cfg0 : cfg1; in get_tlp_header()
331 cfg = (bus > S10_RP_SECONDARY(pcie)) ? cfg0 : cfg1; in get_tlp_header()
333 headers[0] = TLP_CFG_DW0(pcie, cfg); in get_tlp_header()
334 headers[1] = TLP_CFG_DW1(pcie, tag, byte_en); in get_tlp_header()
335 headers[2] = TLP_CFG_DW2(bus, devfn, where); in get_tlp_header()
338 static int tlp_cfg_dword_read(struct altera_pcie *pcie, u8 bus, u32 devfn, in tlp_cfg_dword_read() argument
343 get_tlp_header(pcie, bus, devfn, where, byte_en, true, in tlp_cfg_dword_read()
346 pcie->pcie_data->ops->tlp_write_pkt(pcie, headers, 0, false); in tlp_cfg_dword_read()
348 return pcie->pcie_data->ops->tlp_read_pkt(pcie, value); in tlp_cfg_dword_read()
351 static int tlp_cfg_dword_write(struct altera_pcie *pcie, u8 bus, u32 devfn, in tlp_cfg_dword_write() argument
357 get_tlp_header(pcie, bus, devfn, where, byte_en, false, in tlp_cfg_dword_write()
362 pcie->pcie_data->ops->tlp_write_pkt(pcie, headers, in tlp_cfg_dword_write()
365 pcie->pcie_data->ops->tlp_write_pkt(pcie, headers, in tlp_cfg_dword_write()
368 ret = pcie->pcie_data->ops->tlp_read_pkt(pcie, NULL); in tlp_cfg_dword_write()
376 if ((bus == pcie->root_bus_nr) && (where == PCI_PRIMARY_BUS)) in tlp_cfg_dword_write()
377 pcie->root_bus_nr = (u8)(value); in tlp_cfg_dword_write()
382 static int s10_rp_read_cfg(struct altera_pcie *pcie, int where, in s10_rp_read_cfg() argument
385 void __iomem *addr = S10_RP_CFG_ADDR(pcie, where); in s10_rp_read_cfg()
391 case 2: in s10_rp_read_cfg()
402 static int s10_rp_write_cfg(struct altera_pcie *pcie, u8 busno, in s10_rp_write_cfg() argument
405 void __iomem *addr = S10_RP_CFG_ADDR(pcie, where); in s10_rp_write_cfg()
411 case 2: in s10_rp_write_cfg()
423 if (busno == pcie->root_bus_nr && where == PCI_PRIMARY_BUS) in s10_rp_write_cfg()
424 pcie->root_bus_nr = value & 0xff; in s10_rp_write_cfg()
429 static int _altera_pcie_cfg_read(struct altera_pcie *pcie, u8 busno, in _altera_pcie_cfg_read() argument
437 if (busno == pcie->root_bus_nr && pcie->pcie_data->ops->rp_read_cfg) in _altera_pcie_cfg_read()
438 return pcie->pcie_data->ops->rp_read_cfg(pcie, where, in _altera_pcie_cfg_read()
445 case 2: in _altera_pcie_cfg_read()
453 ret = tlp_cfg_dword_read(pcie, busno, devfn, in _altera_pcie_cfg_read()
462 case 2: in _altera_pcie_cfg_read()
473 static int _altera_pcie_cfg_write(struct altera_pcie *pcie, u8 busno, in _altera_pcie_cfg_write() argument
481 if (busno == pcie->root_bus_nr && pcie->pcie_data->ops->rp_write_cfg) in _altera_pcie_cfg_write()
482 return pcie->pcie_data->ops->rp_write_cfg(pcie, busno, in _altera_pcie_cfg_write()
490 case 2: in _altera_pcie_cfg_write()
500 return tlp_cfg_dword_write(pcie, busno, devfn, (where & ~DWORD_MASK), in _altera_pcie_cfg_write()
507 struct altera_pcie *pcie = bus->sysdata; in altera_pcie_cfg_read() local
512 if (!altera_pcie_valid_device(pcie, bus, PCI_SLOT(devfn))) in altera_pcie_cfg_read()
515 return _altera_pcie_cfg_read(pcie, bus->number, devfn, where, size, in altera_pcie_cfg_read()
522 struct altera_pcie *pcie = bus->sysdata; in altera_pcie_cfg_write() local
527 if (!altera_pcie_valid_device(pcie, bus, PCI_SLOT(devfn))) in altera_pcie_cfg_write()
530 return _altera_pcie_cfg_write(pcie, bus->number, devfn, where, size, in altera_pcie_cfg_write()
539 static int altera_read_cap_word(struct altera_pcie *pcie, u8 busno, in altera_read_cap_word() argument
545 ret = _altera_pcie_cfg_read(pcie, busno, devfn, in altera_read_cap_word()
546 pcie->pcie_data->cap_offset + offset, in altera_read_cap_word()
553 static int altera_write_cap_word(struct altera_pcie *pcie, u8 busno, in altera_write_cap_word() argument
556 return _altera_pcie_cfg_write(pcie, busno, devfn, in altera_write_cap_word()
557 pcie->pcie_data->cap_offset + offset, in altera_write_cap_word()
562 static void altera_wait_link_retrain(struct altera_pcie *pcie) in altera_wait_link_retrain() argument
564 struct device *dev = &pcie->pdev->dev; in altera_wait_link_retrain()
571 altera_read_cap_word(pcie, pcie->root_bus_nr, RP_DEVFN, in altera_wait_link_retrain()
586 if (pcie->pcie_data->ops->get_link_status(pcie)) in altera_wait_link_retrain()
597 static void altera_pcie_retrain(struct altera_pcie *pcie) in altera_pcie_retrain() argument
601 if (!pcie->pcie_data->ops->get_link_status(pcie)) in altera_pcie_retrain()
605 * Set the retrain bit if the PCIe rootport support > 2.5GB/s, but in altera_pcie_retrain()
608 altera_read_cap_word(pcie, pcie->root_bus_nr, RP_DEVFN, PCI_EXP_LNKCAP, in altera_pcie_retrain()
613 altera_read_cap_word(pcie, pcie->root_bus_nr, RP_DEVFN, PCI_EXP_LNKSTA, in altera_pcie_retrain()
616 altera_read_cap_word(pcie, pcie->root_bus_nr, RP_DEVFN, in altera_pcie_retrain()
619 altera_write_cap_word(pcie, pcie->root_bus_nr, RP_DEVFN, in altera_pcie_retrain()
622 altera_wait_link_retrain(pcie); in altera_pcie_retrain()
630 irq_set_chip_data(irq, domain->host_data); in altera_pcie_intx_map()
642 struct altera_pcie *pcie; in altera_pcie_isr() local
649 pcie = irq_desc_get_handler_data(desc); in altera_pcie_isr()
650 dev = &pcie->pdev->dev; in altera_pcie_isr()
652 while ((status = cra_readl(pcie, P2A_INT_STATUS) in altera_pcie_isr()
656 cra_writel(pcie, 1 << bit, P2A_INT_STATUS); in altera_pcie_isr()
658 ret = generic_handle_domain_irq(pcie->irq_domain, bit); in altera_pcie_isr()
667 static int altera_pcie_init_irq_domain(struct altera_pcie *pcie) in altera_pcie_init_irq_domain() argument
669 struct device *dev = &pcie->pdev->dev; in altera_pcie_init_irq_domain()
670 struct device_node *node = dev->of_node; in altera_pcie_init_irq_domain()
673 pcie->irq_domain = irq_domain_add_linear(node, PCI_NUM_INTX, in altera_pcie_init_irq_domain()
674 &intx_domain_ops, pcie); in altera_pcie_init_irq_domain()
675 if (!pcie->irq_domain) { in altera_pcie_init_irq_domain()
677 return -ENOMEM; in altera_pcie_init_irq_domain()
683 static void altera_pcie_irq_teardown(struct altera_pcie *pcie) in altera_pcie_irq_teardown() argument
685 irq_set_chained_handler_and_data(pcie->irq, NULL, NULL); in altera_pcie_irq_teardown()
686 irq_domain_remove(pcie->irq_domain); in altera_pcie_irq_teardown()
687 irq_dispose_mapping(pcie->irq); in altera_pcie_irq_teardown()
690 static int altera_pcie_parse_dt(struct altera_pcie *pcie) in altera_pcie_parse_dt() argument
692 struct platform_device *pdev = pcie->pdev; in altera_pcie_parse_dt()
694 pcie->cra_base = devm_platform_ioremap_resource_byname(pdev, "Cra"); in altera_pcie_parse_dt()
695 if (IS_ERR(pcie->cra_base)) in altera_pcie_parse_dt()
696 return PTR_ERR(pcie->cra_base); in altera_pcie_parse_dt()
698 if (pcie->pcie_data->version == ALTERA_PCIE_V2) { in altera_pcie_parse_dt()
699 pcie->hip_base = in altera_pcie_parse_dt()
701 if (IS_ERR(pcie->hip_base)) in altera_pcie_parse_dt()
702 return PTR_ERR(pcie->hip_base); in altera_pcie_parse_dt()
706 pcie->irq = platform_get_irq(pdev, 0); in altera_pcie_parse_dt()
707 if (pcie->irq < 0) in altera_pcie_parse_dt()
708 return pcie->irq; in altera_pcie_parse_dt()
710 irq_set_chained_handler_and_data(pcie->irq, altera_pcie_isr, pcie); in altera_pcie_parse_dt()
714 static void altera_pcie_host_init(struct altera_pcie *pcie) in altera_pcie_host_init() argument
716 altera_pcie_retrain(pcie); in altera_pcie_host_init()
754 {.compatible = "altr,pcie-root-port-1.0",
756 {.compatible = "altr,pcie-root-port-2.0",
763 struct device *dev = &pdev->dev; in altera_pcie_probe()
764 struct altera_pcie *pcie; in altera_pcie_probe() local
769 bridge = devm_pci_alloc_host_bridge(dev, sizeof(*pcie)); in altera_pcie_probe()
771 return -ENOMEM; in altera_pcie_probe()
773 pcie = pci_host_bridge_priv(bridge); in altera_pcie_probe()
774 pcie->pdev = pdev; in altera_pcie_probe()
775 platform_set_drvdata(pdev, pcie); in altera_pcie_probe()
777 data = of_device_get_match_data(&pdev->dev); in altera_pcie_probe()
779 return -ENODEV; in altera_pcie_probe()
781 pcie->pcie_data = data; in altera_pcie_probe()
783 ret = altera_pcie_parse_dt(pcie); in altera_pcie_probe()
789 ret = altera_pcie_init_irq_domain(pcie); in altera_pcie_probe()
796 cra_writel(pcie, P2A_INT_STS_ALL, P2A_INT_STATUS); in altera_pcie_probe()
798 cra_writel(pcie, P2A_INT_ENA_ALL, P2A_INT_ENABLE); in altera_pcie_probe()
799 altera_pcie_host_init(pcie); in altera_pcie_probe()
801 bridge->sysdata = pcie; in altera_pcie_probe()
802 bridge->busnr = pcie->root_bus_nr; in altera_pcie_probe()
803 bridge->ops = &altera_pcie_ops; in altera_pcie_probe()
810 struct altera_pcie *pcie = platform_get_drvdata(pdev); in altera_pcie_remove() local
811 struct pci_host_bridge *bridge = pci_host_bridge_from_priv(pcie); in altera_pcie_remove()
813 pci_stop_root_bus(bridge->bus); in altera_pcie_remove()
814 pci_remove_root_bus(bridge->bus); in altera_pcie_remove()
815 altera_pcie_irq_teardown(pcie); in altera_pcie_remove()
822 .name = "altera-pcie",