124 static inline u32 ixp4xx_readl(struct ixp4xx_pci *p, u32 reg)  in ixp4xx_readl()  argument
126 	return __raw_readl(p->base + reg);  in ixp4xx_readl()
129 static inline void ixp4xx_writel(struct ixp4xx_pci *p, u32 reg, u32 val)  in ixp4xx_writel()  argument
131 	__raw_writel(val, p->base + reg);  in ixp4xx_writel()
134 static int ixp4xx_pci_check_master_abort(struct ixp4xx_pci *p)  in ixp4xx_pci_check_master_abort()  argument
136 	u32 isr = ixp4xx_readl(p, IXP4XX_PCI_ISR);  in ixp4xx_pci_check_master_abort()
140 		ixp4xx_writel(p, IXP4XX_PCI_ISR, IXP4XX_PCI_ISR_PFE);  in ixp4xx_pci_check_master_abort()
141 		dev_dbg(p->dev, "master abort detected\n");  in ixp4xx_pci_check_master_abort()
148 static int ixp4xx_pci_read_indirect(struct ixp4xx_pci *p, u32 addr, u32 cmd, u32 *data)  in ixp4xx_pci_read_indirect()  argument
150 	ixp4xx_writel(p, IXP4XX_PCI_NP_AD, addr);  in ixp4xx_pci_read_indirect()
152 	if (p->errata_hammer) {  in ixp4xx_pci_read_indirect()
161 			ixp4xx_writel(p, IXP4XX_PCI_NP_CBE, cmd);  in ixp4xx_pci_read_indirect()
162 			*data = ixp4xx_readl(p, IXP4XX_PCI_NP_RDATA);  in ixp4xx_pci_read_indirect()
163 			*data = ixp4xx_readl(p, IXP4XX_PCI_NP_RDATA);  in ixp4xx_pci_read_indirect()
166 		ixp4xx_writel(p, IXP4XX_PCI_NP_CBE, cmd);  in ixp4xx_pci_read_indirect()
167 		*data = ixp4xx_readl(p, IXP4XX_PCI_NP_RDATA);  in ixp4xx_pci_read_indirect()
170 	return ixp4xx_pci_check_master_abort(p);  in ixp4xx_pci_read_indirect()
173 static int ixp4xx_pci_write_indirect(struct ixp4xx_pci *p, u32 addr, u32 cmd, u32 data)  in ixp4xx_pci_write_indirect()  argument
175 	ixp4xx_writel(p, IXP4XX_PCI_NP_AD, addr);  in ixp4xx_pci_write_indirect()
178 	ixp4xx_writel(p, IXP4XX_PCI_NP_CBE, cmd);  in ixp4xx_pci_write_indirect()
181 	ixp4xx_writel(p, IXP4XX_PCI_NP_WDATA, data);  in ixp4xx_pci_write_indirect()
183 	return ixp4xx_pci_check_master_abort(p);  in ixp4xx_pci_write_indirect()
217 static int ixp4xx_crp_read_config(struct ixp4xx_pci *p, int where, int size,  in ixp4xx_crp_read_config()  argument
225 	dev_dbg(p->dev, "%s from %d size %d cmd %08x\n",  in ixp4xx_crp_read_config()
228 	ixp4xx_writel(p, IXP4XX_PCI_CRP_AD_CBE, cmd);  in ixp4xx_crp_read_config()
229 	val = ixp4xx_readl(p, IXP4XX_PCI_CRP_RDATA);  in ixp4xx_crp_read_config()
235 		dev_dbg(p->dev, "%s read byte %02x\n", __func__, val);  in ixp4xx_crp_read_config()
239 		dev_dbg(p->dev, "%s read word %04x\n", __func__, val);  in ixp4xx_crp_read_config()
243 		dev_dbg(p->dev, "%s read long %08x\n", __func__, val);  in ixp4xx_crp_read_config()
247 		dev_err(p->dev, "%s illegal size\n", __func__);  in ixp4xx_crp_read_config()
255 static int ixp4xx_crp_write_config(struct ixp4xx_pci *p, int where, int size,  in ixp4xx_crp_write_config()  argument
269 	dev_dbg(p->dev, "%s to %d size %d cmd %08x val %08x\n",  in ixp4xx_crp_write_config()
272 	ixp4xx_writel(p, IXP4XX_PCI_CRP_AD_CBE, cmd);  in ixp4xx_crp_write_config()
273 	ixp4xx_writel(p, IXP4XX_PCI_CRP_WDATA, val);  in ixp4xx_crp_write_config()
296 	struct ixp4xx_pci *p = bus->sysdata;  in ixp4xx_pci_read_config()  local
309 	dev_dbg(p->dev, "read_config from %d size %d dev %d:%d:%d address: %08x cmd: %08x\n",  in ixp4xx_pci_read_config()
312 	ret = ixp4xx_pci_read_indirect(p, addr, cmd, &val);  in ixp4xx_pci_read_config()
320 		dev_dbg(p->dev, "%s read byte %02x\n", __func__, val);  in ixp4xx_pci_read_config()
324 		dev_dbg(p->dev, "%s read word %04x\n", __func__, val);  in ixp4xx_pci_read_config()
328 		dev_dbg(p->dev, "%s read long %08x\n", __func__, val);  in ixp4xx_pci_read_config()
332 		dev_err(p->dev, "%s illegal size\n", __func__);  in ixp4xx_pci_read_config()
343 	struct ixp4xx_pci *p = bus->sysdata;  in ixp4xx_pci_write_config()  local
357 	dev_dbg(p->dev, "write_config_byte %#x to %d size %d dev %d:%d:%d addr: %08x cmd %08x\n",  in ixp4xx_pci_write_config()
360 	ret = ixp4xx_pci_write_indirect(p, addr, cmd, val);  in ixp4xx_pci_write_config()
381 static int ixp4xx_pci_parse_map_ranges(struct ixp4xx_pci *p)  in ixp4xx_pci_parse_map_ranges()  argument
383 	struct device *dev = p->dev;  in ixp4xx_pci_parse_map_ranges()
384 	struct pci_host_bridge *bridge = pci_host_bridge_from_priv(p);  in ixp4xx_pci_parse_map_ranges()
410 		ixp4xx_writel(p, IXP4XX_PCI_PCIMEMBASE, pcimembase);  in ixp4xx_pci_parse_map_ranges()
431 		ixp4xx_writel(p, IXP4XX_PCI_AHBIOBASE, (addr >> 8));  in ixp4xx_pci_parse_map_ranges()
439 static int ixp4xx_pci_parse_map_dma_ranges(struct ixp4xx_pci *p)  in ixp4xx_pci_parse_map_dma_ranges()  argument
441 	struct device *dev = p->dev;  in ixp4xx_pci_parse_map_dma_ranges()
442 	struct pci_host_bridge *bridge = pci_host_bridge_from_priv(p);  in ixp4xx_pci_parse_map_dma_ranges()
465 		ixp4xx_writel(p, IXP4XX_PCI_AHBMEMBASE, ahbmembase);  in ixp4xx_pci_parse_map_dma_ranges()
479 	struct ixp4xx_pci *p = ixp4xx_pci_abort_singleton;  in ixp4xx_pci_abort_handler()  local
483 	isr = ixp4xx_readl(p, IXP4XX_PCI_ISR);  in ixp4xx_pci_abort_handler()
484 	ret = ixp4xx_crp_read_config(p, PCI_STATUS, 2, &status);  in ixp4xx_pci_abort_handler()
486 		dev_err(p->dev, "unable to read abort status\n");  in ixp4xx_pci_abort_handler()
490 	dev_err(p->dev,  in ixp4xx_pci_abort_handler()
495 	ixp4xx_writel(p, IXP4XX_PCI_ISR, IXP4XX_PCI_ISR_PFE);  in ixp4xx_pci_abort_handler()
497 	ret = ixp4xx_crp_write_config(p, PCI_STATUS, 2, status);  in ixp4xx_pci_abort_handler()
499 		dev_err(p->dev, "unable to clear abort status bit\n");  in ixp4xx_pci_abort_handler()
506 		dev_err(p->dev, "imprecise abort\n");  in ixp4xx_pci_abort_handler()
517 	struct ixp4xx_pci *p;  in ixp4xx_pci_probe()  local
530 	host = devm_pci_alloc_host_bridge(dev, sizeof(*p));  in ixp4xx_pci_probe()
535 	p = pci_host_bridge_priv(host);  in ixp4xx_pci_probe()
536 	host->sysdata = p;  in ixp4xx_pci_probe()
537 	p->dev = dev;  in ixp4xx_pci_probe()
538 	dev_set_drvdata(dev, p);  in ixp4xx_pci_probe()
545 		p->errata_hammer = true;  in ixp4xx_pci_probe()
549 	p->base = devm_platform_ioremap_resource(pdev, 0);  in ixp4xx_pci_probe()
550 	if (IS_ERR(p->base))  in ixp4xx_pci_probe()
551 		return PTR_ERR(p->base);  in ixp4xx_pci_probe()
553 	val = ixp4xx_readl(p, IXP4XX_PCI_CSR);  in ixp4xx_pci_probe()
554 	p->host_mode = !!(val & IXP4XX_PCI_CSR_HOST);  in ixp4xx_pci_probe()
556 		 p->host_mode ? "host" : "option");  in ixp4xx_pci_probe()
559 	ixp4xx_pci_abort_singleton = p;  in ixp4xx_pci_probe()
563 	ret = ixp4xx_pci_parse_map_ranges(p);  in ixp4xx_pci_probe()
567 	ret = ixp4xx_pci_parse_map_dma_ranges(p);  in ixp4xx_pci_probe()
572 	if (p->host_mode) {  in ixp4xx_pci_probe()
579 			ret = ixp4xx_crp_write_config(p, basereg[i], 4, addr);  in ixp4xx_pci_probe()
592 		ret = ixp4xx_crp_write_config(p, PCI_BASE_ADDRESS_4, 4, addr);  in ixp4xx_pci_probe()
605 		ret = ixp4xx_crp_write_config(p, PCI_BASE_ADDRESS_5, 4, addr);  in ixp4xx_pci_probe()
615 		ret = ixp4xx_crp_write_config(p, IXP4XX_PCI_RTOTTO, 4,  in ixp4xx_pci_probe()
625 	ixp4xx_writel(p, IXP4XX_PCI_ISR, val);  in ixp4xx_pci_probe()
636 	ixp4xx_writel(p, IXP4XX_PCI_CSR, val);  in ixp4xx_pci_probe()
638 	ret = ixp4xx_crp_write_config(p, PCI_COMMAND, 2, PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);  in ixp4xx_pci_probe()